Prosecution Insights
Last updated: July 17, 2026
Application No. 17/481,258

THERMALLY CONDUCTIVE SLEEVES AROUND TGVS FOR IMPROVED HEAT DISSIPATION IN GLASS CORE SUBSTRATES OR GLASS INTERPOSERS

Non-Final OA §103
Filed
Sep 21, 2021
Examiner
PRIDEMORE, NATHAN ANDREW
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
4 (Non-Final)
76%
Grant Probability
Favorable
4-5
OA Rounds
0m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
56 granted / 74 resolved
+7.7% vs TC avg
Moderate +15% lift
Without
With
+15.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
25 currently pending
Career history
104
Total Applications
across all art units

Statute-Specific Performance

§103
81.7%
+41.7% vs TC avg
§102
8.0%
-32.0% vs TC avg
§112
9.7%
-30.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 74 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments filed 18 February 2026 have been fully considered and overcome the prior rejection of record made in the previous Office action. However, upon further search and consideration, the new limitations of the independent claims do not overcome Bharath in view of Suk Hyeon Cho et al. (US 2016/0128186 A1). The rejection has been updated below in view Cho, as necessitated by the amendment. EXAMINER’S AMENDMENT The application has been amended as follows: Claim 1 has been amended to insert – electrically – between “a first” and “conductive via” in line 4. Claim 1 has been amended to insert –electrically— between “a second” and “conductive via” in line 5. Claim 1 has been amended to insert –electrically—between “the second” and “conductive via” in line 7. This reintroduces the amendments to claim 1 presented in the claim set of 03 September 2025 and as mirrored in the remarks. Claim 18 has been amended to insert – electrically – between “a first” and “conductive via” in line 7. Claim 18 has been amended to insert –electrically— between “a second” and “conductive via” in lines 8-9. Claim 18 has been amended to insert –electrically—between “the second” and “conductive via” in line 10. This reintroduces the amendments to claim 18 presented in the claim set of 03 September 2025 and as mirrored in the remarks. Authorization for this examiner’s amendment was given in an interview with Justin Brask on 31 March 2026. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims are rejected under 35 U.S.C. 103 as being unpatentable over Krishna Bharath et al. (US 2020/0098621 A1; hereinafter Bharath) in view of Suk Hyeon Cho et al. (US 2016/0128186 A1; hereinafter Cho). Regarding Claim 1, Bharath teaches an electronic package (Fig. 1A, 1B, 1C), comprising: a core (glass material of layer 104-1; ¶0028; hereinafter 104-1), wherein the core comprises glass (¶0043); a first via (192-B2) through the core (104-1), wherein the first via directly contacts the core (as shown in Fig. 1A), and wherein the first via (192-B2) is a first electrically conductive via (¶0026, ¶0029); a second via (192-B1) through the core (104-1), wherein the second via is a second electrically conductive via (¶0026, ¶0029); and a sleeve (194) around the second electrically conductive via (192-B1), wherein the sleeve (194) comprises a metal (¶0030). Bharath is silent regarding the dimensions of the sleeve (194), wherein the sleeve has an uppermost surface at a same level as an uppermost surface of the core, and the sleeve has a bottommost surface at a same level as a bottommost surface of the core. In the same field of endeavor, Cho discloses a similar electronic package (Fig. 4), comprising: a core (10), wherein the core (10) comprises glass (¶0015), a first via (15) through the core (10), a second electrically conductive via (150; ¶0036, ¶0038) through the core (10), a sleeve (155; ¶0049) around the second conductive via (150), wherein the sleeve comprises a metal (¶0050), wherein the sleeve (155) has an uppermost surface at a same level as an uppermost surface of the core (10), and the sleeve (155) has a bottommost surface at a same level as a bottommost surface of the core (10) (where the via would contact the core, as shown in Fig. 4). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to have the features above of Cho for the device of Bharath in order to provide the additional benefit of Cho’s sleeve (which is disposed between the part of the via penetrating the core and the sidewalls of the core having respective top and bottom surfaces at same levels of respective top and bottom surfaces of the core; Cho; Fig. 4; ¶0049) to alleviate differences of thermal expansion coefficients between the material of the via and the material of the core (Cho; ¶0050). Regarding Claim 2, modified Bharath teaches the electronic package of claim 1, wherein the sleeve (194) comprises aluminum particles (¶0030; Al which comprises atoms that are particles, also states 194 can be epoxy with particles of a magnetic alloy including one or more of a list of metals, including Al). Regarding Claim 4, modified Bharath teaches the electronic package of claim 1, further comprising: a first pad over the second via (pad on top of 192-B1); and a second pad under the second via (pad on bottom of 192-B1) (as shown in Fig. 1A, 1B). Regarding Claim 5, modified Bharath teaches the electronic package of claim 4, wherein the first pad and the second pad directly contact the sleeve (as shown in Fig. 1A and 1B). Regarding Claim 6, modified Bharath teaches the electronic package of claim 4, further comprising: a plurality of second vias and a plurality of sleeves around the plurality of second vias (as shown in Fig. 1A, 1B, 1C; 192-C1 with sleeve 194). Regarding Claim 7, modified Bharath teaches the electronic package of claim 6, wherein the plurality of second vias and the plurality of sleeves are positioned proximate to a perimeter of the core (the plurality of second vias {192-B1/192-C1} are positioned proximate to a perimeter of the core around die 114-2). Regarding Claim 8, modified Bharath teaches the electronic package of claim 1, further comprising: first layers (104-2) over the core (104-1), wherein the first layers (104-2) comprises a dielectric material (127; ¶0039); and second layers (127/164) under the core (104-1), wherein the second layers comprise the dielectric material (127 is also under the core 104-1). Regarding Claim 9, modified Bharath teaches the electronic package of claim 8, further comprising: a bridge (130; ¶0028) embedded in the first layers (104-1) (wherein “bridge” is interpreted using Applicant’s ¶0030, wherein “a bridge” may communicatively couple a first die to a second die). Regarding Claim 10, modified Bharath teaches the electronic package of claim 9, further comprising: a first die (114-6; ¶0028) and a second die (114-2; ¶0028), wherein the first die is communicatively coupled to the second die by the bridge (130) (as shown in Fig. 1A). Regarding Claim 18, modified Bharath teaches an electronic system (Fig. 1A; 1B; 1C), comprising: a board (102; ¶0032); a package substrate (level 104-1) coupled to the board (102), wherein the package substrate (level 104-1) comprises: a core (glass comprising material of level 104-1; ¶0028; hereinafter simply 104-1), wherein the core comprises glass (¶0043); a first via (192-B2) through the core (104-1), wherein the first via directly contacts the core (as shown in Fig. 1A), and wherein the first via (192-B2) is a first electrically conductive via (¶0026, ¶0029); a second via (192-B1) through the core (104-1), wherein the second via is a second electrically conductive via (¶0026, ¶0029); and a sleeve (194) around the second electrically conductive via (192-B1), wherein the sleeve (194) comprises a metal (¶0030); and a die (114-3, 114-6, or 114-5; ¶0026) coupled to the package substrate (level 104-1) (as shown in Fig. 1A). Bharath is silent regarding the dimensions of the sleeve (194), wherein the sleeve has an uppermost surface at a same level as an uppermost surface of the core, and the sleeve has a bottommost surface at a same level as a bottommost surface of the core. In the same field of endeavor, Cho discloses a similar electronic package (Fig. 4), comprising: a core (10), wherein the core (10) comprises glass (¶0015), a first via (15) through the core (10), a second electrically conductive via (150; ¶0036, ¶0038) through the core (10), a sleeve (155; ¶0049) around the second conductive via (150), wherein the sleeve comprises a metal (¶0050), wherein the sleeve (155) has an uppermost surface at a same level as an uppermost surface of the core (10), and the sleeve (155) has a bottommost surface at a same level as a bottommost surface of the core (10) (where the via would contact the core, as shown in Fig. 4). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to have the features above of Cho for the device of Bharath in order to provide the additional benefit of Cho’s sleeve (which is disposed between the part of the via penetrating the core and the sidewalls of the core having respective top and bottom surfaces at same levels of respective top and bottom surfaces of the core; Cho; Fig. 4; ¶0049) to alleviate differences of thermal expansion coefficients between the material of the via and the material of the core (Cho; ¶0050). Regarding Claim 19, modified Bharath teaches the electronic system of claim 18, wherein the sleeve (194) comprises aluminum (aluminum; ¶0030) or silver. Regarding Claim 20, modified Bharath teaches the electronic system of claim 18, further comprising: a first pad over the second via (pad on top of 192-B1); and a second pad under the second via (pad on bottom of 192-B1) (as shown in Fig. 1A, 1B), wherein the first pad and the second pad directly contact the sleeve (as shown in Fig. 1A and 1B). Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Bharath and Cho in view of non-patent literature “Magnetic order in new silver-based Heusler alloys” by P.J. Webster et al. (2002; hereinafter Webster) (of record). Regarding Claim 3, modified Bharath teaches the electronic package of claim 1, wherein the sleeve (194) comprises a Heusler alloy (¶0030), but does not expressly disclose wherein the Heusler alloy comprises silver. Webster teaches utilizing silver (Ag) in a Heusler alloy (Abstract). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to substitute the silver comprising Heusler alloy of Webster for the Heusler alloy of Bharath as they are equivalent Heusler alloys. The substitution of a known equivalent for another known equivalent is prima facie case of obviousness. The selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945). See MPEP 2144.07. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NATHAN PRIDEMORE whose telephone number is (703)756-4640. The examiner can normally be reached Monday - Friday 8:00am - 4:00pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JULIO MALDONADO can be reached at (571) 272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. NATHAN PRIDEMORE Examiner Art Unit 2898 /NATHAN PRIDEMORE/Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898
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Prosecution Timeline

Show 6 earlier events
Sep 03, 2025
Request for Continued Examination
Sep 09, 2025
Response after Non-Final Action
Nov 24, 2025
Non-Final Rejection mailed — §103
Feb 18, 2026
Response Filed
Apr 10, 2026
Final Rejection mailed — §103
Jun 08, 2026
Response after Non-Final Action
Jul 10, 2026
Request for Continued Examination
Jul 16, 2026
Response after Non-Final Action

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

4-5
Expected OA Rounds
76%
Grant Probability
91%
With Interview (+15.0%)
3y 5m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 74 resolved cases by this examiner. Grant probability derived from career allowance rate.

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