DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Claims 1-25 are pending.
Claims 17-21 are withdrawn from consideration.
Claims 1, 17 and 22 are currently amended.
Claims 2-16 and 23-25 are original.
Claims 1-16 and 22-25 are rejected.
Response to Arguments
Applicant's arguments filed 07/09/2025 have been fully considered but they are not persuasive.
Significantly, the response filed 07/09/2025 fails to adequately address (i.e., remedy or traverse): the drawing objection; the objection to claim 10; the rejections of claims 3, 6-11 and 22-25 under 35 USC §112; or the rejection of claim 1 under 35 USC §102 as being anticipated by Kim (US 20020063271 A1); all as set forth in the prior Office Action dated 04/09/2025. Accordingly, those objections and rejections are repeated herein as appropriate. Note, any future reply that fails to be fully responsive to a prior Office Action will be deemed non-responsive.
Applicant’s arguments (see Remarks, pages 9-10) characterizing FIG. 1 of Tu (US 20040075129 A1) as not disclosing certain claimed subject matter are moot insomuch as the rejections herein based on Tu have been altered, the alterations being necessitated by Applicant’s amendments to the claims. Applicant’s attention is directed now to FIG. 10 of Tu.
Applicant argues that “Tu does not disclose a capacitor including a Perovskite layer coupled with an electrode layer, and an insulator directly physically coupled with an edge of the electrode layer and directly physically coupled with an edge of the Perovskite layer, where the insulator has a top surface at a same level as a top surface of the Perovskite layer, as is required by Applicant's claims.” Remarks, page 10. This argument is not persuasive.
Indeed, Tu discloses (see, e.g., annotated FIG. 10 herein) a capacitor (20a, 22a, 24a) including a Perovskite layer (22a) coupled with an electrode layer (24a), and an insulator (30b) directly physically coupled with an edge (E) of the electrode layer (24a) and directly physically coupled with an edge (E’) of the Perovskite layer (22a), where the insulator (30b) has a top surface (TS) at a same level as a top surface (TS’) of the Perovskite layer (22a), as is required by Applicant's claims. Note, when the device of Tu shown in FIG. 10 is inverted, the surfaces TS and TS’ are “top” surfaces.
Applicant argues that “with respect to amended independent claims 1 and 22, Tu fails to disclose each and every feature of Applicant's claims.” Remarks, page 10. This argument is not persuasive.
Indeed, Tu discloses each and every feature of amended independent claims 1 and 22. For a more detailed treatment of the respective claims, Applicant’s attention is directed herein below to the rejection of amended independent claims 1 and 22 under 35 U.S.C. 103 as being unpatentable over Tu. Notably, Applicant's amendments necessitated the new ground(s) of rejection presented in this Office action.
The Applicant has requested rejoinder of the withdrawn method claims 17-21. Remarks, page 10. However, no pending product or apparatus claim of has been allowed or deemed allowable. Accordingly, the request for rejoinder is premature at this time.
Drawings
Figures 4A-4F should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Note, paragraph [0006] of the Applicant’s specification explicitly describes FIGS. 4A-4F as showing “various stages in a legacy manufacturing process that uses a
polish for creating a MIM structure.”
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Objections
Claim 10 is objected to because of the following informalities.
Claim 10 recites the limitation “the first side of the second electrode layer physically coupled with the second side of the second Perovskite layer” in ll. 2-4. It appears that the foregoing limitation should be “the first side of the fourth electrode layer physically coupled with the second side of the second Perovskite layer.”
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3, 6-11 and 22-25 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 3 recites “a minimum thickness of the insulator in a direction parallel to the second side of the Perovskite layer is 20nm µm.” It is unclear what the units of the dimension are or what is meant by “20nm µm” or how the units “nm µm” relate to a minimum “thickness.” For purposes of examination, “20nm µm” shall be read as “20 nm.”
Claim 6 recites the limitation “a second Perovskite layer with the first side and a second side opposite the first side” in ln. 10. There is insufficient antecedent basis for the limitation “the first side” in the claim. For examination purposes, the forgoing limitation shall be read as “a second Perovskite layer with a first side and a second side opposite the first side.”
Claims 7-11 depend from claim 6 and are rejected for the same reason(s) as claim 6.
Claim 22 recites the limitation “the electrode layer” in ll. 9 and 10. There is insufficient antecedent basis for this limitation in the claim. For examination purposes, the forgoing limitation shall be read as “the first electrode layer.”
Claims 23-25 depend from claim 22 and are rejected for the same reason(s) as claim 22.
Claim Rejections - 35 USC § 102
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1, 12, 22 and 24 are rejected under 35 U.S.C. 102(a)(1) and/or (a)(2) as being anticipated by Kim (US 20020063271 A1).
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ANNOTATED FIG. 1D OF KIM
Regarding claim 1, Kim discloses (see generally, e.g., annotated FIG. 1D herein):
A capacitor (CF2) comprising:
an electrode layer (39) with a first side (S1) and a second side (S2) opposite the first side (S1);
a Perovskite layer (38) with a first side (S1’) and a second side (S2’) opposite the first side (S1’), the first side (S1’) of the Perovskite layer (38) physically coupled with the second side (S2) of the electrode layer (39); and
an insulator (42’) directly physically coupled with an edge (E) of the electrode layer (39) between the first side (S1) of the electrode layer (39) and the second side (S2) of the electrode layer (39), and directly physically coupled with an edge (E’) of the Perovskite layer (38) between the first side (S1’) of the Perovskite layer (38) and the second side (S2’) of the Perovskite layer (38), wherein the insulator (42’) extends from the second side (S2’) of the Perovskite layer (38) to the first side (S1) of the electrode layer (39), and wherein the insulator (42’) has a top surface (TS) at a same level as a top surface (TS’) of the Perovskite dielectric layer (38).
Note, paragraph [0033] discloses that the layer (38) may have a perovskite structure.
Note also, when the device of FIG. 1D is inverted, the surfaces TS and TS’ are “top” surfaces.
Regarding claim 12, Kim discloses:
The capacitor (CF2) of claim 1, wherein the electrode layer (39) and the Perovskite layer (38) are substantially planar.
Regarding claim 22, Kim discloses (see generally, e.g., annotated FIG. 1D herein):
A package (FIG. 1D) comprising:
a substrate (10);
a capacitor (CF2) coupled with the substrate (10), the capacitor (CF2) comprising:
a first electrode layer (39) with a first side (S1) and a second side (S2) opposite the first side (S1), the first side (S1) of the first electrode layer (39) coupled with the substrate (10);
a Perovskite layer (38) with a first side (S1’) and a second side (S2’) opposite the first side (S1’), the first side (S1’) of the Perovskite layer (38) physically coupled with the second side (S2) of the first electrode layer (39);
an insulator (42’) directly physically coupled with an edge (E) of the electrode layer (39) between the first side (S1) of the first electrode layer (39) and the second side (S2) of the electrode layer (39), and directly physically coupled with an edge (E’) of the Perovskite layer (38) between the first side (S1’) of the Perovskite layer (38) and the second side (S2’) of the Perovskite layer (38), wherein the insulator (42’) extends from the second side (S2’) of the Perovskite layer (38) to the first side (S1) of the first electrode layer (39), and wherein the insulator (42’) has a top surface (TS) at a same level as a top surface (TS’) of the Perovskite layer (38); and
a second electrode layer (37) directly physically coupled with the second side (S2’) of the Perovskite layer (38), the second electrode layer (37) electrically isolated from the first electrode layer (39) by the insulator (42’).
Note, when the device of FIG. 1D is inverted, the surfaces TS and TS’ are “top” surfaces.
Regarding claim 24, Kim discloses:
The package (FIG. 1D) of claim 22, wherein the first electrode (39), the second electrode (37), and the Perovskite layer (38) are substantially planar.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 4-9 are rejected under 35 U.S.C. 103 as being unpatentable over Kim as applied to claim 1 above in view of Narwankar (US 20010043453 A1).
Regarding claim 4, Kim as applied to claim 1 discloses the capacitor of claim 1.
Kim does not explicitly disclose a seeding layer having a first side and a second side opposite the first side, the second side of the seeding layer directly physically coupled with the first side of the electrode layer; and
wherein the insulator is directly physically coupled with an edge of the seeding layer between the first side of the seeding layer and the second side of the seeding layer, and wherein the insulator extends from the second side of the Perovskite layer to the first side of the seeding layer.
However, in analogous art, Narwankar discloses (see generally, e.g., FIGS. 6A-6F) a capacitor (see, e.g., paragraphs [0066] et seq.) comprising a seeding layer (601a) having a first side (bottom) and a second side (top) opposite the first side (bottom), the second side (top) of the seeding layer (601a) directly physically coupled with the first side (bottom) of the electrode layer (601b).
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have included a seeding layer on the first side (S1) of the electrode layer (39) of Kim as taught by Narwankar according to known methods to yield predictable results, for example, in order to help facilitate formation of a further layers and allow the further layers to be formed with enhanced film properties such as improved surface smoothness and/or reduced haze. See, e.g., Narwankar, paragraph [0070].
Note, Kim discloses the insulator (42) extending entirely along the edges of layers 35 through 39. Accordingly, when Kim is modified in accordance with the teachings of Narwankar as described herein such that the seeding layer is co-extensive with the electrode layer 39, then all the claim limitation recited in the claim are met. That is to say, Kim in view of Narwankar discloses the seeding layer having a first side and a second side opposite the first side, the second side of the seeding layer directly physically coupled with the first side of the electrode layer; and wherein the insulator is directly physically coupled with an edge of the seeding layer between the first side of the seeding layer and the second side of the seeding layer, and wherein the insulator extends from the second side of the Perovskite layer to the first side of the seeding layer.
Regarding claim 5, Kim in view of Narwankar as applied to claim 4 discloses the capacitor of claim 4.
Kim further discloses wherein the electrode layer (39) is a first electrode layer (39); and further comprising:
a second electrode layer (37) with a first side (i.e., the side of layer 37 facing layer 38 – hereinafter S1’’) and a second side (i.e., the side of layer 37 facing layer 36 – hereinafter S2’’) opposite the first side (S1’’), the first side (S1’’) of the second electrode layer (37) physically coupled with the second side (S2’) of the Perovskite layer (38); and
wherein the first electrode layer (39) and the second electrode layer (37) are electrically isolated from each other by the insulator (42’).
Regarding claim 6, Kim in view of Narwankar as applied to claim 5 discloses the capacitor of claim 5.
Kim in view of Narwankar further discloses wherein the insulator (42’ - Kim) is a first insulator (42’ - Kim), the seeding layer (601a - Narwankar) is a first seeding layer (601a - Narwankar), and the Perovskite layer (38 - Kim) is a first Perovskite layer (28 - Kim).
Kim also discloses a plurality of stacked capacitors (CF1, CF2) and also further discloses: a second Perovskite layer (36) with a first side (lower side) and a second side (upper side) opposite the first side (lower side); and a second insulator (i.e., the portion of the insulating layer 42 – hereinafter referenced as 42’’ – on the right side of capacitors CF1 and/or CF2) directly physically coupled with an edge (right edge) of the second electrode layer (37) between the first side (lower side) of the second electrode layer (37) and the second side (upper side) of the second electrode layer (37), the second insulator (42’’) directly physically coupled with an edge (right edge) of the second Perovskite layer (36) between the first side (lower side) of the second Perovskite layer (36) and the second side (upper side) of the second Perovskite layer (36). Kim further discloses: a third electrode layer (35) with a first side (lower side) and a second side (upper side); the first side (lower side) of the second Perovskite layer (36) physically coupled with the second side (upper side) of the third electrode layer (35); and the second insulator (42’’) directly physically coupled with an edge (right edge) of the third electrode layer (35) between the first side (lower side) of the third electrode layer (35) and the second side (upper side) of the third electrode layer (35).
Kim does not explicitly disclose:
a second seeding layer with a first side and a second side opposite the first side, the first side of the second seeding layer physically coupled with the second side of the second electrode layer;
the first side of the third electrode layer physically coupled with the second side of the second seeding layer; and
the second insulator directly physically coupled with an edge of the second seeding layer between the first side of the second seeding layer and the second side of the second seeding layer.
However, in analogous art, Narwankar discloses (see generally, e.g., FIGS. 6A-6F) a capacitor (see, e.g., paragraphs [0066] et seq.) comprising a first seeding layer (601a) and a second seeding layer (see, e.g., paragraph [0086]).
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have used a second seeding layer with a first side and a second side opposite the first in the device of Kim as taught by Narwankar according to known methods to yield predictable results such that the first side of the second seeding layer was physically coupled with the second side of the second electrode layer, the first side of the third electrode layer was physically coupled with the second side of the second seeding layer and the second insulator was directly physically coupled with an edge of the second seeding layer between the first side of the second seeding layer and the second side of the second seeding layer, for example, in order to help facilitate formation of further layers with enhanced film properties such as improved surface smoothness and/or reduced haze. See, e.g., Narwankar, paragraph [0070].
Note, Kim discloses the second insulator (42’’) extending entirely along the right edges of layers 35 through 39. Accordingly, when Kim is modified in accordance with the teachings of Narwankar as described herein such that the second seeding layer is co-extensive with the aforementioned layers of Kim, then all the claim limitation recited in the claim are met. That is to say, Kim in view of Narwankar discloses: a second seeding layer (as disclosed by Narwankar) with a first side and a second side opposite the first side, the first side of the second seeding layer (as disclosed by Narwankar) physically coupled with the second side of the second electrode layer (37 - Kim); a third electrode layer (35 - Kim) with a first side and a second side opposite the first side, the first side of the third electrode layer (35 - Kim) physically coupled with the second side of the second seeding layer (as disclosed by Narwankar); a second Perovskite layer (36 - Kim) with the first side and a second side opposite the first side, the first side of the second Perovskite layer (36 - Kim) physically coupled with the second side of the third electrode layer (35 - Kim); and a second insulator (42’’ - Kim) directly physically coupled with an edge (right edge) of the second electrode layer (37 - Kim) between the first side of the second electrode layer (37 - Kim) and the second side of the second electrode layer (37 - Kim), the second insulator (42’’ - Kim) directly physically coupled with an edge (right edge) of the second seeding layer (as disclosed by Narwankar) between the first side of the second seeding layer (as disclosed by Narwankar) and the second side of the second seeding layer (as disclosed by Narwankar), the second insulator (42’’ - Kim) directly physically coupled with an edge (right edge) of the third electrode layer (35 - Kim) between the first side of the third electrode layer (35 - Kim) and the second side of the third electrode layer (35 - Kim), the second insulator (42’’ - Kim) directly physically coupled with an edge (right edge) of the second Perovskite layer (36 - Kim) between the first side of the second Perovskite layer (36 - Kim) and the second side of the second Perovskite layer (36 - Kim).
Regarding claim 7, Kim in view of Narwankar as applied to claim 6 discloses the capacitor of claim 6.
Kim further discloses wherein the second insulator (42’’) extends from the second side of the second Perovskite layer (38) to the first side of the second electrode layer (37).
Regarding claim 8, Kim in view of Narwankar as applied to claim 6 discloses the capacitor of claim 6.
Kim does not explicitly disclose wherein the second insulator is directly physically coupled with the second side of the first Perovskite layer.
However, it would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have shortened the layers (35, 36, 37) of Kim on the right ends thereof according to known methods to yield predictable results, for example, in order to use less material for the respective layers (35, 36, 37). Accordingly, the second side (S2’) of the first Perovskite layer (38) at the right end thereof would be exposed, i.e., not covered by layers (35, 36, 37), such that the second insulator (42’’) (which is otherwise conformally disposed) is directly physically coupled with the second side (S2’) of the first Perovskite layer (38).
Note, changes in shape, size and/or relative dimensions (e.g., such as changing the shape, size and/or relative dimensions of the layers (35, 36, 37) of Kim as proposed herein) normally require only ordinary skill in the art and hence are considered routine expedients. See, e.g., MPEP §2144.04(IV). There is no evidence on record that the claimed configuration of the second insulator being directly physically coupled with the second side of the first Perovskite layer is particularly significant or critical or that the claimed device would perform differently than the prior art device.
Regarding claim 9, Kim in view of Narwankar as applied to claim 6 discloses the capacitor of claim 6.
Kim further discloses wherein the first insulator (42’) and the second insulator (42’’) are separate and distinct. See, e.g., FIG. 1D.
Claims 10 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Narwankar as applied to claim 6 above, and further in view of Won (US 20050167722 A1).
Regarding claim 10, Kim in view of Narwankar as applied to claim 6 discloses the capacitor of claim 6.
Kim does not explicitly disclose:
a fourth electrode layer with a first side and a second side opposite the first side, the first side of the fourth electrode layer physically coupled with the second side of the second Perovskite layer; and
wherein the second insulator electrically isolates the fourth electrode layer and the third electrode layer from each other.
However, in analogous art, Won discloses a semiconductor device having a dual stacked MIM capacitor. See, e.g., Abstract and FIG. 8. In particular, Won discloses an intermediate electrode (32a) between capacitor dielectric layers (29 and 43). The intermediate electrode (32a) includes outer electrode layers (31a and 35a) and an inner electrode layer (33a). Won discloses that the three layers of the intermediate electrode (32a) results in reduced resistance, which provides a capacitor having excellent operating properties at a high frequency. See, e.g., paragraph [0023].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have used an intermediate electrode (32a) as taught by Won (or the like) for the electrode layer (37) of Kim (i.e., as modified in accordance with the teachings of Narwankar as described above) according to known methods to yield predictable results, for example, in order to help reduce resistance and provide a capacitor having excellent operating properties at a high frequency. See, e.g., Won, paragraph [0023].
Notably, when so modified, the outer layers (35a and 31a) of the intermediate electrode (32a) (i.e., as disclosed by Won and incorporated as the electrode layer (37) of Kim) read on the claimed second electrode layer and third electrode layer, the electrode layer (39) of Kim reads on the claimed first electrode layer, and the electrode layer (35) of Kim reads on the claimed fourth electrode layer.
Note also, when so constituted, the fourth electrode layer (35) of Kim has opposing first and second sides wherein the first side is physically coupled with the second side of the second Perovskite layer (36) of Kim. Kim further discloses that the second insulating layer 42’’ electrically isolates the fourth electrode layer (35) of Kim and the third electrode layer (e.g., the electrode layer (31a) disclosed by Won and incorporated as the electrode layer (37) of Kim) from each other.
Regarding claim 11, Kim in view of Narwankar and Won as applied to claim 10 discloses the capacitor of claim 10.
Kim further discloses wherein the fourth electrode layer (35) and the first electrode layer (39) are electrically coupled (e.g., through metal interconnection 45, contact plug 30b, switching element T2, switching element T1, and contact plug 30a) wherein the third electrode layer (i.e., electrode layer 31a of Won, included in Kim according to the modification proposed herein above) and the second electrode layer (i.e., electrode layer 35a of Won, included in Kim according to the modification proposed herein above) are electrically coupled (e.g., through electrode layer 33a of Won, included in Kim according to the modification proposed herein above), wherein the first electrode layer (39 - Kim) and the second electrode layer (35a - Won) are electrically isolated from each other by the first Perovskite layer (38 - Kim), and wherein the third electrode layer (31a - Won) and the fourth electrode layer (35 - Kim) are electrically isolated from each other by the second Perovskite layer (36 - Kim).
Claims 1-3, 13-16 and 22-23 are rejected under 35 U.S.C. 103 as being unpatentable over Tu (US 20040075129 A1).
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ANNOTATED FIG. 10 OF TU
Regarding claim 1, Tu discloses (see generally, e.g., annotated FIG. 10 herein):
A capacitor (20a, 22a, 24a) comprising:
an electrode layer (24a) with a first side (S1) and a second side (S2) opposite the first side (S1);
a capacitor dielectric layer (22a) with a first side (S1’) and a second side (S2’) opposite the first side (S1’), the first side (S1’) of the capacitor dielectric layer (22a) physically coupled with the second side (S2) of the electrode layer (24a); and
an insulator (30b) directly physically coupled with an edge (E) of the electrode layer (24a) between the first side (S1) of the electrode layer (24a) and the second side (S2) of the electrode layer (24a), and directly physically coupled with an edge (E’) of the capacitor dielectric layer (22a) between the first side (S1’) of the capacitor dielectric layer (22a) and the second side (S2’) of the capacitor dielectric layer (22a), wherein the insulator (30b) extends from the second side (S2’) of the capacitor dielectric layer (22a) to the first side (S1) of the electrode layer (24a), and wherein the insulator (30b) has a top surface (TS) at a same level as a top surface (TS’) of the capacitor dielectric layer (22a).
Note, when the device of FIG. 10 is inverted, the surfaces TS and TS’ are “top” surfaces.
Tu does not appear to explicitly disclose that the capacitor dielectric layer (22a) of the embodiment shown in FIG. 10 is a Perovskite material.
However, Tu does disclose that, in the embodiment of FIG. 1, the capacitor dielectric layer (44) may be “formed of comparatively higher dielectric constant dielectric material” such as “lead zirconate titanate” (PZT), i.e., a Perovskite material. See, e.g., paragraph [0025].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have used a Perovskite material such as PZT for the capacitor dielectric layer (22a) of Tu as taught in connection with the embodiment in FIG. 1 of Tu according to known methods to yield predictable results, for example, to increase the capacitance of the capacitor by using a comparatively higher dielectric constant dielectric material such as PZT for the capacitor dielectric layer.
Regarding claim 2, Tu further discloses:
The capacitor (20a, 22a, 24a) of claim 1, wherein the insulator (30b) completely covers the edge (E) of the electrode layer (24a) and the edge (E’) of the Perovskite layer (22a).
Regarding claim 3, Tu further discloses:
The capacitor (20a, 22a, 24a) of claim 1, wherein a minimum thickness of the insulator (30b) in a direction (horizontal) parallel to the second side (S2’) of the Perovskite layer (22a) is 20nm µm. See, e.g., paragraph [0054].
Regarding claim 13, Tu further discloses:
The capacitor (20a, 22a, 24a) of claim 1, wherein the insulator (30b) includes a selected one or more of: silicon, nitrogen, or oxygen. See, e.g., paragraph [0054].
Regarding claim 14, Tu further discloses:
The capacitor (20a, 22a, 24a) of claim 1, wherein the Perovskite layer (22a) includes a selected one or more of strontium, barium, titanium, oxygen, or lead. See, e.g., paragraph [0025].
Regarding claim 15, Tu further discloses:
The capacitor (20a, 22a, 24a) of claim 1, wherein a thickness of the electrode layer (24a) from the first side (S1) to the second side (S2) ranges from 5nm to 50nm. See, e.g., paragraph [0048].
Regarding claim 16, Tu further discloses:
The capacitor (20a, 22a, 24a) of claim 1, wherein a thickness of the Perovskite layer (22a) from the first side (S1’) to the second side (S2’) ranges from 5nm to 50nm. See, e.g., paragraph [0047].
Regarding claim 22, Tu discloses (see generally, e.g., annotated FIG. 10 herein):
A package (FIG. 10) comprising:
a substrate (10);
a capacitor (20a, 22a, 24a – hereinafter collectively “CAP”) coupled with the substrate (10), the capacitor (CAP) comprising:
a first electrode layer (24a) with a first side (S1) and a second side (S2) opposite the first side (S1), the first side (S1) of the first electrode layer (24a) coupled with the substrate (10);
a capacitor dielectric layer (22a) with a first side (S1’) and a second side (S2’) opposite the first side (S1’), the first side (S1’) of the capacitor dielectric layer (22a) physically coupled with the second side (S2) of the first electrode layer (24a);
an insulator (30b) directly physically coupled with an edge (E) of the electrode layer (24a) between the first side (S1) of the first electrode layer (24a) and the second side (S2) of the electrode layer (24a), and directly physically coupled with an edge (E’) of the capacitor dielectric layer (22a) between the first side (S1’) of the capacitor dielectric layer (22a) and the second side (S2’) of the capacitor dielectric layer (22a), wherein the insulator (30b) extends from the second side (S2’) of the capacitor dielectric layer (22a) to the first side (S1) of the first electrode layer (24a), and wherein the insulator (30b) has a top surface (TS) at a same level as a top surface (TS’) of the capacitor dielectric layer (22a); and
a second electrode layer (20a) directly physically coupled with the second side (S2’) of the capacitor dielectric layer (22a), the second electrode layer (20a) electrically isolated from the first electrode layer (24a) by the insulator (30b).
Note, when the device of FIG. 10 is inverted, the surfaces TS and TS’ are “top” surfaces.
Note also, the insulator (30b) does not provide a current or voltage path between the first electrode layer (24a) and the second electrode layer (20a). Accordingly, the insulator (30b) provides electrical isolation between the first electrode layer (24a) and the second electrode layer (20a), e.g., along with isolation region (12a’) and dielectric layer (14’).
Tu does not appear to explicitly disclose that the capacitor dielectric layer (22a) of the embodiment shown in FIG. 10 is a Perovskite material.
However, Tu does disclose that, in the embodiment of FIG. 1, the capacitor dielectric layer (44) may be “formed of comparatively higher dielectric constant dielectric material” such as “lead zirconate titanate” (PZT), i.e., a Perovskite material. See, e.g., paragraph [0025].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have used a Perovskite material such as PZT for the capacitor dielectric layer (22a) of Tu as taught in connection with the embodiment in FIG. 1 of Tu according to known methods to yield predictable results, for example, to increase the capacitance of the capacitor by using a comparatively higher dielectric constant dielectric material such as PZT for the capacitor dielectric layer.
Regarding claim 23, Tu further discloses:
The package (FIG. 10) of claim 22, wherein the insulator (30b) includes a selected one or more of: silicon, nitrogen, or oxygen. See, e.g., paragraph [0054].
Claims 4 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Tu as applied to claim 1 above in view of Dory (US 20060063379 A1) and Narwankar.
Regarding claim 4, Tu as applied to claim 1 discloses the capacitor of claim 1.
Tu discloses a layer (26a), having a first side (S1’’) and a second side (S2’’) opposite the first side (S1’), the second side (S2’’) of the layer (26a) directly physically coupled with the first side (S1) of the electrode layer (24a); and
wherein the insulator (30b) is directly physically coupled with an edge (E’’) of the layer (26a) between the first side (S1’’) of the layer (26a) and the second side (S2’’) of the layer (26a), and wherein the insulator (30b) extends from the second side (S2’) of the Perovskite layer (22a) to the first side (S1’’) of the layer (26a).
While Tu discloses the layer (26a) as a “barrier layer” (see, e.g., paragraph [0052]), Tu does not explicitly disclose that the layer (26a) also functions as a seeding layer.
However, in analogous art, Dory discloses (see generally, e.g., FIG. 3) a layer (14) that serves the dual function of a barrier layer and a seeding layer. See, e.g., paragraph [0016].
Additionally, in analogous art, Narwankar discloses (see generally, e.g., FIGS. 6A-6F) a capacitor (see, e.g., paragraphs [0066] et seq.) comprising a seeding layer (601a) and that the seeding layer aids subsequent formation of a further layer and allows the further layer to be formed with enhanced film properties such as improved surface smoothness and reduced haze. See, e.g., Narwankar, paragraph [0070].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made the barrier layer (26a) of Tu also function as a seeding layer as taught by Dory according to known methods to yield predictable results, for example, in order to eliminate the need for an additional seeding layer while still allowing formation of a further layer with improved surface smoothness and/or reduced haze.
Regarding claim 5, Tu in view of Dory and Narwankar as applied to claim 4 discloses the capacitor of claim 4.
Tu further discloses wherein the electrode layer (24a) is a first electrode layer (24a); and further comprising:
a second electrode layer (20a) with a first side (S1’’’) and a second side (S2’’’) opposite the first side (S1’’’), the first side (S1’’’) of the second electrode layer (20a) physically coupled with the second side (S2’) of the Perovskite layer (22a); and
wherein the first electrode layer (24a) and the second electrode layer (20a) are electrically isolated from each other by the insulator (30b).
Note also, the insulator (30b) does not provide a current or voltage path between the first electrode layer (24a) and the second electrode layer (20a). Accordingly, the insulator (30b) provides electrical isolation between the first electrode layer (24a) and the second electrode layer (20a), e.g., along with isolation region (12a’) and dielectric layer (14’).
Claim 25 is rejected under 35 U.S.C. 103 as being unpatentable over Tu as applied to claim 22 above in view of Chu (US 20110164345 A1).
Regarding claim 25, Tu as applied to claim 22 discloses the package of claim 22.
While Tu does disclose first and second electrode layers (24a, 20a), Tu does not explicitly disclose wherein the electrode layers include copper.
However, in analogous art, Chu disclose a MIM capacitor with first and second electrode layers (104, 108) that include copper. See, e.g., Abstract, FIG. 4 and paragraph [0020].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have included copper in the first and second electrode layers (24a, 20a) of Tu as taught by Chu according to known methods to yield predictable results, for example, in order to use a readily available, inexpensive and/or otherwise suitable material (i.e., copper) for its intended purpose as capacitor electrodes, e.g., due to its “lower resistivity and a higher resistance for electro-migration.” Chu, paragraph [0006].
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN P CORNELY whose telephone number is (571)272-4172. The examiner can normally be reached Monday - Thursday 8:30 AM - 4:00 PM.
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JOHN P. CORNELY
Examiner
Art Unit 2812
/J.P.C./Examiner, Art Unit 2812
/DAVIENNE N MONBLEAU/Supervisory Patent Examiner, Art Unit 2812