Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10/15/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5, and 8-23 are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 20210005592 A1).
Regarding independent claim 1, Lee discloses a die (Fig. 44: 326), comprising:
a substrate (2, as shown with enhanced detail in Fig. 34C) with a first surface (see annotated Fig. 44) and a second surface (see annotated Fig. 44) opposite from the first surface, wherein the substrate comprises a semiconductor material ([0596]: “a semiconductor substrate”);
first bumps (6a, encircled in region A) with a first pitch (the first pitch is shown to match the pitch of the bumps of die 467; [0619]: “20 to 150 micrometers”) on the first surface of the substrate, wherein individual ones of the first bumps have a first width (the first width matches the width of the bumps of die 467. See additional remarks and annotations below regarding the dimensions of the bumps of die 467);
a first layer (52, the region corresponding to the first bumps, the region encircled as A) that surrounds the first bumps (horizontally surrounds), wherein the first layer comprises a dielectric material ([0609]: “a silicon-oxide layer”) having an outermost surface (the surface of 52 at the first surface) at a same level (the level of the first surface) as an outermost surface of the first bumps (the surface of 6a at the first surface), and the dielectric material of the first layer having an innermost surface (see annotated Fig. 44) at a same level (vertical level) as an innermost surface of the first bumps (see annotated Fig. 44);
second bumps (6a, encircled in region B) with a second pitch (the second pitch is shown to match the pitch of the bumps of die 100) on the substrate, wherein the second pitch is greater than the first pitch (“greater” is shown by the greatly exaggerated difference in spacing between 6a of groups A and B. See additional remarks below regarding differences in pitch),
and wherein individual ones of the second bumps have a second width (Note: The second bumps have a structure substantially similar to the first bumps and the bumps of die 467. Thus, the dimensions of these bumps reasonably apply in the same way to “the second width” of the second bumps. See additional remarks and annotations below regarding the dimensions of the bumps) greater than the first width (“greater” is shown by the greatly exaggerated difference in sizes of 6a of groups A and B. See additional remarks below regarding differences in width);
and a second layer (52, the portion encircled in region B. Note: regions A and B of the same layer 52 is consistent with Applicant’s disclosed embodiment of Fig. 1B that shows a single layer 123 with two regions surrounding bumps 124 and 126) that surrounds the second bumps (horizontally surrounds), wherein the second layer comprises a dielectric material ([0609]: “a silicon-oxide layer”) having an outermost surface (the surface of 52 at the first surface) at a same level (the level of the first surface) as an outermost surface of the second bumps (the surface of 6a at the first surface), and the dielectric material of the second layer having an innermost surface (see annotated Fig. 44) at a same level (vertical level) as an innermost surface of the second bumps (see annotated Fig. 44).
Further as to claim 1, regarding the relation of the second and first pitches, i.e. “the second pitch is greater than the first pitch”: although Lee failed to expressly disclose the range of the second pitch, or the pitch relation, it has been held that dimensional differences will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such pitches and relations are critical. Lee illustrates the second bumps (having the second pitch) are structurally similar to the first bumps (forming the first pitch), though with a different spatial arrangement and configured towards different dies (Fig. 44: the first bumps are configured among dies 467/326, and the second bumps are configured among dies 100/326). Thus, it is reasonable to expect similar properties (such as pitch range) between the first and second bumps (the pitch range of [0619]: “20 to 150 micrometers”); and it is reasonable to expect different properties between the first and second bumps because these bump groupings are configured towards different dies. Therefore, the pitch range disclosed by Lee includes a plurality of values capable of reading on the claimed pitch relation. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation". In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Further still regarding the relation of the second and first pitches, i.e. “the second pitch is greater than the first pitch”: although Lee failed to expressly disclose the pitch relation, the pitch range disclosed by Lee includes a plurality of values capable of reading on the claimed pitch relation by including values capable of satisfying all 3 possible pitch relations: greater than, less than, and the same. MPEP 2143 (I)(E) Finite Number of suitable relations.
Further still as to claim 1, regarding “the first width” and “the second width”, Lee fails to explicitly disclose width of “the first bumps” and “the second bumps” (Fig. 44: 6a of 326, groups A and B) but implicitly discloses width for the bumps of die 467 (Fig. 35B: 6a) by disclosing bump pitch ([0619]: “pitch WPp…may range from 20 to 150 micrometers”; Fig. 35B: WPp, see annotated Fig. 44 below. Note: The pitches of Lee are interpreted consistent with Figs. 1A and 1B: P1, P2 of the disclosure, and consistent with the plain and ordinary meaning of pitch) and bump spacing ([0619]: “space WPsptsv…may range from 20 to 150 micrometers”; Fig. 35B: WPsptsv). Width is implicitly disclosed using the plain and ordinary formula relating width, pitch, and spacing:
W
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=
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c
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-
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p
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(see annotated Fig. 35B). As reasoned above, the dimensions of the bumps of die 467 may reasonably apply to the first and second bumps because: Lee shows the first bumps having pitch and width matching the bumps of die 467 (Fig. 44: the first pitch and width match the bumps of die 467); and because the second bumps are shown structurally similar to the first bumps (Fig. 44). Therefore, the width range implicitly disclosed by Lee includes a plurality of values capable of reading on the claimed width relation. MPEP 2144.01 Implicit Disclosure.
Since the applicants have not established the criticality (see paragraph below) of the pitch and width relation claimed and the Prior Art shows that the first and second pitches and widths are different in the same way claimed, it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date to select suitable pitches and widths (i.e. dimensions) for the first and second pitches and widths of Lee. MPEP 2144.05.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed pitch and width relation or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). MPEP 2144.05.
Illustrated below is a marked and annotated figures of Figs. 44 and 35B of Lee, and Fig. 34C of Lee.
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Regarding claim 2, Lee discloses the die of claim 1 (Fig. 44), wherein a number of the first bumps (4 are shown, when counting all 6a for the collection of all 467) is greater than a number of the second bumps (3 are shown, when counting only 6a for the 100 on the right).
Regarding claim 3, Lee discloses the die of claim 1 (Fig. 44), further comprising an active layer (4, as shown with enhanced detail in Fig. 34C) between the first surface and the second surface of the substrate (vertically between), wherein the active layer comprises a transistor device (a transistor is illustrated in Fig. 34C; [0597]: “p-channel and/or n-channel MOS devices”).
Regarding claim 4, Lee discloses the die of claim 3 (Fig. 44), wherein the transistor device is part of active circuitry (the transistor is connected to the circuitry within die 100, and is therefore part of the circuitry of die 100) that is configured to provide serialization or deserialization of signals between the first bumps and the second bumps ([0538]: die 100 is also annotated as die 411 and is “configured for serial-advanced-technology-attachment (SATA) ports”).
Regarding claim 5, Lee discloses the die of claim 3 (Fig. 44), wherein the transistor device is part of active circuitry (the transistor is connected to the circuitry within die 100, and is therefore part of the circuitry of die 100) that is configured to change a voltage or a frequency of a signal sent between the first bumps and the second bumps ([0538]: die 100 is also annotated as die 411 and is “configured to regulate a voltage”, i.e., “change a voltage”).
Regarding claim 8, Lee discloses the die of claim 1 (Fig. 44), wherein the second bumps are on the first surface of the substrate (the grouping of bumps selected in the claim 1 rejection are exposed at the first surface, therefore “on”).
Regarding claim 9, Lee discloses the die of claim 8 (Fig. 34C), further comprising: conductive traces in the substrate (traces 6 within die portion 20) to electrically couple the first bumps (each bump 6a connects to a trace 6) [and] the second bumps (each bump 6a connects to a trace 6).
Lee fails to expressly illustrate the conductive traces “electrically couple the first bumps to the second bumps”.
However, Lee teaches conductive trace shape variations (Fig. 34C) wherein some conductive traces are not connected to bumps (at least one trace 6 is not connected to a bump 6a). Lee discloses other conductive trace shape variations (Fig. 34D), wherein some conductive traces interconnect bumps (See annotated Fig. 34D). Lee discloses additional conductive trace variations (Fig. 44: traces 67 within structure 551) wherein A) some conductive traces connect to only one bump of a single die (at least one bump 563 of die 100 is connected to trace 67, see annotated Fig. 44); B) some conductive traces interconnect bumps of a single die (at least two bumps 563 of die 100 are interconnected by trace 67, see annotated Fig. 44); and C) some conductive traces interconnect bumps of a plurality of dies (at least two bumps 563 of dies 411 and 251 are interconnected by trace 67, see annotated Fig. 44).
Further as to claim 9, with respect to the shape of the conductive traces, i.e., “conductive traces in the substrate to electrically couple the first bumps to the second bumps”, it would have been an obvious matter of design choice for one of ordinary skill in the art before the effective filing date to adjust the shape of the conductive traces to be isolated from, separately connecting, or interconnecting the first and second bumps, as taught by Lee (see, e.g., Figs. 34C, 34D, 44) who teaches conductive traces shaped to have intended electrical paths. Moreover, a change in shape is a matter of design choice, which a person within the level of ordinary skill in the art before the effective filing date would have found to be obvious absent persuasive evidence that the claimed conductive trace shape was significant; and a change in shape is generally recognized as being within the level of ordinary skill in the art. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed conductive trace configuration because it is a variation in shape to have in intended electrical path. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). MPEP 2144.04 (IV)(B).
Illustrated below is a marked and annotated figure of Fig. 34D of Lee.
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Regarding claim 10, Lee discloses the die of claim 1 (Fig. 44), wherein the first pitch is approximately 20µm or smaller (the range cited in claim 1 has an overlapping endpoint at 20µm).
Regarding independent claim 11, Lee discloses a die module (Fig. 44), comprising: a first die (467), wherein the first die has first bumps (6a of die 467, encircled in region A) with a first pitch ([0619]: “20 to 150 micrometers”);
a second die (326) coupled to the first die (directly coupled),
wherein the second die has second bumps (all 6a of die 326) with the first pitch (the pitch of the subset encircled in region A matches the pitch of the first bumps) and third bumps (the subset of 6a encircled in region B of 326) with a second pitch (the second pitch is shown matching the pitch of the bumps 6a of die 100) that is greater than the first pitch (“greater” is shown by the greatly exaggerated difference in spacing between 6a of groups A and B. See additional remarks below regarding differences in pitch),
wherein the second bumps are bonded to the first bumps on the first die (directly bonded),
wherein individual ones of the second bumps have a first width (choosing the subset of region A, where the first width matches the width of the bumps of die 467. See additional remarks and annotations below regarding the dimensions of the bumps of die 467), and wherein individual ones of the second bumps have a second width (choosing the subset of region B, where the second width matches the width of the bumps of die 100. Note: Subsets A and B of the second bumps have a structure substantially similar to the bumps of die 467. Thus, the dimensions of these bumps reasonably apply in the same way to “the second width” of the second bumps. See additional remarks and annotations below regarding the dimensions of the bumps) greater than the first width (“greater” is shown by the greatly exaggerated difference in sizes of 6a of groups A and B. See additional remarks below regarding differences in width),
a first layer (52, the portion of 52 encircled in region A) that surrounds the second bumps (horizontally surrounds),
wherein the first layer comprises a dielectric material ([0609]: “a silicon-oxide layer”) having an outermost surface at a same level as an outermost surface of the second bumps (see annotated figure, the surfaces are illustrated vertically coplanar), and the dielectric material of the first layer having an innermost surface at a same level as an innermost surface of the second bumps (see annotated figure, the surfaces are illustrated vertically coplanar),
and a second layer (52, the portion encircled in region B. Note: regions A and B of the same layer 52 is consistent with Applicant’s disclosed embodiment of Fig. 1B that shows a single layer 123 with two regions surrounding bumps 124 and 126) that surrounds the third bumps (horizontally surrounds),
wherein the second layer comprises a dielectric material ([0609]: “a silicon-oxide layer”) having an outermost surface (the surface of 52 at the first surface) at a same level (the level of the first surface) as an outermost surface of the third bumps (the surface of 6a at the first surface), and the dielectric material of the second layer having an innermost surface (see annotated Fig. 44) at a same level (vertical level) as an innermost surface of the third bumps (see annotated Fig. 44);
and a third die (100) coupled to the second die (directly coupled),
wherein the third die has fourth bumps (6a of die 100, encircled in region B) with the second pitch (the second pitch has been cited above as the pitch of the bumps 6a of die 100),
wherein the fourth bumps are bonded to the third bumps on the second die (directly bonded).
Further as to claim 11, regarding the relation of the second and first pitches, i.e. “a second pitch that is greater than the first pitch”: although Lee failed to expressly disclose the range of the second pitch, or the pitch relation, it has been held that dimensional differences will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such pitches and relations are critical. Lee illustrates the second bumps (having the second pitch) are structurally similar to the first bumps (forming the first pitch), though with a different spatial arrangement and configured towards different dies (Fig. 44: the first bumps are configured among dies 467/326, and the second bumps are configured among dies 100/326). Thus, it is reasonable to expect similar properties (such as pitch range) between the first and second bumps (the pitch range of [0619]: “20 to 150 micrometers”); and it is reasonable to expect different properties between the first and second bumps because these bump groupings are configured towards different dies. Therefore, the pitch range disclosed by Lee includes a plurality of values capable of reading on the claimed pitch relation. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation". In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Further still regarding the relation of the second and first pitches, i.e. “a second pitch that is greater than the first pitch”: although Lee failed to expressly disclose the pitch relation, the pitch range disclosed by Lee includes a plurality of values capable of reading on the claimed pitch relation by including values capable of satisfying all 3 possible pitch relations: greater than, less than, and the same. MPEP 2143 (I)(E) Finite Number of suitable relations.
Further still as to claim 11, regarding “the first width” and “a second width”, Lee fails to explicitly disclose width of “individual ones of the second bumps” and “individual ones of the second bumps” (Fig. 44: 6a of 326, groups A and B) but implicitly discloses width for the bumps of die 467 (Fig. 35B: 6a) by disclosing bump pitch ([0619]: “pitch WPp…may range from 20 to 150 micrometers”; Fig. 35B: WPp, see annotated Fig. 44 below. Note: The pitches of Lee are interpreted consistent with Figs. 1A and 1B: P1, P2 of the disclosure, and consistent with the plain and ordinary meaning of pitch) and bump spacing ([0619]: “space WPsptsv…may range from 20 to 150 micrometers”; Fig. 35B: WPsptsv). Width is implicitly disclosed using the plain and ordinary formula relating width, pitch, and spacing:
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(see annotated Fig. 35B). As reasoned above, the dimensions of the bumps of die 467 may reasonably apply to the second bumps and the second bump subsets because: Lee shows the second bumps (subset of region A) having pitch and width matching the bumps of die 467 (Fig. 44: the first pitch and width match the bumps of die 467); and because the second bumps (subset of region B) are shown structurally similar to the first bumps (Fig. 44). Therefore, the width range implicitly disclosed by Lee includes a plurality of values capable of reading on the claimed width relation. MPEP 2144.01 Implicit Disclosure.
Since the applicants have not established the criticality (see paragraph below) of the pitch and width relation claimed and the Prior Art shows that the first and second pitches and widths are different in the same way claimed, it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date to select suitable pitches and widths (i.e. dimensions) for the first and second pitches and widths of Lee. MPEP 2144.05.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed pitch and width relation or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). MPEP 2144.05.
Regarding claim 12, Lee discloses the die module of claim 14 (Fig. 44), wherein the second die is over the first die (over in the vertical direction), and wherein the third die is over the second die (over in the vertical direction).
Regarding claim 13, Lee discloses a die module (Fig. 44), wherein the third die is adjacent to the first die (horizontally adjacent), and wherein the second die is under the first die and the third die (under in the vertical direction).
Regarding claim 14, Lee discloses a die module (Fig. 44), wherein the second die comprises active circuitry (4, as shown with enhanced detail in Fig. 34C) with a transistor device (a transistor is illustrated in Fig. 34C; [0597]: “p-channel and/or n-channel MOS devices”).
Regarding claim 15, Lee discloses the die module of claim 14 (Fig. 44), wherein the transistor device is part of circuitry (the transistor of die 326 is connected to the circuitry within die 100, and is therefore part of the circuitry of die 100) configured to change a frequency of a signal sent between the first die and the third die ([0538]: die 100 is also annotated as die 411 and is configured with “mixed-mode signal circuits, radio-frequency (RF) circuits, and/or transmitter, receiver, transceiver circuits”. The circuitry of the second die 326 is illustrated spatially between the first and third dies 467/100, and thus operates on signals sent to this in-between space.).
Regarding claim 16, Lee discloses the die module of claim 14 (Fig. 44), wherein the transistor device is part of circuitry (the transistor of die 326 is connected to the circuitry within die 100, and is therefore part of the circuitry of die 100) configured to change a voltage of a signal sent between the first die and the third die ([0538]: die 100 is also annotated as die 411 and is “configured to regulate a voltage”, i.e., change a voltage. The circuitry of the second die 326 is illustrated spatially between the first and third dies 467/100, and thus operates on signals sent to this in-between space.).
Regarding claim 17, Lee discloses a die module (Fig. 44), wherein the transistor device is part of circuitry (the transistor of die 326 is connected to the circuitry within die 100, and is therefore part of the circuitry of die 100) configured to provide serialization or deserialization of signals sent between the first die and the third die ([0538]: die 100 is also annotated as die 411 and is “configured for serial-advanced-technology-attachment (SATA) ports”, i.e., change a voltage. The circuitry of the second die 326 is illustrated spatially between the first and third dies 467/100, and thus operates on signals sent to this in-between space.).
Regarding claim 18, Lee discloses the die module of claim 11 (Fig. 44), wherein the first pitch is approximately 20µm or smaller (the range cited in claim 11 has an overlapping endpoint at 20µm).
Regarding claim 19, Lee discloses the die module of claim 11 (Fig. 44), wherein the second bumps are bonded to the first bumps with a hybrid bonding interconnect architecture (the first/second bumps and first/second layers cited in the claim 11 rejection collectively form a hybrid bonding architecture consistent with the ordinary and customary definition of hybrid bonding, and with Applicant’s disclosure in [0020]).
Regarding claim 20, Lee discloses the die module of claim 11 (Fig. 44), wherein the third bumps are bonded to the fourth bumps with a hybrid bonding interconnect architecture (the third/fourth bumps and first/second layers cited in the claim 11 rejection collectively form a hybrid bonding architecture consistent with the ordinary and customary definition of hybrid bonding, and with Applicant’s disclosure in [0020]).
Regarding claim 21, Lee discloses the die module of claim 11 (Fig. 44), further comprising: a fourth die (551) coupled to the first die; and a fifth die (537) coupled to the fourth die.
Regarding claim 22, Lee discloses the die module of claim 21 (Fig. 44), wherein the fourth die comprises fifth bumps (570) with a third pitch (the illustrated pitch) with the fifth bumps coupled to the first die (indirectly coupled through the internal wirings 67/558 within 551), and sixth bumps (563) with a fourth pitch (the illustrated pitch), wherein the fifth die is coupled to the sixth bumps (indirectly coupled through internal wirings 67/558 within 551).
Regarding claim 23, Lee discloses the die method of claim 22 (Fig. 44), wherein the fourth pitch is smaller than the third pitch (“smaller” is shown by the fourth pitch including a denser horizontal arrangement of 563 within a horizontal span of die 100, relative to a sparser arrangement of 570 within the same span. See annotated Fig. 44 for dashed reference lines of the span).
Regarding independent claim 24, Lee discloses an electronic system (Fig. 44), comprising:
a board (537);
a package substrate (551) coupled to the board (directly coupled);
and a die module (a collection of structures cited later) coupled to the package substrate (coupled by 563),
wherein the die module comprises: a first die (467),
wherein the first die has first bumps (6a, encircled in region A) with a first pitch ([0619]: “20 to 150 micrometers”);
a second die (326) coupled to the first die (directly coupled),
wherein the second die has second bumps (all 6a of die 326) with the first pitch (the pitch of the subset encircled in region A matches the pitch of the first bumps) and third bumps (the subset of 6a encircled in region B of 326) with a second pitch (the second pitch is shown to match the pitch of the bumps 6a of die 100) that is greater than the first pitch (“greater” is shown by the greatly exaggerated difference in spacing between 6a of groups A and B. See additional remarks below regarding differences in pitch),
wherein the second bumps are bonded to the first bumps on the first die (directly bonded),
wherein individual ones of the second bumps have a first width (choosing the subset of region A, where the first width matches the width of the bumps of die 467. See additional remarks and annotations below regarding the dimensions of the bumps of die 467), and wherein individual ones of the second bumps have a second width (choosing the subset of region B, where the second width matches the width of the bumps of die 100. Note: Subsets A and B of the second bumps have a structure substantially similar to the bumps of die 467. Thus, the dimensions of these bumps reasonably apply in the same way to “the second width” of the second bumps. See additional remarks and annotations below regarding the dimensions of the bumps) greater than the first width (“greater” is shown by the greatly exaggerated difference in sizes of 6a of groups A and B. See additional remarks below regarding differences in width),
a first layer (52, the portion of 52 encircled in region A) that surrounds the second bumps (horizontally surrounds),
wherein the first layer comprises a dielectric material ([0609]: “a silicon-oxide layer”) having an outermost surface at a same level as an outermost surface of the second bumps (see annotated figure, the surfaces are illustrated vertically coplanar), and the dielectric material of the first layer having an innermost surface at a same level as an innermost surface of the second bumps (see annotated figure, the surfaces are illustrated vertically coplanar),
and a second layer (52, the portion encircled in region B. Note: regions A and B of the same layer 52 is consistent with Applicant’s disclosed embodiment of Fig. 1B that shows a single layer 123 with two regions surrounding bumps 124 and 126) that surrounds the third bumps (horizontally surrounds),
wherein the second layer comprises a dielectric material ([0609]: “a silicon-oxide layer”) having an outermost surface (the surface of 52 at the first surface) at a same level (the level of the first surface) as an outermost surface of the third bumps (the surface of 6a at the first surface), and the dielectric material of the second layer having an innermost surface (see annotated Fig. 44) at a same level (vertical level) as an innermost surface of the third bumps (see annotated Fig. 44); and a third die (100) coupled to the second die (directly coupled), wherein the third die has fourth bumps (6a of die 100, encircled in region B) with the second pitch (the second pitch has been cited above as the pitch of the bumps 6a of die 100), wherein the fourth bumps are bonded to the third bumps on the second die (directly bonded).
Further as to claim 24, regarding the relation of the second and first pitches, i.e. “a second pitch that is greater than the first pitch”: although Lee failed to expressly disclose the range of the second pitch, or the pitch relation, it has been held that dimensional differences will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such pitches and relations are critical. Lee illustrates the second bumps (having the second pitch) are structurally similar to the first bumps (forming the first pitch), though with a different spatial arrangement and configured towards different dies (Fig. 44: the first bumps are configured among dies 467/326, and the second bumps are configured among dies 100/326). Thus, it is reasonable to expect similar properties (such as pitch range) between the first and second bumps (the pitch range of [0619]: “20 to 150 micrometers”); and it is reasonable to expect different properties between the first and second bumps because these bump groupings are configured towards different dies. Therefore, the pitch range disclosed by Lee includes a plurality of values capable of reading on the claimed pitch relation. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation". In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Further still regarding the relation of the second and first pitches, i.e. “a second pitch that is greater than the first pitch”: although Lee failed to expressly disclose the pitch relation, the pitch range disclosed by Lee includes a plurality of values capable of reading on the claimed pitch relation by including values capable of satisfying all 3 possible pitch relations: greater than, less than, and the same. MPEP 2143 (I)(E) Finite Number of suitable relations.
Further still as to claim 24, regarding “the first width” and “a second width”, Lee fails to explicitly disclose width of “individual ones of the second bumps” and “individual ones of the second bumps” (Fig. 44: 6a of 326, groups A and B) but implicitly discloses width for the bumps of die 467 (Fig. 35B: 6a) by disclosing bump pitch ([0619]: “pitch WPp…may range from 20 to 150 micrometers”; Fig. 35B: WPp, see annotated Fig. 44 below. Note: The pitches of Lee are interpreted consistent with Figs. 1A and 1B: P1, P2 of the disclosure, and consistent with the plain and ordinary meaning of pitch) and bump spacing ([0619]: “space WPsptsv…may range from 20 to 150 micrometers”; Fig. 35B: WPsptsv). Width is implicitly disclosed using the plain and ordinary formula relating width, pitch, and spacing:
W
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t
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(see annotated Fig. 35B). As reasoned above, the dimensions of the bumps of die 467 may reasonably apply to the second bumps and the second bump subsets because: Lee shows the second bumps (subset of region A) having pitch and width matching the bumps of die 467 (Fig. 44: the first pitch and width match the bumps of die 467); and because the second bumps (subset of region B) are shown structurally similar to the first bumps (Fig. 44). Therefore, the width range implicitly disclosed by Lee includes a plurality of values capable of reading on the claimed width relation. MPEP 2144.01 Implicit Disclosure.
Since the applicants have not established the criticality (see paragraph below) of the pitch and width relation claimed and the Prior Art shows that the first and second pitches and widths are different in the same way claimed, it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date to select suitable pitches and widths (i.e. dimensions) for the first and second pitches and widths of Lee. MPEP 2144.05.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed pitch and width relation or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). MPEP 2144.05.
Regarding claim 25, Lee discloses the electronic system of claim 24 (Fig. 44), wherein the second die is over the first die (vertically over) and the third die is over the second die (vertically over), or wherein the third die is adjacent to the first die and the second die is under the first die and the third die.
Claims 1 and 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Dabral (US 20230085890 A1).
Note that claim 1 was previously address above, however, it’s being addressed differently here based on the reading of the reference, particularly to the assignment of the dies and bumps in order to address the separate and distinct species of dependent claim 6.
Regarding independent claim 1, Lee discloses a die (Fig. 44: 100 also annotated as 411), comprising:
a substrate (2, as shown with enhanced detail in Fig. 34D) with a first surface (see annotated Fig. 44 below) and a second surface (see annotated Fig. 44 below) opposite from the first surface, wherein the substrate comprises a semiconductor material ([0596]: “a semiconductor substrate”);
first bumps (563 of die 100, encircled in region C) with a first pitch (horizontal pitch) on the first surface of the substrate, wherein individual ones of the first bumps have a first width (the first width is measured in the horizontal direction. See additional remarks and annotations below regarding the type and dimensions of the first bumps 563); […]
second bumps (6a of die 100, encircled in region C) with a second pitch (the second pitch is shown to match the pitch of the bumps of die 326) on the substrate, wherein the second pitch is greater than the first pitch (“greater” is shown by the second pitch of 6a including a sparser horizontal arrangement within region C of die 100, relative to a denser horizontal arrangement of 563 within the same region. See additional remarks below regarding differences in pitch),
and wherein individual ones of the second bumps have a second width (Note: The second bumps have a structure substantially similar to the bumps 6a of die 467. Thus, the dimensions of these bumps reasonably apply in the same way to “a second width” of the second bumps. See additional remarks and annotations below regarding the dimensions of the bumps) […];
and a second layer (52) that surrounds the second bumps (horizontally surrounds), wherein the second layer comprises a dielectric material ([0609]: “a silicon-oxide layer”) having an outermost surface (the surface of 52 at the second surface) at a same level (the level of the second surface) as an outermost surface of the second bumps (the surface of 6a at the second surface), and the dielectric material of the second layer having an innermost surface (see annotated Fig. 44 below) at a same level (vertical level) as an innermost surface of the second bumps (see annotated Fig. 44 below).
Illustrated below is a marked and annotated figure of Fig. 44 of Lee.
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Lee fails to teach combining the claimed first and second bump configurations for a single die. Thus, Lee fails to teach “a first layer that surrounds the first bumps, wherein the first layer comprises a dielectric material having an outermost surface at a same level as an outermost surface of the first bumps, and the dielectric material of the first layer having an innermost surface at a same level as an innermost surface of the first bumps” and “wherein individual ones of the second bumps have a second width greater than the first width”.
Dabral discloses a die with the claimed combination of first and second bump configuration (Fig. 14: 102A) with first bumps (174); a first layer (177; greater detail is shown in Fig. 1B) that surrounds the first bumps, wherein the first layer comprises a dielectric material ([0047]: “a back side passivation layer” must be a dielectric material to prevent shorting among the first bumps) having an outermost surface at a same level as an outermost surface of the first bumps (the surfaces are illustrated coplanar), and the dielectric material of the first layer having an innermost surface at a same level as an innermost surface of the first bumps (the surfaces are illustrated coplanar);
second bumps (112); and a second layer (139; greater detail is shown in Fig. 1B) that surrounds the second bumps, wherein the second layer comprises a dielectric material ([0051] “a dielectric material”) having an outermost surface at a same level as an outermost surface of the second bumps (the surfaces are illustrated coplanar), and the dielectric material of the second layer having an innermost surface at a same level as an innermost surface of the second bumps (the surfaces are illustrated coplanar). Thus, Dabral teaches bump configurations may include first and second bumps that are each coplanar with a dielectric material.
A person of ordinary skill in the art before the effective filing date could have modified the first bump configuration of Lee by substituting an alternative first bump configuration (i.e., bumps with a coplanar dielectric material), and would have had predictable results because this specific configuration was known in the art (Dabral). Doing so would arrive at the claimed bump and layer configuration. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed first and second bump and layer configurations because it is a substitution of bump configurations according to known configurations in the art. MPEP 2143 (I)(B).
Further as to claim 1, regarding the relation of the second and first pitches, i.e. “the second pitch is greater than the first pitch”: although Lee failed to expressly disclose the range of the first and second pitches, or the pitch relation, it has been held that dimensional differences will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such pitches and relations are critical. Lee in view of Dabral teaches the first and second bumps are structurally similar to the bumps of another die (Lee: Fig. 44: the first bumps are configured among dies 551/100, and the second bumps are configured among dies 100/326. These bumps 6a are structurally similar to the bumps 6a of another die 467), though with a different spatial arrangement and configured towards different dies. Thus, it is reasonable to expect similar properties (such as pitch range) between the first and second bumps (Lee: the pitch range of [0619]: “20 to 150 micrometers”); and it is reasonable to expect different properties between the first and second bumps because these bump groupings are configured towards different dies. Therefore, the pitch range disclosed by Lee includes a plurality of values capable of reading on the claimed pitch relation. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation". In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Further still regarding the relation of the second and first pitches, i.e. “the second pitch is greater than the first pitch”: although Lee in view of Dabral failed to expressly disclose the pitch relation, the pitch range disclosed by Lee includes a plurality of values capable of reading on the claimed pitch relation by including values capable of satisfying all 3 possible pitch relations: greater than, less than, and the same. MPEP 2143 (I)(E) Finite Number of suitable relations.
Further still as to claim 1, regarding “the first width” and “a second width”, Lee in view of Dabral fails to explicitly disclose width of “the first bumps” and “the second bumps” (Fig. 44: 6a/563 for 100, encircled in region C) but implicitly discloses width for the bumps of die 467 (Fig. 35B: 6a) by disclosing bump pitch ([0619]: “pitch WPp…may range from 20 to 150 micrometers”; Fig. 35B: WPp, see annotated Fig. 44 below. Note: The pitches of Lee are interpreted consistent with Figs. 1A and 1B: P1, P2 of the disclosure, and consistent with the plain and ordinary meaning of pitch) and bump spacing ([0619]: “space WPsptsv…may range from 20 to 150 micrometers”; Fig. 35B: WPsptsv). Width is implicitly disclosed using the plain and ordinary formula relating width, pitch, and spacing:
W
i
d
t
h
=
P
i
t
c
h
-
S
p
a
c
i
n
g
(see annotated Fig. 35B). As reasoned above, the dimensions of the bumps of die 467 may reasonably apply to the first and second bumps because: Lee in view of Dabral teaches the first and second bumps are structurally similar to the bumps of die 467 (Fig. 44). Therefore, the width range implicitly disclosed by Lee includes a plurality of values capable of reading on the claimed width relation. MPEP 2144.01 Implicit Disclosure.
Since the applicants have not established the criticality (see paragraph below) of the pitch and width relation claimed and the Prior Art shows that the first and second pitches and widths are different in the same way claimed, it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date to select suitable pitches and widths (i.e. dimensions) for the first and second pitches and widths of Lee. MPEP 2144.05.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed pitch and width relation or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). MPEP 2144.05.
Regarding claim 6, Lee in view of Dabral discloses the die of claim 1 (Lee:, Fig. 44), wherein the second bumps are on the second surface of the substrate (as cited in the claim 1 rejection).
Regarding claim 7, Lee in view of Dabral discloses the die of claim 6 (Lee: Fig. 44), further comprising: through substrate vias (TSVs) (157) through a thickness of the substrate to electrically couple first pads to second pads.
Response to Arguments
Applicant's arguments filed 11/3/2025 have been fully considered but they are not persuasive.
Applicant argues:
Applicant argues with respect to amended claims 1, 11, and 24 that “Lee fails to disclose each and every feature of Applicant’s claims”. Remarks at pg. 11.
Examiner’s reply:
The examiner disagrees and points to MPEP 2144 (I) Reasoned from Common Knowledge and MPEP 2144.01 Implicit Disclosure. Lee discloses bumps substantially similar to the claimed bumps, and implicitly discloses width ranges for these bumps by teaching all remaining ranges necessary to know the width (i.e., pitch and spacing). The examiner finds these widths reasonably applicable to the similar claimed bumps, and accordingly finds the claimed sizes and relations an obvious variation of the teachings of Lee.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/WILLIAM H ANDERSON/ Examiner, Art Unit 2817
/Kretelia Graham/ Supervisory Patent Examiner, Art Unit 2817
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