Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Status of Claims
Examiner notes that in the instant application:
-Claims 26-50 are pending.
-Claims 1-25 are cancelled.
-Claims 26 and 46 are amended.
-Claims 36-45 are withdrawn.
Response to Amendment
Examiner notes the reply filed on April 9, 2026 is not fully responsive (See MPEP 714.02) to the prior Office action because of the following omission(s) or matter(s):
-The response fails to specifically point out the support for any amendments made to the disclosure. In particular, no reference is made by the Applicant for where the amended limitations are taught by the instant specification, neither in the text nor in figures. See MPEP 2163.06.
Since the above-mentioned reply appears to be bona fide, and under the motivation of compact prosecution, Examiner accepts the amendments. An Office Action of the merit of the claims as presented follows.
Response to Arguments
Applicant’s amendments and arguments filed April 9, 2026 have been fully considered and are persuasive, the rejection has been updated to address the newly amended limitations.
Claim Rejections - 35 USC § 112(a)
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
Claims 26-35 and 46-50 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding Claim 26, the limitation “the gate structure having a lateral width along a direction from the source to the drain the same as a lateral width of the dielectric layer comprising oxygen along the direction from the source to the drain.” has no support from the Specification, neither in descriptions of the completed device nor from specific manufacturing steps. It is the Examiner’s understanding that this limitation is derived from Fig. 1, however Applicant explicitly states in Paragraph [0018] that “comparative sizes of layers should not be assumed from the Figures, and sizes, thicknesses, or dimensions may be assumed for some embodiments only where specifically indicated or discussed.”
Regarding Claims 27-35, they are rejected due to their dependence on Claim 26.
Regarding Claim 46, “the gate structure having a lateral width along a direction from the source to the drain the same as a lateral width of the second oxide layer along the direction from the source to the drain.” has no support from the Specification, neither in descriptions of the completed device nor from specific manufacturing steps. It is the Examiner’s understanding that this limitation is derived from Fig. 1, however Applicant explicitly states in Paragraph [0018] that “comparative sizes of layers should not be assumed from the Figures, and sizes, thicknesses, or dimensions may be assumed for some embodiments only where specifically indicated or discussed.”
Regarding Claims 47-50, they are rejected due to their dependence on Claim 46.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 26-30, 32-34, and 46-49 are rejected under 35 U.S.C. 103 as being unpatentable over Lilak et al. (U.S. Pub. 2020/0105891), hereinafter Lilak, in view of Frougier et al. (U.S. Pub. 2020/0066894), hereinafter Frougier. For clarity, a modified version of Lilak Fig. 2E, hereinafter Fig. M, which incorporates the teachings of Lilak Paragraphs [0057] and [0079] is provided below.
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Regarding Claim 26, Lilak teaches a semiconductor device (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) comprising:
-a gate all around (GAA) field effect transistor (FET) (‘transistor’ (270); Fig. M, Paragraph [0056]) that includes:
-a sub-channel (a portion of the substrate (202) located below (270); Fig.
M, Paragraph [0054]) in direct contact (Paragraph [0057]) with a source (‘EPI layer’ (232), e.g. the (232) on the left; Fig. M, Paragraph [0080]) and a drain ((232) on the right; Fig. 2E);
-a channel (consisting of an ‘interconnect’ (265) and a ‘transition layer’ (225)
above and below each interconnect (265) in the cross-sectional view of Fig. M; Fig. M, Paragraph [0079]) above the sub-channel (portion of (202)), the channel ((265) and (225)) coupled with the source (left (232)) and the drain (right (232)), wherein the channel includes a nanowire ((265); Paragraph [0034]); and
-a dielectric layer (bottom layer (230) as formed directly below (270) and not between (202) and (232); Fig. M, Paragraphs [0033], [0054], and [0057])
comprising oxygen (e.g. carbon-doped silicon oxide; Paragraph [0033]) on a side of the sub-channel (top surface of the portion of (202)) between the channel ((265) and (225)) and the sub-channel (portion of (202)), wherein the dielectric layer comprising oxygen (bottom (230)) includes a dopant (carbon), and wherein an entirety of the dielectric layer comprising oxygen (bottom (230)) is physically separated from (via the spacers (217), Paragraph [0079], Fig. M) the source (left (232)) and the drain (right (232)); and
-a gate structure (e.g. the bottom structure comprising dielectric (262) and gate metal (285); Fig. M, Paragraph [0054]) between the channel ((265) and (225)) and the dielectric layer comprising oxygen (230), the gate structure comprising a gate dielectric (262) and a gate electrode (285),
Lilak does not explicitly teach:
-and the gate structure having a lateral width along a direction from the source to the drain the same as a lateral width of the dielectric layer comprising oxygen along the direction from the source to the drain.
Frougier teaches a stacked field effect transistor ((54); Fig. 13, Paragraph [0034]) comprising a gate structure (e.g. bottom (52a) of (52); Fig. 13, Paragraph [0034]) between a channel ((10); Fig. 13, Paragraph [0012]) and a dielectric layer comprising oxygen ((22a); Fig. Paragraph 13, Paragraphs [0017] and [0018]), wherein:
- and the gate structure (52a) having a lateral width along a direction from the source to the drain (e.g. from an exterior (46) to an interior (46); Fig. 13, Paragraph [0030]) the same as a lateral width of the dielectric layer comprising oxygen (22a) along the direction from the source to the drain (e.g. from exterior to interior (46)). (See also formation in Fig. 6 Paragraph [0022])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Frougier into the device of Lilak such that it comprises the gate structure having a lateral width along a direction from the source to the drain the same as a lateral width of the dielectric layer comprising oxygen along the direction from the source to the drain. This would be due to the fact that doing so would produce the predictable result of incorporating applicable element geometry while using a method which avoids occlusion for spacer formation (Frougier, Paragraph [0004])
In the following dependent claim rejections, elements cited are to Lilak unless otherwise specified (i.e. (265) is Lilak, (265), while (Frougier, (52)) is Frougier, (52)).
Regarding Claim 27, Lilak as modified by Frougier teaches the semiconductor device (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) of Claim 26, wherein:
-the dopant includes carbon atoms (‘carbon-doped’; Paragraph [0033]).
Regarding Claim 28, Lilak as modified by Frougier teaches the semiconductor device (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) of Claim 26, wherein:
-the dopant (carbon) includes electrically active defects (adding carbon doping necessarily results in lowering the dielectric constant of silicon oxide, due to the presence of electrically active defects).
Regarding Claim 29, Lilak as modified by Frougier teaches the semiconductor device (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) of Claim 26, wherein:
-the channel ((265) and (225)) includes a second dielectric layer ((225)) that does not include the dopant (e.g. silicon dioxide; Paragraph [0045]).
Regarding Claim 30, Lilak as modified by Frougier teaches the semiconductor device (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) of Claim 29, wherein:
- the channel ((265) and (225)) includes a first side (e.g. top side relative to the vertical; Fig. M) and a second side opposite the first side (e.g. bottom side relative to the vertical; Fig. 2M); and wherein the second dielectric layer (225) is on the first side (top, above (265)) and the second side (bottom, below (265)) of the channel.
Regarding Claim 32, Lilak as modified by Frougier teaches the semiconductor device (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) of Claim 26, wherein:
-the channel ((265) and (225)) is a plurality of channels (e.g. the bottom, middle, and top groupings of (265) and (225)) above the sub-channel (portion of (202)).
Regarding Claim 33, Lilak as modified by Frougier teaches the apparatus (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) of Claim 26, wherein:
-the sub-channel (portion of (202)) includes silicon (e.g. silicon; Paragraph [0030])
Regarding Claim 34, Lilak as modified by Frougier teaches the apparatus (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) of Claim 26, wherein:
-the sub-channel (portion of (202)) is a portion of a substrate (totality of (202)).
Regarding Claim 46, Lilak teaches a (GAA) field effect transistor (FET) (‘transistor’ (270); Fig. M, Paragraph [0056]) comprising:
-a sub-channel (a portion of the substrate (202) located below (270); Fig. M, Paragraph [0054]);
-a plurality of channels (each consisting of an ‘interconnect’ (265); Fig. M, Paragraph
[0079]) above the sub-channel (portion of (202));
-a source (‘EPI layer’ (232), e.g. the (232) on the left; Fig. M, Paragraph [0080]) in direct contact (Paragraph [0057]) with the sub-channel (portion of (202)) and coupled with a portion, respectively, of the plurality of channels (each (265));
-a drain ((232) on the right; Fig. M) in direct contact (Paragraph [0057]) with the sub-channel (portion of (202)) and coupled with the plurality of channels (each (265));
-a first oxide layer (‘transition layers’ (225) of silicon dioxide; Fig. M, Paragraphs [0079] and [0045]) on each of the plurality of channels (each (265)); and
-a second oxide layer (carbon-doped silicon oxide layer (230) as formed directly below (270) and not between (202) and (232); Fig. M, Paragraph [0033], [0054], [0057]) on the sub-channel (portion of (202)), wherein the second oxide layer (230) includes a dopant (carbon), and wherein an entirety of the dielectric layer comprising oxygen (bottom (230)) is physically separated from (via the spacers (217), Paragraph [0079], Fig. M) the source (left (232)) and the drain (right (232)); and
-a gate structure (e.g. the structure comprising dielectric (262) and gate metal (285); Fig. M, Paragraph [0054]) between the plurality of channels (265) and the second oxide layer (230), the gate structure comprising a gate dielectric (262) and a gate electrode (285),
Lilak does not explicitly teach:
-and the gate structure having a lateral width along a direction from the source to the drain the same as a lateral width of the dielectric layer comprising oxygen along the direction from the source to the drain.
Frougier teaches a stacked field effect transistor ((54); Fig. 13, Paragraph [0034]) comprising a gate structure (e.g. bottom (52a) of (52); Fig. 13, Paragraph [0034]) between a channel ((10); Fig. 13, Paragraph [0012]) and a dielectric layer comprising oxygen ((22a); Fig. Paragraph 13, Paragraphs [0017] and [0018]), wherein:
- and the gate structure (52a) having a lateral width along a direction from the source to the drain (e.g. from an exterior (46) to an interior (46); Fig. 13, Paragraph [0030]) the same as a lateral width of the dielectric layer comprising oxygen (22a) along the direction from the source to the drain (e.g. from exterior to interior (46)). (See also formation in Fig. 6 Paragraph [0022])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Frougier into the device of Lilak such that it comprises the gate structure having a lateral width along a direction from the source to the drain the same as a lateral width of the dielectric layer comprising oxygen along the direction from the source to the drain. This would be due to the fact that doing so would produce the predictable result of incorporating applicable element geometry while using a method which avoids occlusion for spacer formation (Frougier, Paragraph [0004])
In the following dependent claim rejections, elements cited are to Lilak unless otherwise specified (i.e. (265) is Lilak, (265), while (Frougier, (52)) is Frougier, (52)).
Regarding Claim 47, Lilak as modified by Frougier teaches the transistor (‘transistor’ (270); Fig. M, Paragraph [0056]) of Claim 46, wherein:
- the dopant includes carbon atoms (carbon-doped).
Regarding Claim 48, Lilak as modified by Frougier teaches the transistor (‘transistor’ (270); Fig. M, Paragraph [0056]) of Claim 46, wherein:
- the plurality of channels (each (265)) above the sub-channel (portion of (202)) are nanoribbons (Paragraph [0034]).
Regarding Claim 50, Lilak as modified by Frougier teaches the transistor (‘transistor’ (270); Fig. M, Paragraph [0056]) of Claim 46, wherein:
- the sub-channel (portion of (202)) is a portion of a silicon substrate (totality of (202), a silicon substrate; Paragraphs [0030] and [0031]).
Claim 31 is rejected under 35 U.S.C. 103 as being unpatentable over Lilak and Frougier, in view of Hashemi et al. (U.S. Pub 2015/0236120), hereinafter Hashemi.
Regarding Claim 31, Lilak as modified by Frougier teaches the semiconductor device (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) of Claim 26, wherein:
-the nanowire (265) is a semiconductor (Paragraph [0026]).
Lilak nor Frougier explicitly teach:
-the nanowire is a silicon nanowire.
Hashemi teaches a semiconductor device comprising gate-all-around transistors wherein:
-the nanowire is a semiconductor silicon nanowire ((46); Fig. 5D, Paragraph [0029])
It would have been obvious to one of ordinary skill in the art at the time the claims were effectively filed to incorporate the teachings of Hashemi into the device of Lilak and Frougier such that the nanowire is a silicon nanowire. This would be due to the predictable result of having a semiconductor (silicon) material based nanowire in the device.
Claim 35 is rejected under 35 U.S.C. 103 as being unpatentable over Lilak and Frougier, in view of Wang et al. (U.S. Pub 2015/0102287), hereinafter Wang.
Regarding Claim 35, Lilak teaches the semiconductor device (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) of Claim 26, upon which it depends, but does not teach:
-a portion of the sub-channel proximate to the dielectric layer comprising oxygen of the sub-channel includes the dopant.
Wang teaches application of materials in a gate-all-around (GAA) nanowire channel field-effect transistor wherein:
-an insulating layer of silicon includes a carbon dopant (Paragraph [0017])
It would have been obvious to one of ordinary skill in the art at the time the claims were effectively filed to incorporate the teachings of Wang into the device of Lilak and Frougier such that a portion of the sub-channel proximate to the dielectric layer comprising oxygen of the sub-channel includes the dopant. This would be motivated by the fact doing so would increase the resistivity of the sub channel thereby improving electrical isolation between the source and drain via the sub channel and preventing current leakage, improving transistor efficiency (Wang, Paragraph [0017]).
Claim 49 is rejected under 35 U.S.C. 103 as being unpatentable over by Lilak and Frougier, in view of Li et al. (U.S. Pub 2006/0267066), hereinafter Li.
Regarding Claim 49, Lilak teaches the transistor (‘transistor’ (270); Fig. M, Paragraph [0056]) of Claim 46, wherein:
-there is a first oxide layer (225) on each of the plurality of channels (each (265)), wherein the oxide layer is a high-k dielectric layer (Paragraph [0045])
Lilak nor Frougier explicitly teach the oxide layer:
-includes doping below a threshold level of 5E14 cm-2.
Li teaches a method of manufacturing high-k dielectric semiconductor materials wherein:
-a first oxide layer (oxide layer (40) e.g. hafnium oxide; Fig. 3, Paragraph [0026]) includes doping (e.g. nitrogen ions; Paragraph [0018]) below a threshold level of 5E14 cm-2 (e.g. 1011cm-2 ; Paragraph [0020])
It would have been obvious to one of ordinary skill in the art at the time the claims were effectively filed to incorporate the teachings of Li into the device of Lilak and Frougier such that the oxide layer on each of the plurality of channels includes doping below a threshold level of 5E14 cm-2. This would be motivated by the fact doing so would provide for an improved high-k dielectric oxide to the device (Li, Paragraphs [0005] and [0008]).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/D.M./Examiner, Art Unit 2812
/DAVIENNE N MONBLEAU/Supervisory Patent Examiner, Art Unit 2812
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