Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on August 7, 2026 has been entered.
Status of Claims
Examiner notes that in the instant application, following the entering of the amendment dated July 14, 2026:
-Claims 26-50 are pending.
-Claims 1-25 are cancelled.
-Claims 26 and 46 are amended.
-Claims 36-45 are withdrawn.
Response to Arguments
Applicant’s amendments and arguments filed July 14, 2026 have been fully considered and are persuasive, the rejection has been updated to address the newly amended limitations.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 26-34, and 46-49 are rejected under 35 U.S.C. 103 as being unpatentable over Lilak et al. (U.S. Pub. 2020/0105891), hereinafter Lilak, in view of Yao et al. (U.S. Pub. 2021/0234017), hereinafter Yao. For clarity, a modified version of Lilak Fig. 2E, hereinafter Fig. M, which incorporates the teachings of Lilak Paragraphs [0057] and [0079] is provided below.
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Regarding Claim 26, Lilak teaches a semiconductor device (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) comprising:
-a gate all around (GAA) field effect transistor (FET) (‘transistor’ (270); Fig. M, Paragraph [0056]) that includes:
-a sub-channel (a portion of the substrate (202) located below (270); Fig.
M, Paragraph [0054]) in direct contact (Paragraph [0057]) with a source (‘EPI layer’ (232), e.g. the (232) on the left; Fig. M, Paragraph [0080]) and a drain ((232) on the right; Fig. 2E);
-a channel (consisting of an ‘interconnect’ (265) and a ‘transition layer’ (225)
above and below each interconnect (265) in the cross-sectional view of Fig. M; Fig. M, Paragraph [0079]) above the sub-channel (portion of (202)), the channel ((265) and (225)) coupled with the source (left (232)) and the drain (right (232)), wherein the channel includes a nanowire ((265); Paragraph [0034]); and
-a dielectric layer (bottom layer (230) as formed directly below (270) and not between (202) and (232); Fig. M, Paragraphs [0033], [0054], and [0057])
comprising oxygen (e.g. carbon-doped silicon oxide; Paragraph [0033]) on a side of the sub-channel (top surface of the portion of (202)) between the channel ((265) and (225)) and the sub-channel (portion of (202)), wherein the dielectric layer comprising oxygen (bottom (230)) includes a dopant (carbon), and wherein an entirety of the dielectric layer comprising oxygen (bottom (230)) is physically separated from (via the spacers (217), Paragraph [0079], Fig. M) the source (left (232)) and the drain (right (232)); and
-a gate structure (e.g. the bottom structure comprising dielectric (262) and gate metal (285); Fig. M, Paragraph [0054]) between the channel ((265) and (225)) and the dielectric layer comprising oxygen (230), the gate structure comprising a gate dielectric (262) and a gate electrode (285); and
-a gate spacer (e.g. bottom (217); Fig. M, Paragraph [0063]) along sides of the gate structure (bottom (262) and (285)) and the dielectric layer (230).
Lilak does not explicitly teach:
-wherein the nanowire of the channel extends laterally beyond outermost sidewalls of the gate spacer.
Yao teaches a stacked field effect transistor ((200); Fig. 13A, Paragraph [0012]) comprising a channel including a nanowire (e.g. bottom (204a); Fig. 13A, Paragraph [0017]) and a gate spacer (e.g. bottom (222); Fig. 14A. Paragraphs [0025]), wherein:
- the nanowire of the channel (bottom (204a)) extends laterally (i.e. X-direction of Fig. 13A) beyond outermost sidewalls of the gate spacer (bottom (222)).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Yao into the device of Lilak such that the nanowire of the channel extends laterally beyond outermost sidewalls of the gate spacer. This would be due to the fact that doing so would increase contact area between the source/drain features and the channels, thereby improving device performance (e.g. reducing contact resistance) (Yao, Paragraph [0042])
In the following dependent claim rejections, elements cited are to Lilak unless otherwise specified (i.e. (265) is Lilak, (265), while (Yao, (52)) is Yao, (52)).
Regarding Claim 27, Lilak as modified by Yao teaches the semiconductor device (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) of Claim 26, wherein:
-the dopant includes carbon atoms (‘carbon-doped’; Paragraph [0033]).
Regarding Claim 28, Lilak as modified by Yao teaches the semiconductor device (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) of Claim 26, wherein:
-the dopant (carbon) includes electrically active defects (adding carbon doping necessarily results in lowering the dielectric constant of silicon oxide, due to the presence of electrically active defects).
Regarding Claim 29, Lilak as modified by Yao teaches the semiconductor device (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) of Claim 26, wherein:
-the channel ((265) and (225)) includes a second dielectric layer ((225)) that does not include the dopant (e.g. silicon dioxide; Paragraph [0045]).
Regarding Claim 30, Lilak as modified by Yao teaches the semiconductor device (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) of Claim 29, wherein:
- the channel ((265) and (225)) includes a first side (e.g. top side relative to the vertical; Fig. M) and a second side opposite the first side (e.g. bottom side relative to the vertical; Fig. 2M); and wherein the second dielectric layer (225) is on the first side (top, above (265)) and the second side (bottom, below (265)) of the channel.
Regarding Claim 31, Lilak as initially modified by Yao teaches the semiconductor device (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) of Claim 26, wherein:
-the nanowire (265) is a semiconductor (Paragraph [0026]).
Lilak as initially modified by Yao teach:
-the nanowire is a silicon nanowire.
Yao further teaches:
-the nanowire is a semiconductor silicon nanowire ((204a); Fig. 13A, Paragraph [0016])
It would have been obvious to one of ordinary skill in the art at the time the claims were effectively filed to incorporate the further teachings of Yao into the device of Lilak as initially modified by Yao such that the nanowire is a silicon nanowire. This would be due to the predictable result of having a semiconductor (silicon) material based nanowire in the device.
Regarding Claim 32, Lilak as modified by Yao teaches the semiconductor device (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) of Claim 26, wherein:
-the channel ((265) and (225)) is a plurality of channels (e.g. the bottom, middle, and top groupings of (265) and (225)) above the sub-channel (portion of (202)).
Regarding Claim 33, Lilak as modified by Yao teaches the apparatus (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) of Claim 26, wherein:
-the sub-channel (portion of (202)) includes silicon (e.g. silicon; Paragraph [0030])
Regarding Claim 34, Lilak as modified by Yao teaches the apparatus (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) of Claim 26, wherein:
-the sub-channel (portion of (202)) is a portion of a substrate (totality of (202)).
Regarding Claim 46, Lilak teaches a (GAA) field effect transistor (FET) (‘transistor’ (270); Fig. M, Paragraph [0056]) comprising:
-a sub-channel (a portion of the substrate (202) located below (270); Fig. M, Paragraph [0054]);
-a plurality of channels (each consisting of an ‘interconnect’ (265); Fig. M, Paragraph
[0079]) above the sub-channel (portion of (202));
-a source (‘EPI layer’ (232), e.g. the (232) on the left; Fig. M, Paragraph [0080]) in direct contact (Paragraph [0057]) with the sub-channel (portion of (202)) and coupled with a portion, respectively, of the plurality of channels (each (265));
-a drain ((232) on the right; Fig. M) in direct contact (Paragraph [0057]) with the sub-channel (portion of (202)) and coupled with the plurality of channels (each (265));
-a first oxide layer (‘transition layers’ (225) of silicon dioxide; Fig. M, Paragraphs [0079] and [0045]) on each of the plurality of channels (each (265)); and
-a second oxide layer (carbon-doped silicon oxide layer (230) as formed directly below (270) and not between (202) and (232); Fig. M, Paragraph [0033], [0054], [0057]) on the sub-channel (portion of (202)), wherein the second oxide layer (230) includes a dopant (carbon), and wherein an entirety of the dielectric layer comprising oxygen (bottom (230)) is physically separated from (via the spacers (217), Paragraph [0079], Fig. M) the source (left (232)) and the drain (right (232)); and
-a gate structure (e.g. the structure comprising dielectric (262) and gate metal (285); Fig. M, Paragraph [0054]) between the plurality of channels (265) and the second oxide layer (230), the gate structure comprising a gate dielectric (262) and a gate electrode (285); and
-a gate spacer ((217); Fig. M, Paragraph [0063]) along sides of the gate structure ((262) and (285)), the first oxide layer (225), and the second oxide layer (230)
Lilak does not explicitly teach:
-wherein the plurality of channels extend laterally beyond outermost sidewalls of the gate spacer.
Yao teaches a stacked field effect transistor ((200); Fig. 13A, Paragraph [0012]) comprising a plurality of channels ((204a); Fig. 13A, Paragraph [0017]) and a gate spacer ((222); Fig. 14A. Paragraphs [0025]), wherein:
- the plurality of channels (204a) extend laterally (i.e. X-direction of Fig. 13A) beyond outermost sidewalls of the gate spacer (222).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Yao into the device of Lilak such that the plurality of channels extend laterally beyond outermost sidewalls of the gate spacer. This would be due to the fact that doing so would increase contact area between the source/drain features and the channels, thereby improving device performance (e.g. reducing contact resistance) (Yao, Paragraph [0042])
In the following dependent claim rejections, elements cited are to Lilak unless otherwise specified (i.e. (265) is Lilak, (265), while (Yao, (52)) is Yao, (52)).
Regarding Claim 47, Lilak as modified by Yao teaches the transistor (‘transistor’ (270); Fig. M, Paragraph [0056]) of Claim 46, wherein:
- the dopant includes carbon atoms (carbon-doped).
Regarding Claim 48, Lilak as modified by Yao teaches the transistor (‘transistor’ (270); Fig. M, Paragraph [0056]) of Claim 46, wherein:
- the plurality of channels (each (265)) above the sub-channel (portion of (202)) are nanoribbons (Paragraph [0034]).
Regarding Claim 50, Lilak as modified by Yao teaches the transistor (‘transistor’ (270); Fig. M, Paragraph [0056]) of Claim 46, wherein:
- the sub-channel (portion of (202)) is a portion of a silicon substrate (totality of (202), a silicon substrate; Paragraphs [0030] and [0031]).
Claim 35 is rejected under 35 U.S.C. 103 as being unpatentable over Lilak and Yao, in view of Wang et al. (U.S. Pub 2015/0102287), hereinafter Wang.
Regarding Claim 35, Lilak as modified by Yao teaches the semiconductor device (‘transistor device’ (200); Figs. 2A-2E and M, Paragraph [0054]) of Claim 26, upon which it depends, but neither teach:
-a portion of the sub-channel proximate to the dielectric layer comprising oxygen of the sub-channel includes the dopant.
Wang teaches application of materials in a gate-all-around (GAA) nanowire channel field-effect transistor wherein:
-an insulating layer of silicon includes a carbon dopant (Paragraph [0017])
It would have been obvious to one of ordinary skill in the art at the time the claims were effectively filed to incorporate the teachings of Wang into the device of Lilak and Yao such that a portion of the sub-channel proximate to the dielectric layer comprising oxygen of the sub-channel includes the dopant. This would be motivated by the fact doing so would increase the resistivity of the sub channel thereby improving electrical isolation between the source and drain via the sub channel and preventing current leakage, improving transistor efficiency (Wang, Paragraph [0017]).
Claim 49 is rejected under 35 U.S.C. 103 as being unpatentable over by Lilak and Yao, in view of Li et al. (U.S. Pub 2006/0267066), hereinafter Li.
Regarding Claim 49, Lilak as modified by Yao teaches the transistor (‘transistor’ (270); Fig. M, Paragraph [0056]) of Claim 46, wherein:
-there is a first oxide layer (225) on each of the plurality of channels (each (265)), wherein the oxide layer is a high-k dielectric layer (Paragraph [0045])
Lilak nor Yao explicitly teach the oxide layer:
-includes doping below a threshold level of 5E14 cm-2.
Li teaches a method of manufacturing high-k dielectric semiconductor materials wherein:
-a first oxide layer (oxide layer (40) e.g. hafnium oxide; Fig. 3, Paragraph [0026]) includes doping (e.g. nitrogen ions; Paragraph [0018]) below a threshold level of 5E14 cm-2 (e.g. 1011cm-2 ; Paragraph [0020])
It would have been obvious to one of ordinary skill in the art at the time the claims were effectively filed to incorporate the teachings of Li into the device of Lilak and Yao such that the oxide layer on each of the plurality of channels includes doping below a threshold level of 5E14 cm-2. This would be motivated by the fact doing so would provide for an improved high-k dielectric oxide to the device (Li, Paragraphs [0005] and [0008]).
Conclusion
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/DMITRI MIHALIOV/Examiner, Art Unit 2812
/DAVIENNE N MONBLEAU/Supervisory Patent Examiner, Art Unit 2812
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