DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is in response to the amendment filed on Jul. 10th, 2026. The amendments are linked to the original application filed on Oct. 1st, 2021.
Response to Amendment
Regarding Claim Rejections – 35 U.S.C. 112(b)
The applicant has cancelled Claim 23 and argues the claims no longer recite indefinite subject matter and therefore request the rejection under U.S.C. 112(b) be withdrawn. The Examiner has reviewed the amended claims and notes that the claims comply with 35 USC 112(b) and no longer recite indefinite subject matter. Therefore, the rejection under 35 USC 112(b) has been withdrawn.
Regarding Claim Rejections – 35 U.S.C. 101
Applicant Argument
Applicant asserts that the claimed limitations are not abstract ideas and cannot be performed solely in the human mind. Next, the applicant asserts the specification recites features which integrate the claimed invention into a practical application and not abstract ideas. For these reasons, the applicant argues the rejection under 35 U.S.C. 101 be withdrawn.
Examiner Response
Regarding abstract or mental concepts, Per MPEP 2106 (II) “It is essential that the broadest reasonable interpretation (BRI) of the claim be established prior to examining a claim for eligibility. The BRI sets the boundaries of the coverage sought by the claim and will influence whether the claim seeks to cover subject matter that is beyond the four statutory categories or encompasses subject matter that falls within the exceptions.” As such the claims have been interpreted by the examiner using the BRI. Under this interpretation, the examiner asserts that the limitations such as: “reading a plurality of target synaptic weights of an artificial neural network;”, “mapping the plurality of target synaptic weights to a plurality of conductance values …” and “mapping the plurality of hardware-adjusted conductance values …” recite mental concepts of observations, i.e. reading, and opinion and/or judgement, i.e. mapping values. The examiner recognizes the argument that these limitations are designed to be implemented in a computing system, and according to MPEP 2106.04(a)(III)(C): “In evaluating whether a claim that requires a computer recites a mental process, examiners should carefully consider the broadest reasonable interpretation of the claim in light of the specification. For instance, examiners should review the specification to determine if the claimed invention is described as a concept that is performed in the human mind and applicant is merely claiming that concept performed 1) on a generic computer, or 2) in a computer environment, or 3) is merely using a computer as a tool to perform the concept. In these situations, the claim is considered to recite a mental process.” (emphasis added). Finally, the examiner does not find the applicant’s argument is persuasive, and the examiner asserts the submitted amended claimed limitations recite mental concepts which are merely implemented on a computing system.
Next, regarding limitations which integrate the abstract ideas into a practical application, the examiner would like to note the response above for the identification of abstract concepts in the amended claims in the paragraph above. Next, using the BRI of the claims and remaining limitations, the examiner asserts that the paragraphs [0032]-[0035] of the specification fails to recite an improvement to technology or technical field that one of ordinary skill in the art would readily identify. Per MPEP 2106.05(a): “During examination, the examiner should analyze the "improvements" consideration by evaluating the specification and the claims to ensure that a technical explanation of the asserted improvement is present in the specification, and that the claim reflects the asserted improvement. Generally, examiners are not expected to make a qualitative judgement on the merits of the asserted improvement. If the examiner concludes the disclosed invention does not improve technology, the burden shifts to applicant to provide persuasive arguments supported by any necessary evidence to demonstrate that a person of ordinary skill in the art would understand that the disclosed invention improves technology.”. The cited sections of the specification merely recite the hardware used for the invention and core setup of the chips. These paragraphs fail to recite a noticeable solution to a technical problem where a POSITA would identify.
Finally, after consideration of the amendments and remarks, including reevaluation of claims using the Alice/Mayo test, the examiner asserts the amended claims recite ineligible subject matter under 35 U.S.C. 101. For the reasons stated above, the rejection under 35 U.S.C. 101 is upheld, see 101 rejection below.
Regarding Claim Rejection – 35 U.S.C. 103
Applicant Argument
Applicant has amended the independent claims and claim 4 and asserts the prior art on record fails to teach the claimed invention. First, the applicant asserts the prior art of record, Wu, fails to teach the provided amendments. Further, the applicant asserts Wu fails to teach, “providing the plurality of conductance values to a simulator of a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability," where "the simulator determining a plurality of hardware-adjusted conductance values compensating for the hardware effects ...”.
Next, the applicant asserts Wu further fails to disclose, “mapping the plurality of hardware-adjusted conductance values determined by the simulator to a plurality of hardware-adjusted synaptic weights.”.
Finally, the applicant argues that the prior art on record, Brown, fails to teach the amendments to claim 4.
Examiner Response
The applicant asserts the Wu fails to teach the amended claims of the independent claims. The Examiner has reviewed the amendments and notes that Wu fails to explicitly use a Simulator as claimed. Wu instead discloses a process of On- and Off-chip training which initializes input networks and executes them in software. However, the examiner agrees with the Applicant that Wu fails to train a network using a simulator. After each amendment, however, a complete and thorough search is performed and while searching the examiner discovered new art. With this new art, the Examiner does not rely on the combination of Ambrogio and Wu to teach the independent claims. Instead, the examiner relies on the combination of Ambrogio and Peng et al.
Next, regarding claim 4, the claim has been amended, and the scope of the claim has changed. The BRI of claim 4 recites an error metric which is normalized and time-averaged. The claim further recites the error metric is determined by considering the weight distribution of the neural network. As stated by the examiner in previous office actions, Brown discloses the use of a loss function which will generate errors between outputs. The invention disclosed in Brown can evaluate temporal Audio data and frequency, i.e. Cycles over a unit of time. Brown discloses that this process will utilize consistency regularization as well. Finally, the applicant has not provided arguments as to why Brown fails to teach the claimed subject matter. Therefore, the Examiner does not find the Applicant’s argument persuasive.
Finally, the examiner has reviewed the current amendments, prior art on record, and applicant remarks. As stated above, the amended claims have changed the scope of the claim and the Examiner asserts the prior art on record, as well as a combination of newly discovered art, teaches the BRI of the amended claims. Therefore, the rejection under 35 U.S.C. 103 is upheld, see 103 rejection below.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1, 3-12, 14-16, 18-22, 24, and 25 are rejected under 35 U.S.C 101 because the claimed invention is directed to an abstract idea without significantly more. The analysis of the claims will follow the 2019 Revised Patent Subject Matter Eligibility Guidance, 84 Fed. Reg. 50 (“2019 PEG”).
Claim 1
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
Claim 1 recites, “A method of adapting an artificial neural network for deployment to an analog non-volatile memory device, the method comprising:” therefore it is directed to the statutory category of a process.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“reading a plurality of target synaptic weights of an artificial neural network;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to make observations and make evaluations, this includes observing values or weights in a neural network. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“mapping the plurality of target synaptic weights to a plurality of conductance values, each of the plurality of target synaptic weights being mapped to at least one of the plurality of conductance values;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data using pen and paper or a computer as a tool to map values from one source to another. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“mapping the plurality of hardware-adjusted conductance values determined by the simulator to a plurality of hardware-adjusted synaptic weights;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data using pen and paper or a computer as a tool to map values from one source to another. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data and provide judgements or opinions to optimize or transform data from one source to another. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “providing the plurality of conductance values to a simulator of a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, the simulator determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to an analog non-volatile memory device;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“applying the optimized plurality of conductance values to the analog non-volatile memory device.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “providing the plurality of conductance values to a simulator of a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, the simulator determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to an analog non-volatile memory device;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“applying the optimized plurality of conductance values to the analog non-volatile memory device.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 2 (Cancelled)
Claim 3
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “storing the optimized plurality of conductance values.” is an insignificant extra-solution activity required for any uses of the mental processes (see MPEP § 2106.05(g)) As such, the claim is ineligible.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “storing the optimized plurality of conductance values.” is an insignificant extra-solution activity required for any uses of abstract ideas (see MPEP § 2106.05(g)), and is a well-understood, routine, conventional activity (see MPEP § 2106.05(d)(iv); “Storing and retrieving information in memory”.
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 4
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein the error metric is a time-averaged, normalized error metric, the error metric determined by considering an entirety of weight distribution associated with artificial neural network.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 5
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein the error metric is a time-averaged normalized mean squared error.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 6
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein the error metric is a time-averaged normalized mean absolute error.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 7
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein the error metric is a down-sampled timeweighted normalized mean squared error.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 8
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein the error metric is a down-sampled timeweighted normalized mean absolute error.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 9
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein optimizing the plurality of conductance values comprises determining a coefficient and a constant adjustment to each of the plurality of conductance values.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 10
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having opposite signs.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having opposite signs.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 11
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having different magnitudes.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having different magnitudes.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 12
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein each of the plurality of target synaptic weights is mapped to four conductance values, G+, G-, g+, and g-, wherein G+ > g+ and G- > g-, and G+, g+ are added while G-, g- are subtracted to obtain a resulting current.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 13 (Cancelled)
Claim 14
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein optimizing the plurality of conductance values comprises evolving the plurality of conductance values as a function of time based on the hardware model.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 15
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein the analog non-volatile memory device comprises an array of resistive elements, the array providing a vector of current outputs equal to an analog vector-matrix product between (i) a vector of voltage inputs to the array encoding a vector of analog input values and (ii) the plurality of conductance values within the array.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein the analog non-volatile memory device comprises an array of resistive elements, the array providing a vector of current outputs equal to the analog vector-matrix product between (i) a vector of voltage inputs to the array encoding a vector of analog input values and (ii) the plurality of conductance values within the array.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 16
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
Claim 16 recites, A system comprising: an analog non-volatile memory device; and a computing node comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor of the computing node to cause the processor to perform a method comprising:” therefore it is directed to the statutory category of a machine.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“reading a plurality of target synaptic weights of an artificial neural network;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to make observations and make evaluations, this includes observing values or weights in a neural network. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“mapping the plurality of target synaptic weights to a plurality of conductance values, each of the plurality of target synaptic weights being mapped to at least one of the plurality of conductance values;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data using pen and paper or a computer as a tool to map values from one source to another. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“mapping the plurality of hardware-adjusted conductance values determined by the simulator to a plurality of hardware-adjusted synaptic weights;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data using pen and paper or a computer as a tool to map values from one source to another. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data and provide judgements or opinions to optimize or transform data from one source to another. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “providing the plurality of conductance values to a simulator of a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, the simulator determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to the analog non-volatile memory device;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“applying the optimized plurality of conductance values to the analog non-volatile memory device.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “providing the plurality of conductance values to a simulator of a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, the simulator determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to the analog non-volatile memory device;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“applying the optimized plurality of conductance values to the analog non-volatile memory device.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 17 (Cancelled)
Claim 18
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “storing the optimized plurality of conductance values.” is an insignificant extra-solution activity required for any uses of the mental processes (see MPEP § 2106.05(g)) As such, the claim is ineligible.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “storing the optimized plurality of conductance values.” is an insignificant extra-solution activity required for any uses of abstract ideas (see MPEP § 2106.05(g)), and is a well-understood, routine, conventional activity (see MPEP § 2106.05(d)(iv); “Storing and retrieving information in memory”.
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 19
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein the error metric is a time-averaged, normalized error metric.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 20
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein the error metric is a time-averaged normalized mean squared error, a time-averaged normalized mean absolute error, a down-sampled time-weighted normalized mean squared error, or a down-sampled time-weighted normalized mean absolute error.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 21
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having opposite signs.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having opposite signs.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 22
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having different magnitudes.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having different magnitudes.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 23 (Cancelled)
Claim 24
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein optimizing the plurality of conductance values comprises evolving the plurality of conductance values as a function of time based on the hardware model.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 25
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
Claim 25 recites, “A computer program product for adapting an artificial neural network for deployment to an analog non-volatile memory device, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform a method comprising:” therefore it is directed to the statutory category of a machine.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“reading a plurality of target synaptic weights of an artificial neural network;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to make observations and make evaluations, this includes observing values or weights in a neural network. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“mapping the plurality of target synaptic weights to a plurality of conductance values, each of the plurality of target synaptic weights being mapped to at least one of the plurality of conductance values;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data using pen and paper or a computer as a tool to map values from one source to another. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“mapping the plurality of hardware-adjusted conductance values determined by the simulator to a plurality of hardware-adjusted synaptic weights;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data using pen and paper or a computer as a tool to map values from one source to another. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data and provide judgements or opinions to optimize or transform data from one source to another. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “providing the plurality of conductance values to a simulator of a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, the simulator determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to an analog non-volatile memory device;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“applying the optimized plurality of conductance values to the analog non-volatile memory device.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “providing the plurality of conductance values to a simulator of a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, the simulator determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to an analog non-volatile memory device;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“applying the optimized plurality of conductance values to the analog non-volatile memory device.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 10-12, 15, 16, 18, 21, 22, and 25 are rejected under 35 U.S.C. 103 as being unpatentable over Ambrogio et al, (Ambrogio et al, "Accelerating Deep Neural Networks with Analog Memory Devices, 2020, hereinafter "Ambrogio") in view of Peng et al, (Peng et al, “DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-chip Training”, Mar. 13th, 2020, hereinafter “Peng”).
Regarding claim 1, Ambrogio discloses, “A method of adapting an artificial neural network for deployment to an analog non-volatile memory device, the method comprising:” (Introduction, pp. 149) "We use arrays of emerging non-volatile memories (NVM), such as Phase Change Memory, to implement the synaptic weights connecting layers of neurons.", This article discloses a method to assist in the implementation of an artificial neural network to an analog device.
“reading a plurality of target synaptic weights of an artificial neural network;” (Neural Network Training Using Non-Volatile Memory, pp. 149) "Fig. 1a shows the schematic picture of a crossbar array implementing a Multiply-and-Accumulate operation (MACC) in the array, followed by the activation function f() at the at the South Periphery circuitry:
y
=
f
(
∑
w
i
j
x
i
)
where
w
i
j
are the weights implemented with PCM devices, and
x
i
are the inputs at the West Periphery, encoded as pulses with fixed amplitude and varying length [10]." In order for the weights of the neural network to be implemented into the PCM they must first be read by the system.
“mapping the plurality of target synaptic weights to a plurality of conductance values, each of the plurality of target synaptic weights being mapped to at least one of the plurality of conductance values;” (Figure 3 and Description, pp. 150) "Schematic for mapping weights into two pairs (Most Significant and Least Significant Pair) of phase change memory (PCM) devices." This figure shows the weights of the neural network mapped into two pairs of conductance values.
Ambrogio fails to explicitly disclose:
“providing the plurality of conductance values to a simulator of a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, the simulator determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to an analog non-volatile memory device;”
“mapping the plurality of hardware-adjusted conductance values determined by the simulator to a plurality of hardware-adjusted synaptic weights;”
“optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and”
“applying the optimized plurality of conductance values to the analog non-volatile memory device.”.
However, Peng discloses, “providing the plurality of conductance values to a simulator of a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, the simulator determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to an analog non-volatile memory device;” (Fig. 2, pp. 2) This article discloses a two-part system to run neural networks in hardware. The article discloses a software wrapper which will intake a neural network and map it to hardware. As seen in (a), the DNN model is set up and introduced into the system where the model is trained on the hardware and simulated.
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“mapping the plurality of hardware-adjusted conductance values determined by the simulator to a plurality of hardware-adjusted synaptic weights;” (Fig. 2, pp. 2) As seen in this table the DNN model is trained with the hardware variations, and the weights are saved as “Real Traces” which are then sent to the NeuroSim Core. The traces are used to map the trained weights to the hardware itself.
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“optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and” (Fig. 2, pp. 2) This image shows that the Python Wrapper will set up the DNN into the system and then perform backpropagation for model optimization.
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“applying the optimized plurality of conductance values to the analog non-volatile memory device.” (Fig. 2, pp. 2) As shown in the image, after the Real Traces are mapped to the hardware, HW, the values are applied or written in bullet points 3 and 4.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application to combine Ambrogio and Peng. Ambrogio teaches a method which uses hardware to accelerate and execute neural networks. Peng teaches a method to simulate and execute neural networks by training networks to execute hardware such as crossbar arrays or memristors. One of ordinary skill would have motivation to two different methods to accelerate a neural network on hardware by altering a software based neural network and adapting that networks to designated neuromorphic hardware, “In this work, we proposed DNN+NeuroSim V2.0, an end-to-end framework to benchmark CIM-based architectures for on-chip training, and support flexible network structures with versatile device options. With introduced behavior model of nonlinearity and asymmetry, device-to-device and cycle-to-cycle variation during weight update, and momentum optimization method to help overcome large asymmetric nonlinearities, it is efficient to investigate the non-ideal properties of analog synaptic devices in in-situ training. From the technological benchmark, it reveals that the desired specs for analog synaptic devices are: low cycle-to-cycle variation (<1%), large on-state resistance (>100 kΩ), small write pulse width (<1μs), with nonlinearity below +3/-3.” (Peng, Conclusion, pp. 15).
Regarding claim 3, Ambrogio discloses, “storing the optimized plurality of conductance values.” (Neural Network Training Using Non- Volatile Memory, pp. 150) "This transfer procedure enables accurate and non-volatile storage of the weights, thanks to a closed-loop tuning procedure that carefully programs the PCMs [11]."Each iteration the optimized values are stored and will be used again in a closed loop to be further optimized.
Regarding claim 10, Ambrogio discloses, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having opposite signs.” (Neural Network Training Using Non-Volatile Memory, pp. 149-150) "For this reason the single weight is encoded as in Fig. 1d:
W
=
F
G
+
-
G
-
+
g
-
g
s
h
, where
G
+
and
G
-
are encoded with PCMs representing the most significant pair (MSP), g and
g
s
h
are implemented with three MOSFETs and one capacitor(3T1C) structures encoding the least significant pair (LSP), and F is a magnification factor [9], [10]." Each of the weights are mapped to conductance values of opposite signs.
Regarding claim 11, Ambrogio discloses, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having different magnitudes.” (Neural Network Training Using Non-Volatile Memory, pp. 149-150) "For this reason the single weight is encoded as in Fig. 1d:
W
=
F
G
+
-
G
-
+
g
-
g
s
h
, where
G
+
and
G
-
are encoded with PCMs representing the most significant pair (MSP), g and
g
s
h
are implemented with three MOSFETs and one capacitor(3T1C) structures encoding the least significant pair (LSP), and F is a magnification factor [9], [10]." The weights are mapped based on a least, lower magnitude, significant pair and a most, higher magnitude, significant pair.
Regarding claim 12, Ambrogio discloses, “wherein each of the plurality of target synaptic weights is mapped to four conductance values, G+, G-, g+, and g-, wherein G+ > g+ and G- > g-, and G+, g+ are added while G-, g- are subtracted to obtain a resulting current.” (Neural Network Inference Using Non-Volatile Memory, pp. 150) "Fig. 3. Schematic for mapping weights into two pairs (Most Significant and Least Significant Pair) of phase change memory (PCM) devices. The total weight (in effective conductance, e.g. μS) is the weighted sum of the 4 PCM conductance values. In this case the least Significant Pair is decreased by a gain factor F [7].” In this equation and using the BRI of the claim, G is subtracted from the
G
+
and added to
g
+
minus
g
-
.
Regarding claim 15, Ambrogio discloses, “wherein the analog non-volatile memory device comprises an array of resistive elements, the array providing a vector of current outputs equal to an analog vector-matrix product between (i) a vector of voltage inputs to the array encoding a vector of analog input values and (ii) the plurality of conductance values within the array.” (Neural Network Training using Non-Volatile Memory, pp. 149) "Crossbar arrays of NVM devices ideally map Fully connected (FC) weight layers in neural networks, thus providing high computing parallelism." A crossbar array of a Non-Volatile Memory device is used for this experiment. Under the broadest reasonable interpretation, a crossbar array contains the claimed subject matter.
Regarding claim 16, Ambrogio discloses, “A system comprising: an analog non-volatile memory device; and a computing node comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor of the computing node to cause the processor to perform a method comprising:” (LSTM inference results, pp. 151) "To test the accuracy of our programming scheme, we trained in Matlab and in PyTorch, a common framework for DNN simulation, a Long-Short Term Memory (LSTM) network on the book' Alice in Wonderland'.", In order to test the results in this article they used different programming packages, which can only be accessed on a computer system containing memory and a processor.
“reading a plurality of target synaptic weights of an artificial neural network;” (Neural Network Training Using Non-Volatile Memory, pp. 149) "Fig. 1a shows the schematic picture of a crossbar array implementing a Multiply-and-Accumulate operation (MACC) in the array, followed by the activation function f() at the at the South Periphery circuitry:
y
=
f
(
∑
w
i
j
x
i
)
where
w
i
j
are the weights implemented with PCM devices, and
x
i
are the inputs at the West Periphery, encoded as pulses with fixed amplitude and varying length [10]." In order for the weights of the neural network to be implemented into the PCM they must first be read by the system.
“mapping the plurality of target synaptic weights to a plurality of conductance values, each of the plurality of target synaptic weights being mapped to at least one of the plurality of conductance values;” (Figure 3 and Description, pp. 150) "Schematic for mapping weights into two pairs (Most Significant and Least Significant Pair) of phase change memory (PCM) devices." This figure shows the weights of the neural network mapped into two pairs of conductance values.
Ambrogio fails to explicitly disclose:
“providing the plurality of conductance values to a simulator of a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, the simulator determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to the analog non-volatile memory device;”
“mapping the plurality of hardware-adjusted conductance values determined by the simulator to a plurality of hardware-adjusted synaptic weights;”
“optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and”
“applying the optimized plurality of conductance values to the analog non-volatile memory device.”.
However, Peng discloses, “providing the plurality of conductance values to a simulator of a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, the simulator determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to the analog non-volatile memory device;” (Fig. 2, pp. 2) This article discloses a two-part system to run neural networks in hardware. The article discloses a software wrapper which will intake a neural network and map it to hardware. As seen in (a), the DNN model is set up and introduced into the system where the model is trained on the
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hardware and simulated.
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“mapping the plurality of hardware-adjusted conductance values determined by the simulator to a plurality of hardware-adjusted synaptic weights;” (Fig. 2, pp. 2) As seen in this table the DNN model is trained with the hardware variations, and the weights are saved as “Real Traces” which are then sent to the NeuroSim Core. The traces are used to map the trained weights to the hardware itself.
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“optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and” (Fig. 2, pp. 2) This image shows that the Python Wrapper will set up the DNN into the system and then perform backpropagation for model optimization.
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“applying the optimized plurality of conductance values to the analog non-volatile memory device.” (Fig. 2, pp. 2) As shown in the image, after the Real Traces are mapped to the hardware, HW, the values are applied or written in bullet points 3 and 4.
Regarding claim 18, Ambrogio discloses, “storing the optimized plurality of conductance values.” (Neural Network Training Using Non- Volatile Memory, pp. 150) "This transfer procedure enables accurate and non-volatile storage of the weights, thanks to a closed-loop tuning procedure that carefully programs the PCMs [11]." Each iteration the optimized values are stored and will be used again in a closed loop to be further optimized.
Regarding claim 21, Ambrogio discloses, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having opposite signs.” (Neural Network Training Using Non-Volatile Memory, pp. 149-150) "For this reason the single weight is encoded as in Fig. 1d: W = F(
G
+
-
G
-
) + g -
g
s
h
, where
G
+
and
G
-
are encoded with PCMs representing the most significant pair (MSP), g and
g
s
h
are implemented with three MOSFETs and one capacitor(3T1C) structures encoding the least significant pair (LSP), and F is a magnification factor [9], [10]." Each of the weights are mapped to conductance values of opposite signs.
Regarding claim 22, Ambrogio discloses, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having different magnitudes.” (Neural Network Training Using Non-Volatile Memory, pp. 149-150) "For this reason the single weight is encoded as in Fig. 1d: W = F(
G
+
-
G
-
) + g -
g
s
h
, where
G
+
and
G
-
are encoded with PCMs representing the most significant pair (MSP), g and
g
s
h
are implemented with three MOSFETs and one capacitor(3T1C) structures encoding the least significant pair (LSP), and F is a magnification factor [9], [10]." The weights are mapped based on a least, lower magnitude, significant pair and a most, higher magnitude, significant pair.
Regarding claim 25, Ambrogio discloses, “A computer program product for adapting an artificial neural network for deployment to an analog non-volatile memory device, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform a method comprising:” (LSTM inference results, pp. 151) "To test the accuracy of our programming scheme, we trained in Matlab and in PyTorch, a common framework for DNN simulation, a Long-Short Term Memory (LSTM) network on the book' Alice in Wonderland'.", In order to test the results in this article they used different programming packages, which can only be accessed on a computer system containing memory and a processor.
“reading a plurality of target synaptic weights of an artificial neural network;” (Neural Network Training Using Non-Volatile Memory, pp. 149) "Fig. 1a shows the schematic picture of a crossbar array implementing a Multiply-and-Accumulate operation (MACC) in the array, followed by the activation function f() at the at the South Periphery circuitry:
y
=
f
(
∑
w
i
j
x
i
)
where
w
i
j
are the weights implemented with PCM devices, and
x
i
are the inputs at the West Periphery, encoded as pulses with fixed amplitude and varying length [10]." In order for the weights of the neural network to be implemented into the PCM they must first be read by the system.
“mapping the plurality of target synaptic weights to a plurality of conductance values, each of the plurality of target synaptic weights being mapped to at least one of the plurality of conductance values;” (Figure 3 and Description, pp. 150) "Schematic for mapping weights into two pairs (Most Significant and Least Significant Pair) of phase change memory (PCM) devices." This figure shows the weights of the neural network mapped into two pairs of conductance values.
Ambrogio fails to explicitly disclose:
“providing the plurality of conductance values to a simulator of a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, the simulator determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to an analog non-volatile memory device;”
“mapping the plurality of hardware-adjusted conductance values determined by the simulator to a plurality of hardware-adjusted synaptic weights;”
“optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and”
“applying the optimized plurality of conductance values to the analog non-volatile memory device.”
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However, Peng discloses, “providing the plurality of conductance values to a simulator of a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, the simulator determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to an analog non-volatile memory device;” (Fig. 2, pp. 2) This article discloses a two-part system to run neural networks in hardware. The article discloses a software wrapper which will intake a neural network and map it to hardware. As seen in (a), the DNN model is set up and introduced into the system where the model is trained on the hardware and simulated.
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434
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“mapping the plurality of hardware-adjusted conductance values determined by the simulator to a plurality of hardware-adjusted synaptic weights;” (Fig. 2, pp. 2) As seen in this table the DNN model is trained with the hardware variations, and the weights are saved as “Real Traces” which are then sent to the NeuroSim Core. The traces are used to map the trained weights to the hardware itself.
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“optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and” (Fig. 2, pp. 2) This image shows that the Python Wrapper will set up the DNN into the system and then perform backpropagation for model optimization.
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“applying the optimized plurality of conductance values to the analog non-volatile memory device.” (Fig. 2, pp. 2) As shown in the image, after the Real Traces are mapped to the hardware, HW, the values are applied or written in bullet points 3 and 4.
Claims 4-8, 19, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Ambrogio and Peng in view of Brown et al, (Brown et al., “NEURAL NETWORK TRAINING USING ROBUST TEMPORAL ENSEMBLING, US 20220101112 A1, Filed Sept. 25, 2020, hereinafter "Brown").
Regarding claim 4, Brown discloses, “wherein the error metric is a time-averaged, normalized error metric, the error metric determined by considering an entirety of weight distribution associated with artificial neural network.” (Detailed Description, pp. 62, [0070]) "In at least one embodiment, techniques described herein leverages generalized cross entropy GCE (which is a theoretically grounded noise-robust loss function that can be seen as a generalization of mean absolute error (MAE) and categorical cross entropy (CCE)), AugMix (a stochastic augmentation strategy which is described in more detail below with respect to FIG. 3), an exponential moving average of model weights for generating pseudo-labels, and a mean squared error consistency loss between pseudo-labels on un-augmented input versus model predictions on augmented input. In an effort to exploit benefits of both MAE and CCE, a negative Box Cox transformation may be used as a loss function:
L
q
f
x
i
,
y
i
=
j
=
1
-
f
j
x
i
q
q
. Where
q
∈
0,1
, and fj denotes an j-th element off. GCE is equivalent to CCE for
lim
q
→
0
L
q
and becomes MAE (e.g., unhinged loss) when q=l, and that optimization of Equation I above may be a generalization of maximum likelihood. In at least one embodiment, techniques described herein utilize a consistency regularization, which works under an assumption that a model should output similar predictions given augmented versions of a same input.” This teaches the use of a normalized error metric and a loss function. Further, (Detailed Description, pp. 63, [0074]) "In at least one embodiment, modifications to audio data from content input 302 includes (but not limited to) at least modifying amplitude energy, energy, frequency responses in audio signal, samples (e.g., up sampling or down sampling), bit rate, sounds, speed (e.g., speeding up or slowing down), adding/removing frames, etc." The data used in this case is audio data. Audio data is data over time which, using the broadest reasonable interpretation, can be time-weighted.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application to combine Ambrogio, Peng and Brown. Ambrogio teaches a method to use hardware to accelerate and execute neural networks. Peng teaches a method to simulate and execute neural networks by training networks to execute hardware such as crossbar arrays or memristors. Brown teaches a robust training method for generated neural networks. One of ordinary skill would have motivation to take pretrained neural network and train them to execute using neuromorphic hardware with a system that implements different methods to train a neural network in software to supplement on device training, “techniques described herein achieves various technical advantages, including but not limited to: an ability to process training data with multiple noisy label sets and achieve high accuracy when performing image classification without label filtering, label refurbishment, and/or large sets of trusted data, an ability to utilize a wide variability of multiple label sets and training data to produce an accurate and robust model, an ability to collect data from and learn from noisy training data to train a model, an ability to achieve corruption robustness to unforeseen data shifts encountered during deployment, and others." (Brown, Detailed Description, pp. 61, [0060]).
Regarding claim 5, Brown discloses, “wherein the error metric is a time-averaged normalized mean squared error.” (Detailed Description, pp. 62, [0070]) "In at least one embodiment, techniques described herein leverages generalized cross entropy GCE (which is a theoretically grounded noise-robust loss function that can be seen as a generalization of mean absolute error (MAE) and categorical cross entropy (CCE)), AugMix (a stochastic augmentation strategy which is described in more detail below with respect to FIG. 3), an exponential moving average of model weights for generating pseudo-labels, and a mean squared error consistency loss between pseudo-labels on un-augmented input versus model predictions on augmented input. In an effort to exploit benefits of both MAE and CCE, a negative Box Cox transformation may be used as a loss function:
L
q
f
x
i
,
y
i
=
j
=
1
-
f
j
x
i
q
q
. Where
q
∈
0,1
, and fj denotes an j-th element off. GCE is equivalent to CCE for
lim
q
→
0
L
q
and becomes MAE (e.g., unhinged loss) when q=l, and that optimization of Equation I above may be a generalization of maximum likelihood. In at least one embodiment, techniques described herein utilize a consistency regularization, which works under an assumption that a model should output similar predictions given augmented versions of a same input.” This teaches the use of a normalized mean squared error metric and a loss function. Further, (Detailed Description, pp. 63, [0074]) "In at least one embodiment, modifications to audio data from content input 302 includes (but not limited to) at least modifying amplitude energy, energy, frequency responses in audio signal, samples (e.g., up sampling or down sampling), bit rate, sounds, speed (e.g., speeding up or slowing down), adding/removing frames, etc." The data used in this case is audio data. Audio data is data overtime which, using the broadest reasonable interpretation, can be time-weighted.
Regarding claim 6, Brown discloses, “wherein the error metric is a time-averaged normalized mean absolute error.” (Detailed Description, pp. 62, [0070]) "In at least one embodiment, techniques described herein leverages generalized cross entropy GCE (which is a theoretically grounded noise-robust loss function that can be seen as a generalization of mean absolute error (MAE) and categorical cross entropy (CCE)), AugMix (a stochastic augmentation strategy which is described in more detail below with respect to FIG. 3), an exponential moving average of model weights for generating pseudo-labels, and a mean squared error consistency loss between pseudo-labels on un-augmented input versus model predictions on augmented input. In an effort to exploit benefits of both MAE and CCE, a negative Box Cox transformation may be used as a loss function:
L
q
f
x
i
,
y
i
=
j
=
1
-
f
j
x
i
q
q
. Where
q
∈
0,1
, and fj denotes an j-th element off. GCE is equivalent to CCE for
lim
q
→
0
L
q
and becomes MAE (e.g., unhinged loss) when q=l, and that optimization of Equation 1 above may be a generalization of maximum likelihood. In at least one embodiment, techniques described herein utilize a consistency regularization, which works under an assumption that a model should output similar predictions given augmented versions of a same input.” This teaches the use of a normalized error metric and a loss function. This section includes a mean absolute error metric. Further, (Detailed Description, pp. 63, [0074]) "In at least one embodiment, modifications to audio data from content input 302 includes (but not limited to) at least modifying amplitude energy, energy, frequency responses in audio signal, samples (e.g., up sampling or down sampling), bit rate, sounds, speed (e.g., speeding up or slowing down), adding/removing frames, etc." The data used in this case is audio data. Audio data is data overtime which, using the broadest reasonable interpretation, can be time-weighted.
Regarding claim 7, Brown discloses, “wherein the error metric is a down-sampled timeweighted normalized mean squared error.” (Detailed Description, pp. 62, [0070]) "In at least one embodiment, techniques described herein leverages generalized cross entropy GCE (which is a theoretically grounded noise-robust loss function that can be seen as a generalization of mean absolute error (MAE) and categorical cross entropy (CCE)), AugMix (a stochastic augmentation strategy which is described in more detail below with respect to FIG. 3), an exponential moving average of model weights for generating pseudo-labels, and a mean squared error consistency loss between pseudo-labels on un-augmented input versus model predictions on augmented input. In an effort to exploit benefits of both MAE and CCE, a negative Box Cox transformation may be used as a loss function:
L
q
f
x
i
,
y
i
=
j
=
1
-
f
j
x
i
q
q
. Where
q
∈
0,1
, and fj denotes an j-th element off. GCE is equivalent to CCE for
lim
q
→
0
L
q
and becomes MAE (e.g., unhinged loss) when q=l, and that optimization of Equation I above may be a generalization of maximum likelihood. In at least one embodiment, techniques described herein utilize a consistency regularization, which works under an assumption that a model should output similar predictions given augmented versions of a same input.” This teaches the use of a normalized error metric and a loss function. This section includes a mean squared error metric. Further, (Detailed Description, pp. 63, [0074]) "In at least one embodiment, modifications to audio data from content input 302 includes (but not limited to) at least modifying amplitude energy, energy, frequency responses in audio signal, samples (e.g., up sampling or down sampling), bit rate, sounds, speed (e.g., speeding up or slowing down), adding/removing frames, etc." The data used in this case is audio data. Audio data is data over time which, using the broadest reasonable interpretation, can be time-weighted. This data can also be down and up sampled in some embodiments as stated above.
Regarding claim 8, Brown discloses, “wherein the error metric is a down-sampled timeweighted normalized mean absolute error.” (Detailed Description, pp. 62, [0070]) "In at least one embodiment, techniques described herein leverages generalized cross entropy GCE (which is a theoretically grounded noise-robust loss function that can be seen as a generalization of mean absolute error (MAE) and categorical cross entropy (CCE)), AugMix (a stochastic augmentation strategy which is described in more detail below with respect to FIG. 3), an exponential moving average of model weights for generating pseudo-labels, and a mean squared error consistency loss between pseudo-labels on un-augmented input versus model predictions on augmented input. In an effort to exploit benefits of both MAE and CCE, a negative Box Cox transformation may be used as a loss function:
L
q
f
x
i
,
y
i
=
j
=
1
-
f
j
x
i
q
q
. Where
q
∈
0,1
, and fj denotes an j-th element off. GCE is equivalent to CCE for
lim
q
→
0
L
q
and becomes MAE (e.g., unhinged loss) when q=l, and that optimization of Equation I above may be a generalization of maximum likelihood. In at least one embodiment, techniques described herein utilize a consistency regularization, which works under an assumption that a model should output similar predictions given augmented versions of a same input.” This teaches the use of a normalized error metric and a loss function. This section includes a mean absolute error Page 69 metric. Further, (Detailed Description, pp. 63, [0074]) "In at least one embodiment, modifications to audio data from content input 302 includes (but not limited to) at least modifying amplitude energy, energy, frequency responses in audio signal, samples (e.g., up sampling or down sampling), bit rate, sounds, speed (e.g., speeding up or slowing down), adding/removing frames, etc." The data used in this case is audio data. Audio data is data over time which, using the broadest reasonable interpretation, can be time-weighted. This data can also be down and up sampled in some embodiments.)
Regarding claim 19, Brown discloses, “wherein the error metric is a time-averaged, normalized error metric.” (Detailed Description, pp. 62, [0070]) "In at least one embodiment, techniques described herein leverages generalized cross entropy GCE (which is a theoretically grounded noise-robust loss function that can be seen as a generalization of mean absolute error (MAE) and categorical cross entropy (CCE)), AugMix (a stochastic augmentation strategy which is described in more detail below with respect to FIG. 3), an exponential moving average of model weights for generating pseudo-labels, and a mean squared error consistency loss between pseudo-labels on un-augmented input versus model predictions on augmented input. In an effort to exploit benefits of both MAE and CCE, a negative Box Cox transformation may be used as a loss function:
L
q
f
x
i
,
y
i
=
j
=
1
-
f
j
x
i
q
q
. Where
q
∈
0,1
, and fj denotes an j-th element off. GCE is equivalent to CCE for
lim
q
→
0
L
q
and becomes MAE (e.g., unhinged loss) when q=l, and that optimization of Equation I above may be a generalization of maximum likelihood. In at least one embodiment, techniques described herein utilize a consistency regularization, which works under an assumption that a model should output similar predictions given augmented versions of a same input.” This teaches the use of a normalized error metric and a loss function. Further, (Detailed Description, pp. 63, [0074]) "In at least one embodiment, modifications to audio data from content input 302 includes (but not limited to) at least modifying amplitude energy, energy, frequency responses in audio signal, samples (e.g., up sampling or down sampling), bit rate, sounds, speed (e.g., speeding up or slowing down), adding/removing frames, etc." The data used in this case is audio data. Audio data is data over time which, using the broadest reasonable interpretation, can be time-weighted.)
Regarding claim 20, Brown discloses, “wherein the error metric is a time-averaged normalized mean squared error, a time-averaged normalized mean absolute error, a down-sampled time-weighted normalized mean squared error, or a down-sampled time-weighted normalized mean absolute error.” (Detailed Description, pp. 62, [0070]) "In at least one embodiment, techniques described herein leverages generalized cross entropy GCE (which is a theoretically grounded noise-robust loss function that can be seen as a generalization of mean absolute error (MAE) and categorical cross entropy (CCE)), AugMix (a stochastic augmentation strategy which is described in more detail below with respect to FIG. 3), an exponential moving average of model weights for generating pseudo-labels, and a mean squared error consistency loss between pseudo-labels on un-augmented input versus model predictions on augmented input. In an effort to exploit benefits of both MAE and CCE, a negative Box Cox transformation may be used as a loss function:
L
q
f
x
i
,
y
i
=
j
=
1
-
f
j
x
i
q
q
. Where
q
∈
0,1
, and fj denotes an j-th element off. GCE is equivalent to CCE for
lim
q
→
0
L
q
and becomes MAE (e.g., unhinged loss) when q=l, and that optimization of Equation I above may be a generalization of maximum likelihood. In at least one embodiment, techniques described herein utilize a consistency regularization, which works under an assumption that a model should output similar predictions given augmented versions of a same input.” This teaches the use of a normalized error metric and a loss function. This section includes a mean squared error metric and mean absolute error metric. Further, (Detailed Description, pp. 63, [0074]) "In at least one embodiment, modifications to audio data from content input 302 includes (but not limited to) at least modifying amplitude energy, energy, frequency responses in audio signal, samples (e.g., up sampling or down sampling), bit rate, sounds, speed (e.g., speeding up or slowing down), adding/removing frames, etc." The data used in this case is audio data. Audio data is data overtime which, using the broadest reasonable interpretation, can be time-weighted. This data can also be down and up sampled in some embodiments.
Claims 9, 14, and 24 are rejected under 35 U.S.C. 103 as being unpatentable over Ambrogio and Peng in view of Wu et al, (Wu et al, “TRAINING METHOD OF NEURAL NETWORK BASED ON MEMRISTOR AND TRAINING DEVICE THEREOF”, US 20220374688 A1, Filed Mar. 6th, 2020, hereinafter “Wu”).
Regarding claim 9, Wu discloses, “wherein optimizing the plurality of conductance values comprises determining a coefficient and a constant adjustment to each of the plurality of conductance values.” (Detailed Description, pp. 7, [0102-0103]) “FIG. 11C is a schematic diagram of an update operation provided by at least one embodiment of the present disclosure. As shown in FIG. 11C, assuming that the equivalent conductance weight parameter matrix of the memristor array is W, the input is a voltage Vwnte greater than the threshold voltage of the memristor array, then the update operation of the corresponding neural network can be expressed as: W=Wnew. For example, if the update operation is to increase the conductance value of at least one memristor of the memristor array, a forward voltage is applied to an upper electrode and a lower electrode of the at least one memristor, such as the V write 1 and V write 2 shown in FIG. 11C; if the update operation is to reduce the conductance value of at least one memristor of the memristor array, a reverse voltage is applied to an upper electrode and a lower electrode of the at least one memristor, such as the V write 1 and V write 2 shown in FIG. 11C. [0103] For example, in step S121, the forward calculation operation is performed on all memristor arrays of the neural network, and the reverse calculation operation is performed on at least part of the memristors in the memristor array of the neural network.” The values of the array are updated after a forward and backward pass. The system will be able to update each of the values based on the information received from the forward/backward pass. The determined values are then applied to the weights in the hardware model.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application to combine Ambrogio, Peng, and Wu. Ambrogio teaches a method which uses hardware to accelerate and execute neural networks. Peng teaches a method to simulate and execute neural networks by training networks to execute hardware such as crossbar arrays or memristors. Wu teaches a method to translate a machine learning model from software to hardware using a hybrid training method. One of ordinary skill would have motivation to three different methods to accelerate a neural network on hardware by altering a software based neural network and adapting that networks to designated neuromorphic hardware, “The training method and the training device provided by the embodiments of the present disclosure make up for the shortcomings of the on-chip training method and the off-chip training method used in the case where the neural network system is deployed in the hardware system based on the memristor array, and from the perspective of the neural network system, the training method and the training device can solve the problem, such as the performance degradation of the neural network system caused by non-ideal characteristics such as device fluctuations, and efficiently and cost-effectively deploys various neural networks in the hardware system based on the memristor array."(Wu, Detailed Description, [0052], pp. 4).”
Regarding claim 14, Wu discloses, “wherein optimizing the plurality of conductance values comprises evolving the plurality of conductance values as a function of time based on the hardware model.” (Detailed Description, pp. 5, [0071]) “It should be noted that the constraint of the conductance state of the memristor array and the values of the corresponding quantized weight parameters are determined according to the actual situations, and the embodiments of the present disclosure are not limited to this case. For example, FIG. 6 is a schematic diagram showing cumulative probabilities of a memristor under 32 conductance states provided by at least one embodiment of the present disclosure. As shown in FIG. 6, the cumulative probabilities of the memristor under 32 conductance states do not overlap each other, and the cumulative probability in each conductance state can reach more than 99.9%, indicating that the memristor array obtained according to the training method has good consistency under 32 conductance states.” The weights of the model are translated to conductance values. The weights are adjusted and optimized to the different states of the hardware model. Further, (Drawings, Fig. 10) This drawing also discloses an iterative training process that executes over a training period or until convergence.
Regarding claim 24, Wu discloses, “wherein optimizing the plurality of conductance values comprises evolving the plurality of conductance values as a function of time based on the hardware model.” (Detailed Description, pp. 5, [0071]) “It should be noted that the constraint of the conductance state of the memristor array and the values of the corresponding quantized weight parameters are determined according to the actual situations, and the embodiments of the present disclosure are not limited to this case. For example, FIG. 6 is a schematic diagram showing cumulative probabilities of a memristor under 32 conductance states provided by at least one embodiment of the present disclosure. As shown in FIG. 6, the cumulative probabilities of the memristor under 32 conductance states do not overlap each other, and the cumulative probability in each conductance state can reach more than 99.9%, indicating that the memristor array obtained according to the training method has good consistency under 32 conductance states.” The weights of the model are translated to conductance values. The weights are adjusted and optimized to the different states of the hardware model. And (Drawings, Fig. 10; This drawing also discloses an iterative training process that executes over a training period or until convergence.
Conclusion
The prior art made of record and not relied upon is considered pertinent to application’s disclosure:
“Training Method of Neural Network Based on Memristor and Training Device Thereof” (US 2022/0374688 A1) Wu et al teaches training a neutral network to be implemented on a memristor array. Further, this disclosed writing weight parameters to the memristor array after virtual, or simulated, training.
“Improved Computational Accuracy in a Crossbar Array” (US 2019/0189174 A1) Hu et al teaches a system that can take crossbar array and optimize the network implemented on the array. This system will use a calculation engine to simulate the weight parameters on a crossbar array to optimize their conductance values and improve accuracy.
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/PAUL M GALVIN-SIEBENALER/Examiner, Art Unit 2147
/VIKER A LAMARDO/Supervisory Patent Examiner, Art Unit 2147
