DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 5/28/2026 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-15 and 18 is/are rejected under 35 U.S.C. 102(a)(1) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over US 20140186979 A1 (Tu).
Re claim 1, Tu teaches a display apparatus comprising:
a circuit board (circuit board 23); and
a plurality of light sources (RGB LED units 35) disposed on the circuit board, each light source comprising:
a blue light emitter (blue LED 300a), a green light emitter (green LED 300c), and a red light emitter (blue LED 300b); and
a coupling layer (third dielectric layer 240 including optional underfill [0052]) disposed on the circuit board and configured to surround at least one of the blue light emitter, the green light emitter, and the red light emitter, wherein:
each of the blue light emitter, the green light emitter, and the red light emitter comprises a light emitting diode chip (light emitting stack 101);
at least one of the blue light emitter, the green light emitter, and the red light emitter comprises an adhesive layer (first metal layer 260 or second metal layer 262) to be electrically connected to the circuit board; and
a distance between light emitting diode chips of adjacent light emitters of the blue, green, and red light emitters is greater than half a width of the light emitting diode chip of one of the blue, green, and red light emitters (Tu teaches that the LED chip width d1 can be between 20-150 microns, half of which would be (d1)/2 = 10-75 microns, and the distance between adjacent chips in the same LED unit S5 is determined by lithography limits and are preferably below 50 microns [0056] Figs. 3G and 4A-4B).
In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); In re Geisler, 116 F.3d 1465, 1469-71, 43 USPQ2d 1362, 1365-66 (Fed. Cir. 1997). "[A] prior art reference that discloses a range encompassing a somewhat narrower claimed range is sufficient to establish a prima facie case of obviousness." In re Peterson, 315 F.3d 1325, 1330, 65 USPQ2d 1379, 1382-83 (Fed. Cir. 2003). See also In re Harris, 409 F.3d 1339, 74 USPQ2d 1951 (Fed. Cir. 2005); See also In re Baird, 16 F.3d 380, 29 USPQ2d 1550 (Fed. Cir. 1994); In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992) (MPEP 2144.05 (I)).
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Re claim 2, Tu teaches wherein the light emitting diode chips of the blue, green, and red light emitters are configured to emit blue, green, and red light, respectively ([0053]).
Re claim 3, Tu teaches wherein the green light emitter includes an AlInGaN-based nitride semiconductor, and the red light emitter includes an AlGaInP-based nitride semiconductor (Tu teaches that the light emitting stacks contain AlGaInN or AlGaInP [0035, 0041, 0048, 0053]).
Applicant has not disclosed that the claimed material is for a particular unobvious purpose, produces an unexpected result, or is otherwise critical, which are criteria that have been held to be necessary for material limitations to be prima facie unobvious. The claimed material is considered to be a "preferred" or "optimum" material out of a plurality of well known materials that a person of ordinary skill in the art at the time the invention was made would have found obvious to provide to the invention of the cited prior art reference, using routine experimentation and optimization of the invention. In re Leshin, 125 USPQ 416 (CCPA 1960).
Re claim 4, Tu teaches further comprising an opaque material layer (opaque layer 290) covering a region of at least one of the blue light emitter, the green light emitter, and the red light emitter.
Re claim 5, Tu teaches wherein the coupling layer is disposed between the blue light emitter and the green light emitter or between the blue light emitter and the red light emitter (Fig. 3G).
Re claim 6, Tu teaches wherein the coupling layer covers the blue light emitter, the green light emitter, and the red light emitter (Fig. 3G).
Re claim 7, Tu teaches wherein a distance between the opaque material layer at a first side of the blue emitter and a second side of the blue emitter that is opposite to the first side is greater than a width of the light emitting diode chip of the blue light emitter (Fig. 3G).
Re claim 8, Tu teaches wherein the circuit board includes a first substrate electrode (metal contact 22 in direct contact with 260) and a second substrate electrode (metal contact 22 in direct contact with 262).
Re claim 9, Tu teaches wherein the opaque material layer comprises a reflective material ([0051]).
Re claim 10, Tu teaches wherein the blue light emitter, the green light emitter, and the red light emitter are arranged in rows and columns (Fig. 4A-4B).
Re claim 11, Tu teaches the display apparatus of claim 1, but Tu is silent with regards to haw the subpixels within each LED unit are connected via the circuit board. However, Tu does teach that the subpixels are flip chip bonded to the electrodes 22 on the circuit board 23 and can be connected in series or parallel ([0062]). As each of the LED chips is a two terminal device having an anode (p-type electrode) and cathode (n-type electrode) there are finite ways to connect the RGB subpixels of Tu in parallel including by connection configurations of using common cathode type or common anode type or having all common electrodes. The claimed connection for claim 11 are parallel connections using common-anode type connections.
The courts have found that a finding that there had been a finite number of identified, predictable potential solutions to the recognized need or problem. The rationale to support a conclusion that the claim would have been obvious is that "a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely that product [was] not of innovation but of ordinary skill and common sense. In that instance the fact that a combination was obvious to try might show that it was obvious under § 103."KSR, 550 U.S. at 421, 82 USPQ2d at 1397 (MPEP 2143 (I)(E)).
Re claim 12, Tu teaches wherein the light emitting diode chip of each respective one of the blue light emitter, the green light emitter, and the red light emitter comprises: a light emitting structure (first conductive layer 102/active layer 104/second conductive layer 106); an n-type electrode and a p-type electrode disposed on the light emitting structure (electrodes 107a/107b); an encapsulation layer (dielectric layer 240) covering the n-type and p-type electrodes; and an n-bump and a p-bump (metal layer 206/262) electrically connected to the n-type electrode and the p-type electrode, respectively, through the encapsulation portion (Fig. 3G) wherein: the common electrode is electrically connected to the p-bumps of the light emitting diode chips of the blue, green, and red light emitters; and the individual electrodes are electrically connected to the n-bumps of the light emitting diode chips of the blue, green, and red light emitters, respectively (common anode connection).
Re claim 13, Tu teaches wherein: the blue light emitter, the green light emitter, and the red light emitter further comprise a substrate on which the light emitting diode chip is disposed; and the substrate comprises a first substrate electrode and a second substrate electrode disposed on the substrate and electrically connected to the light emitting diode chip (Tu teaches that the LED units can be formed directly on a first circuit board and then further contacting a second circuit board Fig. 7A. In this embodiment the circuit board would be 73 having contacts therein and the substrate would be 23 having substrate electrodes 22 therein).
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Re claim 14, Tu teaches wherein the coupling layer is disposed on the substrate (coupling layer includes optional underfill 680 which is depicted in 7A as being in contact with the underlying substrate).
Re claim 15, Tu teaches wherein the coupling layer covers the first and second substrate electrodes (underfill 680 covers sidewalls of the contacts 22).
Re claim 18, Tu teaches wherein the light emitting diode chip of each respective one of the blue light emitter, the green light emitter, and the red light emitter comprises: a light emitting structure (first conductive layer 102/active layer 104/second conductive layer 106); an n-type electrode and a p-type electrode disposed on the light emitting structure (electrodes 107a/107b); an encapsulation layer (dielectric layer 240) covering the n-type and p-type electrodes; and an n-bump and a p-bump (metal layer 206/262) electrically connected to the n-type electrode and the p-type electrode, respectively, through the encapsulation layer (Fig. 3G).
Response to Arguments
Applicant’s arguments with respect to the pending claim(s) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRIGITTE A PATERSON whose telephone number is (571)272-1752. The examiner can normally be reached Monday-Friday 9:00AM-5:00PM.
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BRIGITTE A. PATERSON
Primary Examiner
Art Unit 2896
/BRIGITTE A PATERSON/Primary Examiner, Art Unit 2896
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