Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 02/09/2026 has been entered.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 and 3-4 is/are rejected under 35 U.S.C. 102(a)(1)/(2) as being anticipated by Bonilla (Pub. No.: US 2015/0235946).
Re claim 1, Bonilla, FIG. 3 teaches an integrated circuit (IC) device comprising:
a first inter-level dielectric material layer (310) including a first line level of metal wiring structures (311);
a dielectric material cap layer (313) formed above the first inter-level dielectric material layer (310);
a second inter-level dielectric material layer (320+323+330) formed atop the dielectric material cap layer (313), the second inter-level dielectric material layer including a second line level of metal wiring structures (322);
a third line level of metal wiring structures (333) formed within the second inter-level dielectric material layer (320+323+330) above the second line level of metal wiring structures (322) with no dielectric cap layer (313) therebetween; and
a via level (331/332) between the second line level (322) and third line level (333) of metal wiring structures, the via level comprising:
a first metal via (331) connecting a second level metal wiring structure (322) to a third level metal wiring structure (333) within the second inter-level dielectric material layer (320+323+330) and a redundant metal via (332) connecting the same second level metal wiring structure to the same third level metal wiring structure within the second inter-level dielectric material layer (320+323+330), wherein the first metal via (331/332) connecting the second level metal wiring structure (322) to a third level metal wiring structure (333) comprises a metal (331) and the redundant metal via (332) connecting the same second level metal wiring structure (322) to the same third level metal wiring structure (333) comprises a damascene metal (331/332/333).
In re claim 1, the following limitation makes it a product by process claim: a) " subtractive etch metal," and "non-etchable damascene metal".
The MPEP § 2113, states, "Even though product -by[-] process claims are limited by and defined by the process, determination of patentability is based upon the product itself. The patentability of a product does not depend on its method of production. If the product in product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product is made by a different process." In re Thorpe, 227 USPQ 964, 966 (Fed. Cir. 1985)(citations omitted).
A "product by process" claim is directed to the product per se, no matter how actually made, In re Hirao and Sato et al., 190 USPQ 15 at 17 (CCPA 1976) (footnote 3). See also In re Brown and Saffer, 173 USPQ 685 (CCPA 1972): In re Luck and Gainer, 177 USPQ 523 (CCPA 1973); In re Fessmann, 180 USPQ 324 (CCPA 1974); and In re Marosi et al., 218 USPQ 289 (CAFC 1983) final product per se which must be determined in a ''product by, all of' claim, and not the patentability of the process, and that an old or obvious product, whether claimed in ''product by process" claims or not. Note that Applicant has the burden of proof in such cases, as the above case-law makes clear.
Re claim 3, Bonilla, FIG. 3 teaches the integrated circuit as claimed in Claim 1, wherein a first metal via (331) connecting the second level metal wiring structure (322) to a third level metal wiring structure (333) is a sole non-redundant via connection comprising a damascene metal.
Re claim 4, Bonilla, FIG. 3 teaches the integrated circuit as claimed in Claim 1, further comprising:
a further via level between the first level and second level metal wiring structures, said further via level comprising:
one or more metal via (321) connections connecting one or more first level metal wiring structures (311) of the first line level to one or more second level metal wiring structures of the second line level (322), a metal via (321) connecting a first level metal wiring structure to the second level metal wiring structure comprises a damascene metal.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 5-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bonilla in view of Bao (Patent No.: US 10020255).
Bonilla teaches all the limitation of claim 1/4.
Bonilla fails to teach the limitation of claim 5.
Bao teaches a further via level between the first level and third level metal wiring structures, said further via level comprising:
one or more metal super via (SUPER V1, FIG. 1) connections connecting a first level metal wiring structure of the first line level (M0) directly to a third level metal wiring structure of the third line level (M2) without contacting a second level metal wiring structure of the second line level (M1), a super metal via connecting the first level metal wiring structure (M0) directly to the third level metal wiring structure (M2).
It would have been obvious for a person of ordinary skill in the art before the effective filing date of the claim invention to include the above said teaching for the purpose of providing Efficient routing of these signals across the device requires formation of multilevel or multilayered conductive networks as taught by Bao, BACKGROND.
Re claim 6, in the combination, Bonilla teaches the integrated circuit as claimed in Claim 5, wherein a formed third level metal wiring structure further comprises:
a redundant metal via (332) portion connecting the third level metal wiring structure (333) to a second level metal wiring structure (322) that is redundant with a further metal via (331) connecting the same second level metal wiring structure (322) to the formed third level metal wiring structure (333); and
Bao teaches a super via portion (SUPER V1) connecting the third level metal wiring (M2) structure to a first level metal wiring structure (M0).
Re claim 7, in the combination, Bonilla teaches the integrated circuit as claimed in Claim 6, wherein the formed third level metal wiring structure (333) including redundant metal via portion (332) and Bao teaches super via portion (SUPER V1) is formed of a damascene metal material and said further metal via comprises a metal.
In re claims 5 and 7, the following limitation makes it a product by process claim: a) " subtractive etch metal," (claim 7) and "non-etchable damascene metal" (claim 5);
The MPEP § 2113, states, "Even though product -by[-] process claims are limited by and defined by the process, determination of patentability is based upon the product itself. The patentability of a product does not depend on its method of production. If the product in product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product is made by a different process." In re Thorpe, 227 USPQ 964, 966 (Fed. Cir. 1985)(citations omitted).
A "product by process" claim is directed to the product per se, no matter how actually made, In re Hirao and Sato et al., 190 USPQ 15 at 17 (CCPA 1976) (footnote 3). See also In re Brown and Saffer, 173 USPQ 685 (CCPA 1972): In re Luck and Gainer, 177 USPQ 523 (CCPA 1973); In re Fessmann, 180 USPQ 324 (CCPA 1974); and In re Marosi et al., 218 USPQ 289 (CAFC 1983) final product per se which must be determined in a ''product by, all of' claim, and not the patentability of the process, and that an old or obvious product, whether claimed in ''product by process" claims or not. Note that Applicant has the burden of proof in such cases, as the above case-law makes clear.
Response to Arguments
Applicant's arguments filed 12/08/2025 have been fully considered but they are moot due to a new ground of rejection.
For the above reasons, it is believed that the rejections should be sustained.
Conclusion
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/TONY TRAN/Primary Examiner, Art Unit 2893