ADAPTIVE INDUCTANCE COMPENSATION IN A WELDING CIRCUIT

Application No. 17/537,644

• Filed: Nov 30, 2021
• Examiner: TRAN-LE, THAO UYEN
• Art Unit: 3761
• Tech Center: 3700 — Mechanical Engineering & Manufacturing
• Assignee: Esab AB
• OA Round: 4 (Final)

Office Action

DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .

Response to Amendment
This action is responsive to the amendments filed 03/30/2026. Claims 1-2, 4-7, 12-14, 16-19, 22-27 are pending in this application. As directed, claims 12 and 23 have been amended; claims 3, 8-11, 15, 20-21 cancelled.
With respect to Claim Objections: Applicant’s amendments to the Claims have overcome the Claim Objections set forth in the Non-Final Office Action dated 12/30/2025.

Response to Arguments
With respect to 35 U.S.C. 102 & 103 Claim Rejections: Applicant(s)’ arguments filed 03/30/2026 have been fully considered but they are not persuasive for the following reasons:
Applicant(s)’ Argument: (Regarding independents claims 1, 13, 24 – see details on pages 8-10 & 13-14 of the Remarks dated 03/30/2026)
Applicant alleged that the prior art on record Davidson does not disclose the limitations: “a measured arc voltage pulse that has a rising voltage ramp and a falling voltage ramp that straddle a flat peak”, “first deriving an inductance signal that indicates the inductance based on the magnitude” and “third deriving an overshoot canceling voltage based on the inductance signal and the slope signal” as recited in the independent claim 1 (lines 4-5, 9, 12-13), see details on pages 8-10 of the Remarks dated 03/30/2026.
Applicant’s arguments regarding the independent claims 13 and 24 are the same as provided for the independent claim 1, see details on pages 8-10 & 13-14 of the Remarks dated 03/30/2026.
Examiner’s Response:
In response to Applicant’s arguments that the prior art Davidson does not disclose the limitations “first deriving an inductance signal that indicates the inductance based on the magnitude” and “third deriving an overshoot canceling voltage based on the inductance signal and the slope signal” as recited in the independent claim 1 (lines 9 & 12-13), Examiner respectfully disagrees because Applicant’s arguments are narrower than the claim recitation. It is noted that the independent claim 1 does not require calculating, storing, or outputting a numerical inductance value. Rather, claim 1 broadly recites deriving “an inductance signal that indicates the inductance based on the magnitude”. It is noted that inductance signal encompasses information or a signal representative of an induction-caused response in the welding circuit. Claim 1 does not require the inductance signal to be expressed as a separate inductance parameter in units of henries. In this case, the prior art Davidson explicitly discloses that the voltage overshoot shown in Fig.5 of Davidson results from inductance in the weld cables and states that “the magnitude of the voltage rise is typically determined by multiplying the derivative of stud current over time by the inductance present in the weld cables” in Par.0025 of Davidson. Thus, Davidson directly associates the magnitude of the overshoot voltage with the inductance present in the welding circuit and the current ramp rate. Davidson further discloses measuring the rising peak ramp stud voltage, measuring the rising peak ramp stud current [Par.0026], measuring the ramp rate [Par.0026], calculating an overshoot average ramp voltage [Par.0030], and calculating an instantaneous overshoot voltage [Par.0031]. The overshoot average ramp voltage is derived from the measured overshoot magnitude and represents the inductive voltage contribution associated with the weld cable inductance. Therefore, Davidson’s overshoot average ramp voltage constitutes an inductance signal because it is a signal derived from and indicative of the inductance-caused voltage response of the welding circuit.
Applicant additionally alleged that the prior art Davidson does not derive an overshoot canceling voltage based on the inductance signal and the slope signal, Applicant’s arguments have been fully considered but they are not persuasive because Davidson calculates an instantaneous overshoot voltage using both overshoot information and ramp-rate information. Specifically, Davidson calculates the instantaneous overshoot voltage based on the overshoot average ramp voltage and the instantaneous ramp rate relative to the average ramp rate. The ramp rate corresponds to the claimed slope signal, while the overshoot average ramp voltage corresponds to the claimed inductance signal because it represents the inductance-caused overshoot component. Davidson then subtracts the instantaneous overshoot voltage from the measured stud voltage to obtain a compensated stud voltage. Accordingly, Davidson derives an overshoot-canceling voltage based on the inductance-related overshoot information and the slope information and uses that voltage to cancel the overshoot.
Applicant further alleged that the prior art Davidson does not disclose a measured arc voltage pulse having a rising voltage ramp and a falling voltage ramp that straddle a flat peak, Applicant’s arguments have been fully considered but they are not persuasive because Fig.5 of Davidson explicitly shows that a voltage waveform including a rising portion 92, a peak voltage level 96, and a falling portion 98. Davidson further discloses increased portion 94 that exceeds peak voltage 96 before falling toward the peak level. Thus, Davidson discloses a positive overshoot voltage that exceeds a flat peak and discloses rising and falling portions disposed on opposite sides of the peak level. It is further note that the claim 1 does not require any particular geometric shape, duration, or immediate adjacency of the waveform portions beyond the recited relationship. Therefore, Davidson properly discloses the claimed waveform structure.
Given above reasons, Davidson properly discloses all limitations recited in the independent claim 1.
Applicant’s arguments regarding the independent claims 13 and 24 are the same as provided for the independent claim 1. Therefore, the Examiner’s response to the arguments regarding the independent claim 1 generally applies to the independent claims 13 and 24.
Accordingly, Applicant’s arguments regarding the independent claims 1, 13, and 24 are not persuasive. Therefore, the rejections of the independent claims 1, 13, and 24 are maintained in this Office Action, see details in the 35 U.S.C. 102 & 103 Claim Rejections sections below.

Applicant(s)’ Argument: (Regarding claims 5, 17, 27 – see details on pages 10-12 & 14-15 of the Remarks dated 03/30/2026)
Applicant alleged that the prior art Davidson does not disclose the limitations “measuring the magnitude includes measuring a difference between voltage levels of (i) a positive peak of the overshoot voltage that exceeds the flat peak, and (ii) the flat peak” as recited in claim 5 (lines 2-3), see details on pages 10-12 of the Remarks dated 03/30/2026.
Applicant’s arguments regarding claims 17 and 27 are the same as provided for claim 5, see details on pages 10-12 & 14-15 of the Remarks dated 03/30/2026.
Examiner’s Response:
In response to Applicant’s arguments that the prior art Davidson does not disclose the limitations “measuring the magnitude includes measuring a difference between voltage levels of (i) a positive peak of the overshoot voltage that exceeds the flat peak, and (ii) the flat peak” as recited in claim 5 (lines 2-3), Applicant’s arguments have been fully considered but they are not persuasive because Davidson’s Fig.5 explicitly discloses that a stud voltage waveform 84 including an increased portion 94 that rises above peak voltage 96 due to inductance introduced by the weld cabling. Davidson further explains that the voltage rises above the desired waveform while ramping due to cable inductance and that the magnitude of the voltage rise is associated with the inductance present in the weld cables. Thus, Davidson explicitly discloses an overshoot voltage that exceeds a peak voltage level. A person of ordinary skill in the art would understand that the magnitude of such an overshoot is the difference between the overshoot peak and the underlying peak voltage level from which the overshoot extends. Stated differently, once Davidson identifies a voltage rise above the peak voltage 96, the amount of that rise is necessarily determined by comparing the overshoot voltage level to the peak voltage 96. Therefore, Davidson inherently discloses measured the claimed difference. Davidson’s waveform shown in Fig.5 expressly includes an overshoot portion above peak voltage 96, and determining the magnitude of that overshoot necessarily entails determining the difference between the overshoot level and peak voltage 96. Furthermore, Davidson’s compensation technique relies on quantifying the overshoot caused by weld cable inductance in order to generate a compensation value. Because the amount of overshoot is defined by the extent to which the overshoot exceeds the peak level of the waveform, Davidson necessarily determines the claimed difference when evaluating the overshoot magnitude.
Given above reasons, Davidson properly discloses all limitations recited in claim 5.
Applicant’s arguments regarding claims 17 and 27 are the same as provided for claim 5. Therefore, the Examiner’s response to the arguments regarding claim 5 generally applies to the claims 17 and 27.
Accordingly, Applicant’s arguments regarding the claims 5, 17 and 27 are not persuasive. Therefore, the rejections of claims 5, 17 and 27 are maintained in this Office Action, see details in the 35 U.S.C. 102 & 103 Claim Rejections sections below.

Applicant(s)’ Argument: (Regarding claims 6 and 18 – see details on pages 12-13 of the Remarks dated 03/30/2026)
Applicant alleged that the prior art Davidson does not disclose the limitations “measuring the magnitude includes determining a difference between (i) an average of a first voltage level of the flat peak and a second voltage level of a direct current (DC) floor of the measured are voltage pulse, and (ii) a third voltage level on the rising voltage ramp” as recited in claim 6 (lines 2-4), see details on pages 12-13 of the Remarks dated 03/30/2026.
Applicant’s arguments regarding claim 18 are the same as provided for claim 6, see details on pages 12-13 of the Remarks dated 03/30/2026.
Examiner’s Response:
In response to Applicant’s arguments that the prior art Davidson does not disclose the limitations “measuring the magnitude includes determining a difference between (i) an average of a first voltage level of the flat peak and a second voltage level of a direct current (DC) floor of the measured are voltage pulse, and (ii) a third voltage level on the rising voltage ramp” as recited in claim 6 (lines 2-4), Examiner respectfully disagrees because Davidson’s Ideal Stud Ramp Voltage is calculated using Average Peak Voltage and Average Background Voltage [Davidson Fig.6 & Par.0029], i.e., the same upper and lower voltage levels defining the desired waveform. Specifically, Davidson determines an ideal ramp voltage according to the relationship: Ideal Stud Ramp Voltage = [(Current Ramp% / 100%) * (Average Peak Voltage − Average Background Voltage)] + Background Voltage [Davidson Par.0029]. This calculation produces an intermediate reference voltage between the background/DC floor level and the peak/flat level of the desired waveform. Thus, Davidson’s Ideal Stud Ramp Voltage is a computed average/intermediate voltage level derived from the flat peak voltage and DC/background floor voltage. It is noted that claim 6 does not require that the “average” be limited to a 50/50 arithmetic average, nor does the claim exclude a weighted average or ramp-percentage-based average. Applicant’s interpretation would improperly import a narrower mathematical definition into the claim. In this case, Davidson’s Ideal Stud Ramp Voltage reasonably corresponds to the claimed average because it is calculated from the peak voltage level and the background/DC floor voltage level and represents the expected voltage level between those two waveform levels at a given point on the ramp.
Applicant further alleged that Davidson does not determine a difference between the claimed average and a third voltage level on the rising voltage ramp, Applicant’s arguments have been fully considered but they are not persuasive because Davidson Par.0030 discloses the following equation: Overshoot Average Ramp Voltage = Measured Average Stud Ramp Voltage - Ideal Stud Ramp Voltage. The Measured Average Stud Ramp Voltage corresponds to a measured voltage level on the rising ramp of the voltage waveform 84, while the Ideal Stud Ramp Voltage corresponds to the expected reference voltage derived from the peak and background/DC levels. The resulting difference is Davidson’s overshoot average ramp voltage, which quantifies the amount by which the measured rising-ramp voltage exceeds the ideal/reference rising-ramp voltage due to inductance in the weld cable. Davidson further explains that the voltage rise during ramping is caused by cable inductance that the magnitude of the voltage rise is determined by the derivative of the stud current over time multiplied by the inductance present in the weld cables in Par.0025.
Given above reasons, Davidson properly discloses all limitations recited in claim 6.
Applicant’s arguments regarding claim 18 are the same as provided for claim 6. Therefore, the Examiner’s response to the arguments regarding claim 6 generally applies to the claim 18.
Accordingly, Applicant’s arguments regarding the claims 6 and 18 are not persuasive. Therefore, the rejections of claims 6 and 18 are maintained in this Office Action, see details in the 35 U.S.C. 102 Claim Rejections sections below.

Applicant(s)’ Argument: (Regarding claim 23 – see details on page 13 of the Remarks dated 03/30/2026)
Applicant alleged that the prior art Davidson does not disclose the limitations “measuring the difference includes sampling and holding the voltage levels of the positive peak and the flat peak” as recited in claim 23 (lines 2-3), see details on page 13 of the Remarks dated 03/30/2026.
Examiner’s Response:
In response to Applicant’s arguments that the prior art Davidson does not disclose the limitations “measuring the difference includes sampling and holding the voltage levels of the positive peak and the flat peak” as recited in claim 23 (lines 2-3), Examiner respectfully disagrees because claim 23 recites that measuring the difference includes “sampling and holding” the voltage levels of the positive peak and the flat peak. It is noted that the claim 23 does not require a dedicated analog sample-and-hold circuit, a particular hardware implementation, or any specified duration for which the sampled values must be retained. Rather, under the broadest reasonable interpretation, sampling and holding encompasses obtaining voltage measurements and retaining those measurements for subsequent processing. In this case, Davidson explicitly discloses a welding power source including controller 48, processor 50, and memory 52. Davidson further discloses measuring stud voltage values, calculating overshoot average ramp voltage, calculating instantaneous overshoot voltage, and generating compensated stud voltage values based on those measurements. In order for processor 50 to perform these calculations, the measured voltage values must necessarily be retained and available for subsequent processing. A processor cannot calculate a difference between measured waveform quantities unless the measured values are first sampled and then maintained, i.e., held, for use in the calculation sequence. Thus, Davidson inherently performs the claimed sampling and holding operation. Davidson’s controller obtains waveform measurements, stores or otherwise retains those measurements, and subsequent uses the retained measurements to calculate overshoot compensation values. Such operation necessarily includes sampling and holding the measured voltage levels while the compensation calculations are performed. Furthermore, Davidson’s flowchart of Fig.6 discloses repeated measurement and processing operations, including waveform measurements performed once per waveform and compensation calculations performed by the controller. The repeated use of previously measured waveform information in subsequent calculations confirms that the measured voltage values are retained for processing rather than being instantaneously discarded. It is further noted that Davidson Fig.6 and Par.0027 discloses the method 104 also calls for performing a block 124 of steps once per waveform (e.g., approximately every 30 to 300 Hz) and a block 126 of steps each time the controller 48 loops through the control loop (e.g., approximately every 20,000 to 40,000 Hz).
Given above reasons, Davidson properly discloses all limitations recited in claim 23.
Accordingly, Applicant’s arguments regarding claim 23 are not persuasive. Therefore, the rejections of claim 23 are maintained in this Office Action, see details in the 35 U.S.C. 102 Claim Rejections sections below.

Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –

(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.

Claims 1-2, 4-6, 12-14, 16-18, 22-23 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Davidson et al. (U.S. Pub. No. 2014/0076871 A1, previously cited).
Regarding claim 1, Davidson discloses a method (method 104, Davidson Fig.6) performed by a controller (weld controller 48 and processor 50, Davidson Fig.2) of a power supply (welding power source 12, Davidson Fig.2) configured to provide a current pulse (current waveform 82, Davidson Fig.5) through a welding circuit (welding circuit includes circuitry within 24, 30, 32 [Davidson Fig.1] and circuitry within the welding power source 12 [Davidson Fig.2]) (Davidson Fig.1 shows the welding system 10, thus, there is welding circuit associated with it as shown in Davidson Figs.1-2) to create an arc for welding (Davidson Par.0015 discloses: “For example, the provided embodiments enable a welding arc to be compensated for a secondary response, such as the inductance and resistance of the weld cables, without the need for voltage sensing leads.”), comprising:
receiving a measured arc voltage pulse (the measured stud voltage of the voltage waveform 84, Davidson Fig.5 & Par.0032) that has a rising voltage ramp (rising voltage ramp, Davidson annotated Fig.5 below) and a falling voltage ramp (falling voltage ramp, Davidson annotated Fig.5 below) that straddle a flat peak (peak voltage 96, Davidson Fig.5), and an overshoot voltage (overshoot voltage is the voltage rises to levels beyond the peak voltage 96 before falling, Davidson annotated Fig.5 below) on the rising voltage ramp (rising voltage ramp, Davidson annotated Fig.5 below) that exceeds the flat peak (peak voltage 96, Davidson Fig.5) and represents an inductive voltage drop due to an inductance in the welding circuit (welding circuit includes circuitry within 24, 30, 32 [Davidson Fig.1] and circuitry within the welding power source 12 [Davidson Fig.2]) and a rising current ramp (ramping portion 86, Davidson Fig.5) of the current pulse (current waveform 82, Davidson Fig.5) (Davidson Par.0018 discloses: “The processor 50 is configured to receive a variety of inputs regarding wire feeder operation, user choices, voltage feedback, current feedback, power feedback, resistance feedback, inductance feedback, and so forth, to process such inputs, and to generate a variety of suitable outputs that guide operation of the welding power source 12.”, and Davidson Par.0024 discloses: “For example, in many instances, due to the inductance introduced by the weld cabling, the stud voltage will rise above the level in the desired waveform while ramping. An example of a normalized stud current waveform 82 and a normalized stud voltage waveform 84 for an example instance in which inductance is introduced by weld cabling is shown in FIG. 5”; therefore, Davidson discloses the overshoot voltage on the rising voltage ramp that exceeds the flat peak and represents inductive voltage drop due to inductance in the welding circuit and ramping portion 86 of the welding current pulse);
measuring a magnitude of the overshoot voltage (overshoot voltage is the voltage rises to levels beyond the peak voltage 96 before falling, Davidson annotated Fig.5 below) that exceeds the flat peak (peak voltage 96, Davidson Fig.5) (Davidson Par.0025 discloses: “the magnitude of the voltage rise is typically determined by multiplying the derivative of stud current over time by the inductance present in the weld cables”, and Davidson Par.0030 discloses “For example, in some embodiments, the following equation may be utilized to calculate the overshoot average ramp voltage: Overshoot Average Ramp Voltage=Measured Average Stud Ramp Voltage-Ideal Stud Ramp Voltage”);
first deriving an inductance signal (Davidson Par.0022 discloses the stud voltage will rise above the level in the desired waveform while ramping when inductance is introduced by the weld cabling, and Davidson Par.0018 discloses the processor 50 is configured to receive inductance feedback; thus, the inductance signal is derived) that indicates the inductance based on the magnitude (Davidson Par.0022 discloses the stud voltage will rise above the level in the desired waveform while ramping when inductance is introduced by the weld cabling, and Davidson Par.0018 discloses the processor 50 is configured to receive inductance feedback, and Davidson Par.0025 further discloses the magnitude of the voltage rise is determined by multiplying the derivative of stud current over time by the inductance present in the weld cables; thus, the inductance signal that indicates the inductance based on the magnitude; to be more specifically, Davidson Par.0014 discloses: “such systems and methods may enable identification of a secondary weld error in the form of an inductance error due to weld cabling”, Davidson Par.0022 discloses: “ FIG. 5 illustrates example stud voltage and current waveforms that may be obtained when secondary weld errors, such as inductance errors, are introduced by the secondary weld components, such as the weld cabling.”, Davidson Par.0024 discloses: “For example, in many instances, due to the inductance introduced by the weld cabling, the stud voltage will rise above the level in the desired waveform while ramping. An example of a normalized stud current waveform 82 and a normalized stud voltage waveform 84 for an example instance in which inductance is introduced by weld cabling is shown in FIG. 5.”, Davidson Par.0025 discloses: “As appreciated by those skilled in the art, the magnitude of the voltage rise is typically determined by multiplying the derivative of stud current over time by the inductance present in the weld cables.”, and Davidson Par.0018 discloses: “The processor 50 is configured to receive a variety of inputs regarding wire feeder operation, user choices, voltage feedback, current feedback, power feedback, resistance feedback, inductance feedback, and so forth, to process such inputs, and to generate a variety of suitable outputs that guide operation of the welding power source 12.”);
second deriving, from the rising current ramp (ramping portion 86, Davidson Fig.5), a slope signal indicative of a slope of the rising current ramp (signal that indicates slope of the ramping portion 86 because Davidson Par.0028 discloses average ramp rate of current (block 130 [see Fig.6 of Davidson]) from the ramping portion 86);
third deriving an overshoot canceling voltage (instantaneous overshoot voltage (block 136), Davidson Fig.6 & Par.0031) based on the inductance signal (signal that indicates the inductance because Davidson Par.0022 discloses the stud voltage will rise above the level in the desired waveform while ramping when inductance is introduced by the weld cabling, and Davidson Par.0018 discloses the processor 50 is configured to receive inductance feedback, as explained previously) and the slope signal (signal that indicates slope of the ramping portion 86 because Davidson Par.0028 discloses average ramp rate of current (block 130 [see Fig.6 of Davidson]), as explained previously) (it is noted that the instantaneous overshoot voltage is based on the inductance signal because the stud voltage will rise above the level in the desired waveform while ramping when inductance is introduced by the weld cabling, as indicated by Davidson Par.0022 or as explained previously; additionally, Davidson Par.0031 discloses an equation for calculating the instantaneous overshoot voltage based on the average ramp rate of current; therefore, Davidson discloses deriving instantaneous overshoot voltage based on the inductance signal and the slope signal); and
canceling the overshoot voltage (overshoot voltage is the voltage rises to levels beyond the peak voltage 96 before falling, Davidson annotated Fig.5 below) using the overshoot canceling voltage (instantaneous overshoot voltage (block 136), Davidson Fig.6 & Par.0031) to produce a compensated arc voltage pulse (compensated stud voltage (block 138), Davidson Fig.6 & Par.0032) (Davidson Par.0032 discloses: “the controller 48 may calculate a compensated stud voltage by subtracting the instantaneous overshoot voltage from the measured stud voltage (block 138)”).

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Regarding claim 2, Davidson discloses the method set forth in claim 1, and also discloses wherein:
third deriving the overshoot canceling voltage (instantaneous overshoot voltage (block 136), Davidson Fig.6 & Par.0031) includes third deriving the overshoot canceling voltage (instantaneous overshoot voltage (block 136), Davidson Fig.6 & Par.0031) to be equal in magnitude and opposite in polarity to the overshoot voltage (overshoot voltage is the voltage rises to levels beyond the peak voltage 96 before falling, Davidson annotated Fig.5 below) (Davidson Par.0032 discloses: “the controller 48 may calculate a compensated stud voltage by subtracting the instantaneous overshoot voltage from the measured stud voltage (block 138)”, it is noted that subtracting the instantaneous overshoot voltage means minus the instantaneous overshoot voltage (i.e., negative the instantaneous overshoot voltage), which is equal in magnitude and opposite in polarity to the overshoot voltage); and
canceling includes summing the overshoot canceling voltage (negative instantaneous overshoot voltage, as explained previously) with the measured arc voltage pulse (the measured stud voltage of the voltage waveform 84, Davidson Fig.5 & Par.0032) (Davidson Par.0032 discloses: “the controller 48 may calculate a compensated stud voltage by subtracting the instantaneous overshoot voltage from the measured stud voltage (block 138)”; thus, compensated stud voltage = the measured stud voltage - the instantaneous overshoot voltage = - the instantaneous overshoot voltage + the measured stud voltage = summing the negative instantaneous overshoot voltage with the measured stud voltage; therefore, canceling includes summing the overshoot canceling voltage with the measured arc voltage pulse).

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Regarding claim 4, Davidson discloses the method set forth in claim 1, and also discloses further comprising:
implementing an inductance-compensation feedback loop that includes repeating, for a next measured arc voltage pulse, receiving, measuring, first deriving, second deriving, third deriving, and canceling to cancel any remaining overshoot voltage (Davidson Fig.6 shows the feedback loop that includes repeating, for a next measured arc voltage pulse, receiving, measuring, first deriving, second deriving, third deriving, and canceling to cancel any remaining overshoot voltage).

Regarding claim 5, Davidson discloses the method set forth in claim 1, and also discloses wherein:
measuring the magnitude includes measuring a difference between voltage levels of (i) a positive peak of the overshoot voltage that exceeds the flat peak (peak voltage 96, Davidson Fig.5) (positive peak of the overshoot voltage that exceeds the peak voltage 96 is Measured Average Stud Ramp Voltage, Davidson Fig.6 & Par.0030), and (ii) the flat peak (peak voltage 96, Davidson Fig.5) (peak voltage 96 is Ideal Stud Ramp Voltage, Davidson Fig.6 & Par.0030) (Davidson Par.0030 discloses the following equation: Overshoot Average Ramp Voltage=Measured Average Stud Ramp Voltage-Ideal Stud Ramp Voltage); and
first deriving includes first deriving the inductance signal based on the difference (Davidson Par.0022 discloses the stud voltage will rise above the level in the desired waveform while ramping when inductance is introduced by the weld cabling, Davidson Par.0018 discloses the processor 50 is configured to receive inductance feedback, Davidson Par.0025 further discloses the magnitude of the voltage rise is determined by multiplying the derivative of stud current over time by the inductance present in the weld cables, and Davidson Par.0030 discloses Overshoot Average Ramp Voltage=Measured Average Stud Ramp Voltage-Ideal Stud Ramp Voltage; thus, the inductance signal that indicates the inductance based on the difference; to be more specifically, Davidson Par.0014 discloses: “such systems and methods may enable identification of a secondary weld error in the form of an inductance error due to weld cabling”, Davidson Par.0022 discloses: “ FIG. 5 illustrates example stud voltage and current waveforms that may be obtained when secondary weld errors, such as inductance errors, are introduced by the secondary weld components, such as the weld cabling.”, Davidson Par.0024 discloses: “For example, in many instances, due to the inductance introduced by the weld cabling, the stud voltage will rise above the level in the desired waveform while ramping. An example of a normalized stud current waveform 82 and a normalized stud voltage waveform 84 for an example instance in which inductance is introduced by weld cabling is shown in FIG. 5.”, Davidson Par.0025 discloses: “As appreciated by those skilled in the art, the magnitude of the voltage rise is typically determined by multiplying the derivative of stud current over time by the inductance present in the weld cables.”, and Davidson Par.0018 discloses: “The processor 50 is configured to receive a variety of inputs regarding wire feeder operation, user choices, voltage feedback, current feedback, power feedback, resistance feedback, inductance feedback, and so forth, to process such inputs, and to generate a variety of suitable outputs that guide operation of the welding power source 12.”).

Regarding claim 6, Davidson discloses the method set forth in claim 1, and also discloses wherein:
measuring the magnitude includes determining a difference between (i) an average of a first voltage level of the flat peak and a second voltage level of a direct current (DC) (Davidson Fig.5 shows DC current waveform 82) floor of the measured arc voltage pulse (the measured stud voltage of the voltage waveform 84, Davidson Fig.5 & Par.0032) (an average of a first voltage level of the flat peak and a second voltage level of a direct current (DC) is the Ideal Stud Ramp Voltage because Ideal Stud Ramp Voltage equation is utilized to calculate the average ramp voltage using Average Peak Voltage and Average Background Voltage, Davidson Fig.6 & Par.0029), and (ii) a third voltage level on the rising voltage ramp (Ideal Stud Ramp Voltage, Davidson Fig.6 & Par.0030) (Davidson Par.0030 discloses the following equation: Overshoot Average Ramp Voltage=Measured Average Stud Ramp Voltage-Ideal Stud Ramp Voltage); and
first deriving includes first deriving the inductance signal based on the difference (Davidson Par.0022 discloses the stud voltage will rise above the level in the desired waveform while ramping when inductance is introduced by the weld cabling, Davidson Par.0018 discloses the processor 50 is configured to receive inductance feedback, Davidson Par.0025 further discloses the magnitude of the voltage rise is determined by multiplying the derivative of stud current over time by the inductance present in the weld cables, and Davidson Par.0030 discloses Overshoot Average Ramp Voltage=Measured Average Stud Ramp Voltage-Ideal Stud Ramp Voltage; thus, the inductance signal that indicates the inductance based on the difference; to be more specifically, Davidson Par.0014 discloses: “such systems and methods may enable identification of a secondary weld error in the form of an inductance error due to weld cabling”, Davidson Par.0022 discloses: “ FIG. 5 illustrates example stud voltage and current waveforms that may be obtained when secondary weld errors, such as inductance errors, are introduced by the secondary weld components, such as the weld cabling.”, Davidson Par.0024 discloses: “For example, in many instances, due to the inductance introduced by the weld cabling, the stud voltage will rise above the level in the desired waveform while ramping. An example of a normalized stud current waveform 82 and a normalized stud voltage waveform 84 for an example instance in which inductance is introduced by weld cabling is shown in FIG. 5.”, Davidson Par.0025 discloses: “As appreciated by those skilled in the art, the magnitude of the voltage rise is typically determined by multiplying the derivative of stud current over time by the inductance present in the weld cables.”, and Davidson Par.0018 discloses: “The processor 50 is configured to receive a variety of inputs regarding wire feeder operation, user choices, voltage feedback, current feedback, power feedback, resistance feedback, inductance feedback, and so forth, to process such inputs, and to generate a variety of suitable outputs that guide operation of the welding power source 12.”).

Regarding claim 12, Davidson discloses the method set forth in claim 1, and also discloses wherein:
the current pulse (current waveform 82, Davidson Fig.5) is provided to a welding torch (welding torch 16, Davidson Fig.1) through a welding cable (cable 30, Davidson Fig.1) having the inductance (Davidson Par.0024 discloses: “due to the inductance introduced by the weld cabling, the stud voltage will rise above the level in the desired waveform while ramping”; therefore, the current waveform 82 to the welding torch 16 through cable 30 having the inductance); and
receiving includes receiving the measured arc voltage pulse (the measured stud voltage of the voltage waveform 84, Davidson Fig.5 & Par.0032) from a sense point on one of the welding cable (cable 30, Davidson Fig.1) (Davidson Par.0006 discloses: “The compensated stud voltage corresponds to a voltage level at the welding location reduced from the measured stud voltage due to inductance and resistance in the torch cable.”) or the power supply (it is noted that the limitation “one of the welding cable or the power supply” is in alternative form; therefore, only one of these was required during examination) that is spaced-apart from the arc (it is noted that the arc in welding is discharge that forms a bridge between the tip of the welding torch and the workpiece being welded; therefore, the measured arc voltage pulse from a sense point on one of the welding cable 30 that is spaced-apart from the arc discharged from the tip of the welding torch 16).

Regarding claim 13, Davidson discloses an apparatus (welding system 10, Davidson Fig.1) comprising:
a power supply (power conversion circuitry 56, Davidson Fig.2) to supply a welding current pulse (current waveform 82, Davidson Fig.5) (Davidson Par.0018 discloses: “the power conversion circuitry 56 receives primary power from a primary source, such as a wall outlet, a power grid, and so forth, and converts such power to an appropriate welding output for transfer to the welding torch 16.”) through a welding circuit (welding circuit includes circuitry within 24, 30, 32 [Davidson Fig.1] and circuitry within the welding power source 12 [Davidson Fig.2]) (Davidson Fig.1 shows the welding system 10, thus, there is welding circuit associated with it as shown in Davidson Figs.1-2) to produce an arc for a welding operation (Davidson Par.0015 discloses: “For example, the provided embodiments enable a welding arc to be compensated for a secondary response, such as the inductance and resistance of the weld cables, without the need for voltage sensing leads.”;); and
an inductance compensator (weld controller 48 and processor 50, Davidson Fig.2) configured to perform:
receiving a measured arc voltage pulse (the measured stud voltage of the voltage waveform 84, Davidson Fig.5 & Par.0032) from a sense point at the power supply or the welding circuit (welding circuit includes circuitry within 24, 30, 32 [Davidson Fig.1] and circuitry within the welding power source 12 [Davidson Fig.2]) (it is noted that the limitation “the power supply or the welding circuit” is in alternative form; therefore, only one of these was required during examination. In this case, Davidson discloses welding circuit because Davidson Par.0006 discloses: “The compensated stud voltage corresponds to a voltage level at the welding location reduced from the measured stud voltage due to inductance and resistance in the torch cable.”), wherein the measured arc voltage pulse (the measured stud voltage of the voltage waveform 84, Davidson Fig.5 & Par.0032) includes has a rising voltage ramp (rising voltage ramp, Davidson annotated Fig.5 below), a flat peak (peak voltage 96, Davidson Fig.5), and an overshoot voltage (overshoot voltage is the voltage rises to levels beyond the peak voltage 96 before falling, Davidson annotated Fig.5 below) on the rising voltage ramp (rising voltage ramp, Davidson annotated Fig.5 below) that exceeds the flat peak (peak voltage 96, Davidson Fig.5) and represents an inductive voltage drop due to an inductance in the welding circuit (welding circuit includes circuitry within 24, 30, 32 [Davidson Fig.1] and circuitry within the welding power source 12 [Davidson Fig.2]) and a rising current ramp (ramping portion 86, Davidson Fig.5) of the current pulse (current waveform 82, Davidson Fig.5) (Davidson Par.0018 discloses: “The processor 50 is configured to receive a variety of inputs regarding wire feeder operation, user choices, voltage feedback, current feedback, power feedback, resistance feedback, inductance feedback, and so forth, to process such inputs, and to generate a variety of suitable outputs that guide operation of the welding power source 12.”, and Davidson Par.0024 discloses: “For example, in many instances, due to the inductance introduced by the weld cabling, the stud voltage will rise above the level in the desired waveform while ramping. An example of a normalized stud current waveform 82 and a normalized stud voltage waveform 84 for an example instance in which inductance is introduced by weld cabling is shown in FIG. 5”; therefore, Davidson discloses the overshoot voltage on the rising voltage ramp that exceeds the flat peak and represents inductive voltage drop due to inductance in the welding circuit and ramping portion 86 of the welding current pulse);
measuring a magnitude of the overshoot voltage (overshoot voltage is the voltage rises to levels beyond the peak voltage 96 before falling, Davidson annotated Fig.5 below) (Davidson Par.0025 discloses: “the magnitude of the voltage rise is typically determined by multiplying the derivative of stud current over time by the inductance present in the weld cables”, and Davidson Par.0030 discloses “For example, in some embodiments, the following equation may be utilized to calculate the overshoot average ramp voltage: Overshoot Average Ramp Voltage=Measured Average Stud Ramp Voltage-Ideal Stud Ramp Voltage”);
first deriving an inductance signal (Davidson Par.0022 discloses the stud voltage will rise above the level in the desired waveform while ramping when inductance is introduced by the weld cabling, and Davidson Par.0018 discloses the processor 50 is configured to receive inductance feedback; thus, the inductance signal is derived) that indicates the inductance based on the magnitude (Davidson Par.0022 discloses the stud voltage will rise above the level in the desired waveform while ramping when inductance is introduced by the weld cabling, and Davidson Par.0018 discloses the processor 50 is configured to receive inductance feedback, and Davidson Par.0025 further discloses the magnitude of the voltage rise is determined by multiplying the derivative of stud current over time by the inductance present in the weld cables; thus, the inductance signal that indicates the inductance based on the magnitude; to be more specifically, Davidson Par.0014 discloses: “such systems and methods may enable identification of a secondary weld error in the form of an inductance error due to weld cabling”, Davidson Par.0022 discloses: “ FIG. 5 illustrates example stud voltage and current waveforms that may be obtained when secondary weld errors, such as inductance errors, are introduced by the secondary weld components, such as the weld cabling.”, Davidson Par.0024 discloses: “For example, in many instances, due to the inductance introduced by the weld cabling, the stud voltage will rise above the level in the desired waveform while ramping. An example of a normalized stud current waveform 82 and a normalized stud voltage waveform 84 for an example instance in which inductance is introduced by weld cabling is shown in FIG. 5.”, Davidson Par.0025 discloses: “As appreciated by those skilled in the art, the magnitude of the voltage rise is typically determined by multiplying the derivative of stud current over time by the inductance present in the weld cables.”, and Davidson Par.0018 discloses: “The processor 50 is configured to receive a variety of inputs regarding wire feeder operation, user choices, voltage feedback, current feedback, power feedback, resistance feedback, inductance feedback, and so forth, to process such inputs, and to generate a variety of suitable outputs that guide operation of the welding power source 12.”);
second deriving a slope signal indicative of a slope of the rising current ramp (signal that indicates slope of the ramping portion 86 because Davidson Par.0028 discloses average ramp rate of current (block 130 [see Fig.6 of Davidson]) from the ramping portion 86);
third deriving an overshoot canceling voltage (instantaneous overshoot voltage (block 136), Davidson Fig.6 & Par.0031) based on the inductance signal (signal that indicates the inductance because Davidson Par.0022 discloses the stud voltage will rise above the level in the desired waveform while ramping when inductance is introduced by the weld cabling, and Davidson Par.0018 discloses the processor 50 is configured to receive inductance feedback, as explained previously) and the slope signal (signal that indicates slope of the ramping portion 86 because Davidson Par.0028 discloses average ramp rate of current (block 130 [see Fig.6 of Davidson]), as explained previously) (it is noted that the instantaneous overshoot voltage is based on the inductance signal because the stud voltage will rise above the level in the desired waveform while ramping when inductance is introduced by the weld cabling, as indicated by Davidson Par.0022 or as explained previously; additionally, Davidson Par.0031 discloses an equation for calculating the instantaneous overshoot voltage based on the average ramp rate of current; therefore, Davidson discloses deriving instantaneous overshoot voltage based on the inductance signal and the slope signal); and
canceling the overshoot voltage (overshoot voltage is the voltage rises to levels beyond the peak voltage 96 before falling, Davidson annotated Fig.5 below) using the overshoot canceling voltage (instantaneous overshoot voltage (block 136), Davidson Fig.6 & Par.0031) to produce a compensated arc voltage pulse (compensated stud voltage (block 138), Davidson Fig.6 & Par.0032) (Davidson Par.0032 discloses: “the controller 48 may calculate a compensated stud voltage by subtracting the instantaneous overshoot voltage from the measured stud voltage (block 138)”).

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Regarding claim 14, Davidson discloses the apparatus set forth in claim 13, and also discloses wherein the inductance compensator (weld controller 48 and processor 50, Davidson Fig.2) is configured to perform:
third deriving by third deriving the overshoot canceling voltage (instantaneous overshoot voltage (block 136), Davidson Fig.6 & Par.0031) to be equal in magnitude and opposite in polarity to the overshoot voltage (overshoot voltage is the voltage rises to levels beyond the peak voltage 96 before falling, Davidson annotated Fig.5 below) (Davidson Par.0032 discloses: “the controller 48 may calculate a compensated stud voltage by subtracting the instantaneous overshoot voltage from the measured stud voltage (block 138)”, it is noted that subtracting the instantaneous overshoot voltage means minus the instantaneous overshoot voltage (i.e., negative the instantaneous overshoot voltage), which is equal in magnitude and opposite in polarity to the overshoot voltage); and
canceling by summing the overshoot canceling voltage (negative instantaneous overshoot voltage, as explained previously) with the measured arc voltage pulse (the measured stud voltage of the voltage waveform 84, Davidson Fig.5 & Par.0032) (Davidson Par.0032 discloses: “the controller 48 may calculate a compensated stud voltage by subtracting the instantaneous overshoot voltage from the measured stud voltage (block 138)”; thus, compensated stud voltage = the measured stud voltage - the instantaneous overshoot voltage = - the instantaneous overshoot voltage + the measured stud voltage = summing the negative instantaneous overshoot voltage with the measured stud voltage; therefore, canceling includes summing the overshoot canceling voltage with the measured arc voltage pulse).

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Regarding claim 16, Davidson discloses the apparatus set forth in claim 13, and also discloses wherein the inductance compensator (weld controller 48 and processor 50, Davidson Fig.2) is further configured to perform:
implementing an inductance-compensation feedback loop that includes repeating, for a next measured arc voltage pulse, receiving, measuring, first deriving, second deriving, third deriving, and canceling to cancel any remaining overshoot voltage (Davidson Fig.6 shows implementing an inductance-compensation feedback loop that includes repeating, for a next measured arc voltage pulse, receiving, measuring, first deriving, second deriving, third deriving, and canceling to cancel any remaining overshoot voltage).

Regarding claim 17, Davidson discloses the apparatus set forth in claim 13, and also discloses wherein the inductance compensator (weld controller 48 and processor 50, Davidson Fig.2) is configured to perform measuring the magnitude by:
measuring a difference between levels of (i) a positive peak of the overshoot voltage that exceeds the flat peak (peak voltage 96, Davidson Fig.5) (positive peak of the overshoot voltage that exceeds the peak voltage 96 is Measured Average Stud Ramp Voltage, Davidson Fig.6 & Par.0030), and (ii) the flat peak (peak voltage 96, Davidson Fig.5) (peak voltage 96 is Ideal Stud Ramp Voltage, Davidson Fig.6 & Par.0030) (Davidson Par.0030 discloses the following equation: Overshoot Average Ramp Voltage=Measured Average Stud Ramp Voltage-Ideal Stud Ramp Voltage).

Regarding claim 18, Davidson discloses the apparatus set forth in claim 13, and also discloses wherein the inductance compensator (weld controller 48 and processor 50, Davidson Fig.2) is configured to perform measuring the magnitude by:
determining a difference between (i) an average of a first voltage level of the flat peak and a second voltage level of a direct current (DC) (Davidson Fig.5 shows DC current waveform 82) floor of the measured arc voltage pulse (the measured stud voltage of the voltage waveform 84, Davidson Fig.5 & Par.0032) (an average of a first voltage level of the flat peak and a second voltage level of a direct current (DC) is the Ideal Stud Ramp Voltage because Ideal Stud Ramp Voltage equation is utilized to calculate the average ramp voltage using Average Peak Voltage and Average Background Voltage, Davidson Fig.6 & Par.0029), and (ii) a third voltage level on the rising voltage ramp (Ideal Stud Ramp Voltage, Davidson Fig.6 & Par.0030) (Davidson Par.0030 discloses the following equation: Overshoot Average Ramp Voltage=Measured Average Stud Ramp Voltage-Ideal Stud Ramp Voltage).

Regarding claim 22, Davidson discloses the apparatus set forth in claim 13, wherein the welding circuit includes:
a welding cable (cables 30 & 24, Davidson Fig.1) coupled to the power supply (power conversion circuitry 56, Davidson Fig.1) and a welding torch (welding torch 16, Davidson Fig.1) to deliver the current pulse (current waveform 82, Davidson Fig.5) to the welding torch (welding torch 16, Davidson Fig.1),
wherein the overshoot voltage (overshoot voltage is the voltage rises to levels beyond the peak voltage 96 before falling, Davidson annotated Fig.5 below) arises at least in part from inductance of the welding cable (cables 30 & 24, Davidson Fig.1) (Davidson Par.0006 discloses: “The compensated stud voltage corresponds to a voltage level at the welding location reduced from the measured stud voltage due to inductance and resistance in the torch cable.”, and Davidson Par.0024 discloses: “An example of a normalized stud current waveform 82 and a normalized stud voltage waveform 84 for an example instance in which inductance is introduced by weld cabling is shown in FIG. 5.”; therefore, the overshoot voltage arises at least in part from inductance of the welding cable).

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Regarding claim 23, Davidson discloses the method set forth in claim 5, and also discloses wherein:
measuring the difference includes sampling and holding the voltage levels of the positive peak (positive peak of the overshoot voltage that exceeds the peak voltage 96 is Measured Average Stud Ramp Voltage, Davidson Fig.6 & Par.0030) and the flat peak (peak voltage 96 is Ideal Stud Ramp Voltage, Davidson Fig.6 & Par.0030) (Davidson Par.0030 discloses the following equation: Overshoot Average Ramp Voltage=Measured Average Stud Ramp Voltage-Ideal Stud Ramp Voltage; it is further noted that Davidson Fig.6 and Par.0027 discloses the method 104 also calls for performing a block 124 of steps once per waveform (e.g., approximately every 30 to 300 Hz) and a block 126 of steps each time the controller 48 loops through the control loop (e.g., approximately every 20,000 to 40,000 Hz); therefore, measuring the difference includes sampling and holding the voltage levels of the positive peak and the flat peak).

Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.

The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 7 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Davidson et al. (U.S. Pub. No. 2014/0076871 A1, previously cited) in view of Johnson et al. (U.S. Pub. No. 2018/0257162 A1, previously cited) and Kang et al. (KR 20020066871 A, previously cited).
Regarding claim 7, Davidson discloses the method set forth in claim 1, but does not disclose:
prior to measuring, lowpass filtering the measured arc voltage pulse to reduce high frequency noise on the measured arc voltage pulse, while preserving a shape of the measured arc voltage pulse and the inductive voltage drop, to produce a filtered version of the measured arc voltage pulse,
wherein measuring includes measuring the magnitude of the overshoot voltage on the filtered version of the measured arc voltage pulse.
Johnson teaches a welding method (method is performed by welding system 100 as shown in Johnson Fig.1) comprising:
prior to measuring, lowpass filtering the measured arc voltage pulse to produce a filtered version of the measured arc voltage pulse (it is noted that the “measuring” herein is measuring a magnitude of the overshoot voltage as required by the independent claim 1; in this case, Johnson Pars.0046 & 0062 teaches lowpass filtering the voltage pulse, and then the filtered voltage pulse is used for compensating the voltage, therefore, Johnson teaches prior to measuring, lowpass filtering the voltage pulse to produce a filtered version of the voltage pulse; specifically, Johnson Par.0046 discloses: “The example voltage monitor 152 and/or the controller 134 perform filtering (e.g., analog and/or digital filtering) to determine a representative value of the voltage over a designated time period. ”, and Johnson Par.0062 teaches: “The example controller 112 avoids an unstable control loop situation caused by the data update rate mismatch and non-uniform network data arrival (e.g., variable sampling interval) by: 1) using low-pass filtered data for the voltage setpoint V.sub.cmd and the weld voltage feedback information V.sub.feeder to calculate the weld cable voltage drop V.sub.cableDrop and the adjusted voltage setpoint V.sub.AdjustedCmd; 2) calculating the adjusted voltage setpoint V.sub.AdjustedCmd when a valid weld voltage feedback information V.sub.feeder arrives via the weld cable 126 and use the most recently calculated value for the adjusted voltage setpoint V.sub.AdjustedCmd (e.g., until the next weld voltage feedback information arrives and a new value for the adjusted voltage setpoint is calculated); and 3) on start-up of the welding power supply, setting the adjusted voltage setpoint V.sub.AdjustedCmd to a maximum allowed value of the adjusted voltage setpoint V.sub.AdjustedCmd and allowing the system to adjust to the actual measured voltage drops.”)
wherein measuring includes measuring the magnitude of the overshoot voltage on the filtered version of the measured arc voltage pulse (it is noted that the primary reference Davidson already discloses measuring includes measuring the magnitude of the overshoot voltage of the measured arc voltage pulse, as cited and explained in the rejection of claim 1 above; and in this case, the prior art Johnson teaches lowpass filtering the voltage pulse, and then the filtered voltage pulse is used for calculations to compensate the welding voltage, as explained previously; therefore, in combination, Davidson in view of Johnson teaches measuring includes measuring the magnitude of the overshoot voltage on the filtered version of the measured arc voltage pulse).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Davidson, by adding the teachings of prior to measuring, lowpass filtering the measured arc voltage pulse to produce a filtered version of the measured arc voltage pulse, as taught by Johnson, in order to remove short-term fluctuations and interference from the welding process; additionally, the filter produces a smoother version of the signal by averaging out rapid fluctuations, making it easier to analyze the signal’s underlying trend and accurately determine critical parameters like the true peak of the voltage pulse; therefore, allowing for an accurate measurement of the voltage signal to obtain accurate overshoot voltage; thus, improve voltage compensation accuracy.
Davidson in view of Johnson does not explicitly teach:
lowpass filtering the measured arc voltage pulse to reduce high frequency noise on the measured arc voltage pulse, while preserving a shape of the measured arc voltage pulse and the inductive voltage drop
Kang teaches a welding method comprising:
lowpass filtering the measured arc voltage pulse to reduce high frequency noise on the measured arc voltage pulse, while preserving a shape of the measured arc voltage pulse and the inductive voltage drop (Kang annotated Figs.2(b) & 2(c) below shows that after filtering, the shape of the measured arc voltage pulse and the inductive voltage drop is preserved because the Instant Application defines “preserving” by “The LPF has a lowpass filter cutoff or 3dB bandwidth low enough to reduce high-frequency noise, voltage ripple, and harmonics of measured arc voltage Uarc_meas, but high enough to preserve the general shape of voltage pulse 310” as indicated by Par.0035 of the Instant Application, and “lowpass filtering results in a "clean" and reliable compensated arc voltage with minimal ripple” as indicated by Par.0063 of the Instant Application. In this case, Kang Translated Document on page 3 paragraph 4 teaches: “The voltage signal converter converts the voltage signal detected by the voltage detector through an operational amplifier, converts the level from 20V to 70V into 1-14V, and enters the filter. The signal detected by the voltage detector is converted to the welding machine in addition to the output voltage signal. High frequency noise is included in the frequency signal, so if the signal is used as a signal source, the controller may malfunction. Therefore, the low frequency filter is used to cut off the high frequency noise and input it to the differential circuit.”, and Kang annotated Figs.2(b) & 2(c) below shows that after filtering, the shape of the measured arc voltage pulse and the inductive voltage drop is preserved; therefore, Kang teaches lowpass filtering the measured arc voltage pulse to reduce high frequency noise on the measured arc voltage pulse, while preserving a shape of the measured arc voltage pulse and the inductive voltage drop)

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It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Davidson in view of Johnson, by adding the teachings of lowpass filtering the measured arc voltage pulse to reduce high frequency noise on the measured arc voltage pulse, while preserving a shape of the measured arc voltage pulse and the inductive voltage drop, as taught by Kang, in order to remove high-frequency noise such as spatter noise or electrical interference from welding, cancel ripple and exclude instances of rapid voltage change to reveal the true underlying shape, allowing for accurate analysis of the peak/background currents, voltages, pulse duration, and inductive voltage drop, thus, allow precise inductance compensation calculations.

Regarding claim 19, Davidson discloses the apparatus set forth in claim 13, but does not disclose wherein the inductance compensator is further configured to perform:
lowpass filtering the measured arc voltage pulse to reduce high frequency noise on the measured arc voltage pulse, while preserving a shape of the measured arc voltage pulse and the inductive voltage drop, to produce a filtered version of the measured arc voltage pulse,
wherein the inductance compensator is configured to perform measuring by measuring the magnitude of the overshoot voltage on the filtered version of the measured arc voltage pulse.
Johnson teaches an apparatus (welding system 100, Johnson Fig.1) comprising an inductance compensator (voltage monitor 152 and the controller 134, Johnson Fig.1) configured to perform:
lowpass filtering the measured arc voltage pulse to produce a filtered version of the measured arc voltage pulse (it is noted that the “measuring” herein is measuring a magnitude of the overshoot voltage as required by the independent claim 1; in this case, Johnson Pars.0046 & 0062 teaches lowpass filtering the voltage pulse, and then the filtered voltage pulse is used for compensating the voltage, therefore, Johnson teaches prior to measuring, lowpass filtering the voltage pulse to produce a filtered version of the voltage pulse; specifically, Johnson Par.0046 discloses: “The example voltage monitor 152 and/or the controller 134 perform filtering (e.g., analog and/or digital filtering) to determine a representative value of the voltage over a designated time period. ”, and Johnson Par.0062 teaches: “The example controller 112 avoids an unstable control loop situation caused by the data update rate mismatch and non-uniform network data arrival (e.g., variable sampling interval) by: 1) using low-pass filtered data for the voltage setpoint V.sub.cmd and the weld voltage feedback information V.sub.feeder to calculate the weld cable voltage drop V.sub.cableDrop and the adjusted voltage setpoint V.sub.AdjustedCmd; 2) calculating the adjusted voltage setpoint V.sub.AdjustedCmd when a valid weld voltage feedback information V.sub.feeder arrives via the weld cable 126 and use the most recently calculated value for the adjusted voltage setpoint V.sub.AdjustedCmd (e.g., until the next weld voltage feedback information arrives and a new value for the adjusted voltage setpoint is calculated); and 3) on start-up of the welding power supply, setting the adjusted voltage setpoint V.sub.AdjustedCmd to a maximum allowed value of the adjusted voltage setpoint V.sub.AdjustedCmd and allowing the system to adjust to the actual measured voltage drops.”)
wherein the inductance compensator is configured to perform measuring by measuring the magnitude of the overshoot voltage on the filtered version of the measured arc voltage pulse (it is noted that the primary reference Davidson already discloses the inductance compensator is configured to perform measuring by measuring the magnitude of the overshoot voltage of the measured arc voltage pulse, as cited and explained in the rejection of claim 1 above; and in this case, the prior art Johnson teaches the inductance compensator is configured to perform lowpass filtering the voltage pulse, and then the filtered voltage pulse is used for calculations to compensate the welding voltage, as explained previously; therefore, in combination, Davidson in view of Johnson teaches the inductance compensator is configured to perform measuring by measuring the magnitude of the overshoot voltage on the filtered version of the measured arc voltage pulse).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Davidson, by adding the teachings of the inductance compensator configured to lowpass filtering the measured arc voltage pulse to produce a filtered version of the measured arc voltage pulse, as taught by Johnson, in order to remove short-term fluctuations and interference from the welding process; additionally, the filter produces a smoother version of the signal by averaging out rapid fluctuations, making it easier to analyze the signal’s underlying trend and accurately determine critical parameters like the true peak of the voltage pulse; therefore, allowing for an accurate measurement of the voltage signal to obtain accurate overshoot voltage; thus, improve voltage compensation accuracy.
Davidson in view of Johnson does not explicitly teach:
lowpass filtering the measured arc voltage pulse to reduce high frequency noise on the measured arc voltage pulse, while preserving a shape of the measured arc voltage pulse and the inductive voltage drop
Kang teaches an apparatus comprising:
lowpass filtering the measured arc voltage pulse to reduce high frequency noise on the measured arc voltage pulse, while preserving a shape of the measured arc voltage pulse and the inductive voltage drop (Kang annotated Figs.2(b) & 2(c) below shows that after filtering, the shape of the measured arc voltage pulse and the inductive voltage drop is preserved because the Instant Application defines “preserving” by “The LPF has a lowpass filter cutoff or 3dB bandwidth low enough to reduce high-frequency noise, voltage ripple, and harmonics of measured arc voltage Uarc_meas, but high enough to preserve the general shape of voltage pulse 310” as indicated by Par.0035 of the Instant Application, and “lowpass filtering results in a "clean" and reliable compensated arc voltage with minimal ripple” as indicated by Par.0063 of the Instant Application. In this case, Kang Translated Document on page 3 paragraph 4 teaches: “The voltage signal converter converts the voltage signal detected by the voltage detector through an operational amplifier, converts the level from 20V to 70V into 1-14V, and enters the filter. The signal detected by the voltage detector is converted to the welding machine in addition to the output voltage signal. High frequency noise is included in the frequency signal, so if the signal is used as a signal source, the controller may malfunction. Therefore, the low frequency filter is used to cut off the high frequency noise and input it to the differential circuit.”, and Kang annotated Figs.2(b) & 2(c) below shows that after filtering, the shape of the measured arc voltage pulse and the inductive voltage drop is preserved; therefore, Kang teaches lowpass filtering the measured arc voltage pulse to reduce high frequency noise on the measured arc voltage pulse, while preserving a shape of the measured arc voltage pulse and the inductive voltage drop)

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It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Davidson in view of Johnson, by adding the teachings of lowpass filtering the measured arc voltage pulse to reduce high frequency noise on the measured arc voltage pulse, while preserving a shape of the measured arc voltage pulse and the inductive voltage drop, as taught by Kang, in order to remove high-frequency noise such as spatter noise or electrical interference from welding, cancel ripple and exclude instances of rapid voltage change to reveal the true underlying shape, allowing for accurate analysis of the peak/background currents, voltages, pulse duration, and inductive voltage drop, thus, allow precise inductance compensation calculations.

Claims 24-27 are rejected under 35 U.S.C. 103 as being unpatentable over Davidson et al. (U.S. Pub. No. 2014/0076871 A1, previously cite6).
Regarding claim 24, Davidson discloses a method (method 104, Davidson Fig.6) performed by a controller (weld controller 48 and processor 50, Davidson Fig.2) of a power supply (welding power source 12, Davidson Fig.2) configured to provide a current pulse (current waveform 82, Davidson Fig.5) through a welding circuit (welding circuit includes circuitry within 24, 30, 32, Davidson Fig.1) (Davidson Fig.1 shows the welding system 10, thus, there is welding circuit associated with it as shown in Davidson Figs.1-2) to create an arc for welding (Davidson Par.0015 discloses: “For example, the provided embodiments enable a welding arc to be compensated for a secondary response, such as the inductance and resistance of the weld cables, without the need for voltage sensing leads.”), comprising:
receiving a measured arc voltage pulse (the measured stud voltage of the voltage waveform 84, Davidson Fig.5 & Par.0032) that has a falling voltage ramp (falling portion 98, Davidson Fig.5), a flat peak (level 100, Davidson Fig.5), a minimum direct current (DC) level (level 102, Davidson Fig.5), and an undershoot voltage (undershoot voltage, Davidson annotated Fig.5 below) on the falling voltage ramp (falling portion 98, Davidson Fig.5) that falls below the minimum DC level (level 102, Davidson Fig.5) and that represents an inductive voltage drop due to inductance in the welding circuit (welding circuit includes circuitry within 24, 30, 32, Davidson Fig.1) and a falling current ramp (falling portion 90, Davidson Fig.5) of the current pulse (current waveform 82, Davidson Fig.5) (Davidson Par.0033 discloses: “It should be noted that although the illustrated embodiment measures the voltage error present while the weld waveforms are ramping up to a peak (e.g., portion 78 of the waveform of FIG. 4), in other embodiments, the voltage error may be measured while the weld waveforms are falling down from the peak. In either embodiment, however, secondary weld errors (e.g., inductance errors due to weld cabling) may be compensated for in the weld control by determining and removing the voltage errors associated with a portion of a weld waveform from the feedback signal.”);

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Davidson Embodiment of the weld waveforms are falling down from the peak does not explicitly disclose:
determining a magnitude of the undershoot voltage;
first deriving an inductance signal that indicates the inductance based on the magnitude;
second deriving a slope signal indicative of a slope of the falling current ramp;
third deriving an undershoot canceling voltage based on the inductance signal and the slope signal; and
canceling the undershoot voltage using the undershoot canceling voltage to produce a compensated arc voltage pulse.
However, Davidson Par.0020 discloses: “For example, the controller may consider the voltage error introduced into the weld waveform while ramping up to or falling down from a local peak in a weld waveform. Indeed, in certain embodiments, the controller may consider both the ramping up portion and the falling edge portion of the weld waveform, or may consider only one desired portion of the waveform.”, and Davidson Par.0033 discloses: “It should be noted that although the illustrated embodiment measures the voltage error present while the weld waveforms are ramping up to a peak (e.g., portion 78 of the waveform of FIG. 4), in other embodiments, the voltage error may be measured while the weld waveforms are falling down from the peak. In either embodiment, however, secondary weld errors (e.g., inductance errors due to weld cabling) may be compensated for in the weld control by determining and removing the voltage errors associated with a portion of a weld waveform from the feedback signal.”
It is further noted that calculating overshoot and undershoot involves similar principles but measures opposite deviations: overshoot is exceeding the target voltage (going above), while undershoot is dropping below it before settling, as evidenced by Wikipedia: “In signal processing, control theory, electronics, and mathematics, overshoot is the occurrence of a signal or function exceeding its target. Undershoot is the same phenomenon in the opposite direction.” [https://en.wikipedia.org/wiki/Overshoot_(signal)] and as evidenced by pertinent arts Sekerli et al., Mercer et al. and Kim et al. [see detailed teachings in the Conclusion section for pertinent arts].
Therefore, Davidson teaches calculations are similar for the falling down from a local peak in a weld waveform compared to the ramping up to a local peak in the weld waveform.
Therefore, Davidson teaches:
determining a magnitude of the undershoot voltage (Davidson teaches in the case of the ramping up to a local peak in the weld waveform, determining a magnitude of the overshoot voltage, as cited and explained in details in the rejection of claim 1 above; and Davidson Par.0020 discloses: “For example, the controller may consider the voltage error introduced into the weld waveform while ramping up to or falling down from a local peak in a weld waveform. Indeed, in certain embodiments, the controller may consider both the ramping up portion and the falling edge portion of the weld waveform, or may consider only one desired portion of the waveform.”, and Davidson Par.0033 discloses: “It should be noted that although the illustrated embodiment measures the voltage error present while the weld waveforms are ramping up to a peak (e.g., portion 78 of the waveform of FIG. 4), in other embodiments, the voltage error may be measured while the weld waveforms are falling down from the peak. In either embodiment, however, secondary weld errors (e.g., inductance errors due to weld cabling) may be compensated for in the weld control by determining and removing the voltage errors associated with a portion of a weld waveform from the feedback signal.”; therefore, in the case for the falling down from a local peak, determining a magnitude of the undershoot voltage);
first deriving an inductance signal that indicates the inductance based on the magnitude (Davidson teaches in the case of the ramping up to a local peak in the weld waveform, first deriving an inductance signal that indicates the inductance based on the magnitude, as cited and explained in details in the rejection of claim 1 above; and Davidson Par.0020 discloses: “For example, the controller may consider the voltage error introduced into the weld waveform while ramping up to or falling down from a local peak in a weld waveform. Indeed, in certain embodiments, the controller may consider both the ramping up portion and the falling edge portion of the weld waveform, or may consider only one desired portion of the waveform.”, and Davidson Par.0033 discloses: “It should be noted that although the illustrated embodiment measures the voltage error present while the weld waveforms are ramping up to a peak (e.g., portion 78 of the waveform of FIG. 4), in other embodiments, the voltage error may be measured while the weld waveforms are falling down from the peak. In either embodiment, however, secondary weld errors (e.g., inductance errors due to weld cabling) may be compensated for in the weld control by determining and removing the voltage errors associated with a portion of a weld waveform from the feedback signal.”; therefore, in the case for the falling down from a local peak, first deriving an inductance signal that indicates the inductance based on the magnitude);
second deriving a slope signal indicative of a slope of the falling current ramp (Davidson teaches in the case of the ramping up to a local peak in the weld waveform, second deriving, from the rising current ramp, a slope signal indicative of a slope of the rising current ramp, as cited and explained in details in the rejection of claim 1 above; and Davidson Par.0020 discloses: “For example, the controller may consider the voltage error introduced into the weld waveform while ramping up to or falling down from a local peak in a weld waveform. Indeed, in certain embodiments, the controller may consider both the ramping up portion and the falling edge portion of the weld waveform, or may consider only one desired portion of the waveform.”, and Davidson Par.0033 discloses: “It should be noted that although the illustrated embodiment measures the voltage error present while the weld waveforms are ramping up to a peak (e.g., portion 78 of the waveform of FIG. 4), in other embodiments, the voltage error may be measured while the weld waveforms are falling down from the peak. In either embodiment, however, secondary weld errors (e.g., inductance errors due to weld cabling) may be compensated for in the weld control by determining and removing the voltage errors associated with a portion of a weld waveform from the feedback signal.”; therefore, in the case for the falling down from a local peak, second deriving a slope signal indicative of a slope of the falling current ramp);
third deriving an undershoot canceling voltage based on the inductance signal and the slope signal (Davidson teaches in the case of the ramping up to a local peak in the weld waveform, third deriving an overshoot canceling voltage based on the inductance signal and the slope signal, as cited and explained in details in the rejection of claim 1 above; and Davidson Par.0020 discloses: “For example, the controller may consider the voltage error introduced into the weld waveform while ramping up to or falling down from a local peak in a weld waveform. Indeed, in certain embodiments, the controller may consider both the ramping up portion and the falling edge portion of the weld waveform, or may consider only one desired portion of the waveform.”, and Davidson Par.0033 discloses: “It should be noted that although the illustrated embodiment measures the voltage error present while the weld waveforms are ramping up to a peak (e.g., portion 78 of the waveform of FIG. 4), in other embodiments, the voltage error may be measured while the weld waveforms are falling down from the peak. In either embodiment, however, secondary weld errors (e.g., inductance errors due to weld cabling) may be compensated for in the weld control by determining and removing the voltage errors associated with a portion of a weld waveform from the feedback signal.”; therefore, in the case for the falling down from a local peak, third deriving an undershoot canceling voltage based on the inductance signal and the slope signal); and
canceling the undershoot voltage using the undershoot canceling voltage to produce a compensated arc voltage pulse (Davidson teaches in the case of the ramping up to a local peak in the weld waveform, canceling the overshoot voltage using the overshoot canceling voltage to produce a compensated arc voltage pulse, as cited and explained in details in the rejection of claim 1 above; and Davidson Par.0020 discloses: “For example, the controller may consider the voltage error introduced into the weld waveform while ramping up to or falling down from a local peak in a weld waveform. Indeed, in certain embodiments, the controller may consider both the ramping up portion and the falling edge portion of the weld waveform, or may consider only one desired portion of the waveform.”, and Davidson Par.0033 discloses: “It should be noted that although the illustrated embodiment measures the voltage error present while the weld waveforms are ramping up to a peak (e.g., portion 78 of the waveform of FIG. 4), in other embodiments, the voltage error may be measured while the weld waveforms are falling down from the peak. In either embodiment, however, secondary weld errors (e.g., inductance errors due to weld cabling) may be compensated for in the weld control by determining and removing the voltage errors associated with a portion of a weld waveform from the feedback signal.”; therefore, in the case for the falling down from a local peak, canceling the undershoot voltage using the undershoot canceling voltage to produce a compensated arc voltage pulse).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Davidson Embodiment of the voltage falling down from the local peak, by adding the teachings of method of calculating compensated arc voltage pulse, as taught by Davidson Embodiment of the voltage ramping up to the local peak, in order to produce compensated arc voltage pulse in case the weld waveforms are falling down from the peak. Thus, the compensated arc voltage pulse can be produced for both cases when the weld waveforms are falling down from the peak and the weld waveforms are ramping up to the peak in order to maintain arc stability, ensure consistent droplet metal transfer, and precisely control heat input; thus, increasing the overall weld quality.

Regarding claim 25, Davidson Embodiment of the voltage falling down from the local peak in view of Davidson Embodiment of the voltage ramping up to the local peak teaches the method set forth in claim 24, and also teaches wherein:
third deriving the undershoot canceling voltage includes third deriving the undershoot canceling voltage to be equal in magnitude and opposite in polarity to the undershoot voltage (Davidson teaches in the case of the ramping up to a local peak in the weld waveform, third deriving the overshoot canceling voltage includes third deriving the overshoot canceling voltage to be equal in magnitude and opposite in polarity to the overshoot voltage, as cited and explained in details in the rejection of claim 2 above; and Davidson Par.0020 discloses: “For example, the controller may consider the voltage error introduced into the weld waveform while ramping up to or falling down from a local peak in a weld waveform. Indeed, in certain embodiments, the controller may consider both the ramping up portion and the falling edge portion of the weld waveform, or may consider only one desired portion of the waveform.”, and Davidson Par.0033 discloses: “It should be noted that although the illustrated embodiment measures the voltage error present while the weld waveforms are ramping up to a peak (e.g., portion 78 of the waveform of FIG. 4), in other embodiments, the voltage error may be measured while the weld waveforms are falling down from the peak. In either embodiment, however, secondary weld errors (e.g., inductance errors due to weld cabling) may be compensated for in the weld control by determining and removing the voltage errors associated with a portion of a weld waveform from the feedback signal.”; therefore, in the case for the falling down from the local peak, third deriving the undershoot canceling voltage includes third deriving the undershoot canceling voltage to be equal in magnitude and opposite in polarity to the undershoot voltage); and
canceling includes summing the undershoot canceling voltage with the measured arc voltage pulse (Davidson teaches in the case of the ramping up to a local peak in the weld waveform, canceling includes summing the overshoot canceling voltage with the measured arc voltage pulse, as cited and explained in details in the rejection of claim 2 above; and Davidson Par.0020 discloses: “For example, the controller may consider the voltage error introduced into the weld waveform while ramping up to or falling down from a local peak in a weld waveform. Indeed, in certain embodiments, the controller may consider both the ramping up portion and the falling edge portion of the weld waveform, or may consider only one desired portion of the waveform.”, and Davidson Par.0033 discloses: “It should be noted that although the illustrated embodiment measures the voltage error present while the weld waveforms are ramping up to a peak (e.g., portion 78 of the waveform of FIG. 4), in other embodiments, the voltage error may be measured while the weld waveforms are falling down from the peak. In either embodiment, however, secondary weld errors (e.g., inductance errors due to weld cabling) may be compensated for in the weld control by determining and removing the voltage errors associated with a portion of a weld waveform from the feedback signal.”; therefore, in the case for the falling down from the local peak, canceling includes summing the undershoot canceling voltage with the measured arc voltage pulse).

Regarding claim 26, Davidson Embodiment of the voltage falling down from the local peak in view of Davidson Embodiment of the voltage ramping up to the local peak teaches the method set forth in claim 24, and also teaches further comprising:
implementing an inductance-compensation feedback loop that includes repeating, for a next measured arc voltage pulse, receiving, measuring, first deriving, second deriving, third deriving, and canceling to cancel any remaining undershoot voltage (Davidson teaches in the case of the ramping up to the local peak in the weld waveform, implementing an inductance-compensation feedback loop that includes repeating, for a next measured arc voltage pulse, receiving, measuring, first deriving, second deriving, third deriving, and canceling to cancel any remaining overshoot voltage, as cited and explained in details in the rejection of claim 4 above; and Davidson Par.0020 discloses: “For example, the controller may consider the voltage error introduced into the weld waveform while ramping up to or falling down from a local peak in a weld waveform. Indeed, in certain embodiments, the controller may consider both the ramping up portion and the falling edge portion of the weld waveform, or may consider only one desired portion of the waveform.”, and Davidson Par.0033 discloses: “It should be noted that although the illustrated embodiment measures the voltage error present while the weld waveforms are ramping up to a peak (e.g., portion 78 of the waveform of FIG. 4), in other embodiments, the voltage error may be measured while the weld waveforms are falling down from the peak. In either embodiment, however, secondary weld errors (e.g., inductance errors due to weld cabling) may be compensated for in the weld control by determining and removing the voltage errors associated with a portion of a weld waveform from the feedback signal.”; therefore, in the case for the falling down from a local peak, implementing an inductance-compensation feedback loop that includes repeating, for a next measured arc voltage pulse, receiving, measuring, first deriving, second deriving, third deriving, and canceling to cancel any remaining undershoot voltage).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Davidson Embodiment of the voltage falling down from the local peak, by adding the teachings of implementing an inductance-compensation feedback loop, as taught by Davidson Embodiment of the voltage ramping up to a local peak, in order to calculate and adjust current/voltage to counteract real-time process variations to ensure consistent heat input for stable arc length, uniform penetration, and reliable weld quality, preventing defects like cracks or lack of fusion.

Regarding claim 27, Davidson Embodiment of the voltage falling down from the local peak in view of Davidson Embodiment of the voltage ramping up to the local peak teaches the method set forth in claim 24, and also teaches wherein:
measuring the magnitude includes measuring a difference between voltage levels of (i) a negative peak of the undershoot voltage (undershoot voltage, Davidson annotated Fig.5 below) (thus, negative peak is level 100, Davidson Fig.5) that is below the minimum DC level (level 102, Davidson Fig.5), and (ii) the minimum DC level (level 102, Davidson Fig.5) (Davidson teaches in the case of the ramping up to a local peak in the weld waveform, measuring the magnitude includes measuring a difference between voltage levels of (i) a positive peak of the overshoot voltage that exceeds the flat peak, and (ii) the flat peak, as cited and explained in details in the rejection of claim 6 above; and Davidson Par.0020 discloses: “For example, the controller may consider the voltage error introduced into the weld waveform while ramping up to or falling down from a local peak in a weld waveform. Indeed, in certain embodiments, the controller may consider both the ramping up portion and the falling edge portion of the weld waveform, or may consider only one desired portion of the waveform.”, and Davidson Par.0033 discloses: “It should be noted that although the illustrated embodiment measures the voltage error present while the weld waveforms are ramping up to a peak (e.g., portion 78 of the waveform of FIG. 4), in other embodiments, the voltage error may be measured while the weld waveforms are falling down from the peak. In either embodiment, however, secondary weld errors (e.g., inductance errors due to weld cabling) may be compensated for in the weld control by determining and removing the voltage errors associated with a portion of a weld waveform from the feedback signal.”; therefore, in the case for the falling down from a local peak, measuring the magnitude includes measuring a difference between voltage levels of (i) a negative peak of the undershoot voltage that is below the minimum DC level); and
first deriving includes first deriving the inductance signal based on the difference (Davidson teaches first deriving includes first deriving the inductance signal based on the magnitude, as cited and explained previously in the rejections of claim 24 above; in this case, the magnitude includes measuring the difference; therefore, first deriving includes first deriving the inductance signal based on the difference).

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Conclusion
The following prior art(s) made of record and not relied upon is/are considered pertinent to Applicant’s disclosure.
Vogel (U.S. Pub. No. 2010/0308027 A1) discloses systems, devices, and methods for measuring a peak to peak switching ripple in a voltage present on welding output terminals. The systems, devices, and methods may also be utilized to determine, during a welding operation, a weld cable inductance based on the measured peak to peak voltage ripple.
Hutchison (U.S. Pub. No. 2018/0141149 A1) discloses methods and systems for calculating output inductance of a weld secondary. The system can identify a gain value at which the oscillation begins and compare the gain value to a list of gain values that correspond to a list of inductance values (e.g., calculated from previous, controlled tests) to determine an inductance value that correlates to the identified gain value.

THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to THAO TRAN-LE whose telephone number is [phone]. The examiner can normally be reached M-F 9:00 - 5:00 EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, STEVEN CRABB can be reached at [phone]. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/THAO UYEN TRAN-LE/Examiner, Art Unit 3761 06/09/2026

/STEVEN W CRABB/Supervisory Patent Examiner, Art Unit 3761

Prosecution Timeline

• Nov 30, 2021: Application Filed
• Dec 30, 2024: Non-Final Rejection mailed — §102, §103
• Mar 20, 2025: Applicant Interview (Telephonic)
• Mar 20, 2025: Examiner Interview Summary
• Mar 27, 2025: Response Filed
• May 22, 2025: Examiner Interview (Telephonic)
• Jul 17, 2025: Final Rejection mailed — §102, §103
• Oct 17, 2025: Request for Continued Examination
• Oct 24, 2025: Response after Non-Final Action
• Dec 30, 2025: Non-Final Rejection mailed — §102, §103
• Mar 30, 2026: Response Filed
• Jun 12, 2026: Final Rejection mailed — §102, §103 (current)