Prosecution Insights
Last updated: April 19, 2026
Application No. 17/548,211

DISPLAY DEVICE

Non-Final OA §103
Filed
Dec 10, 2021
Examiner
NADAV, ORI
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
LG Display Co., Ltd.
OA Round
5 (Non-Final)
60%
Grant Probability
Moderate
5-6
OA Rounds
3y 11m
To Grant
81%
With Interview

Examiner Intelligence

Grants 60% of resolved cases
60%
Career Allow Rate
417 granted / 693 resolved
-7.8% vs TC avg
Strong +21% interview lift
Without
With
+20.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 11m
Avg Prosecution
67 currently pending
Career history
760
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
52.6%
+12.6% vs TC avg
§102
14.2%
-25.8% vs TC avg
§112
29.5%
-10.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 693 resolved cases

Office Action

§103
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-5, 7-8, 10 and 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Jeon et al. (11,782,477).Regarding claim 1, Jeon et al. teach in figures 6, 12 and related text a display device comprising: a substrate 100 having a display area and a non-display area A3 adjacent to the display area NA; at least one camera hole A1 in the display area; a bypass line module DWL on the substrate within a first width area (arbitrarily chosen) from an edge of the at least one camera hole A1; a light-emitting device disconnection module 222/223/230 (see figure 7) over the bypass line module DWL to overlap the bypass line module DWL within the first width area, and a light-emitting device PC at a portion of the display area other than the camera hole A1 and the first width area, wherein the light-emitting device disconnection module comprises a plurality of disconnection patterns 222a/222c spaced apart from each other and the plurality of disconnection patterns are concentric about the at least one camera hole A1, and wherein an organic stack 230 of the light-emitting device OLED is extended over the plurality of the disconnection patterns 222a/222c and is disconnected at each of side surfaces of the plurality of disconnection patterns in the first width area (since the layers are also disconnected at A1). Jeon et al. do not explicitly state that the plurality of disconnection patterns are concentric about the at least one camera hole. Jeon et al. teach in figures 6, 11B and related text that DWL and element 450 are all concentric about the at least one camera hole. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the plurality of disconnection patterns together with the DWL and element 450 concentric about the at least one camera hole in Jeon et al.’s device in order to simplify the processing seps of making the device. Regarding claim 2, Jeon et al. teach in figures 6, 12 and related text a first protective film 215 between the light-emitting device disconnection module EA and an uppermost layer of the bypass line module DWL. Regarding claim 3, Jeon et al. teach in figures 6, 12 and related text a first thin-film transistor stack PC under the first protective film 215., but do not teach a second thin-film transistor stack on the first protective film. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form a second thin-film transistor stack on the first protective film, wherein the second thin-film transistor stack in the display area comprises: a first active layer comprising an oxide semiconductor layer on the first protective film; a first gate electrode disposed to overlap the first active layer, with a first gate insulation film interposed therebetween; and a first electrode and a second electrode connected to the first active layer, with a first interlayer insulation film interposed therebetween, in prior art’s device in order to reduce the size of the device by forming stacked structure. Regarding claim 4, Jeon et al. teach in figures 6, 12 and related text that each of the plurality of disconnection patterns comprises: a first disconnection pattern including the first interlayer insulation film (in the modified device); and a second disconnection pattern IL on the first disconnection pattern, the second disconnection pattern having a width different from a width of the first disconnection pattern at an interface where the second disconnection pattern contacts with the first disconnection pattern (since the disconnection patterns have different widths, as depicted in figure 12). Regarding claim 5, Jeon et al. teach in figures 6, 12 and related text that the light-emitting device EA is provided on a planarization layer 209 to cover the second thin-film transistor stack (of the modified device), wherein the light-emitting device comprises: an anode 221 connected to the first electrode of the first thin-film transistor through a first contact hole, an organic stack on the anode; and a cathode 223 on the organic stack, and wherein the organic stack is spaced apart from the plurality of disconnection patterns and discontinuously formed between neighboring ones of the plurality of disconnection patterns. Regarding claim 7, Jeon et al. teach in figures 6, 12 and related text a gate-driving unit at the display area of the substrate, wherein the gate-driving unit comprises the first thin-film transistor stack PC, and wherein the first thin-film transistor stack comprises: a second active layer Act (see figure 7) disposed at a vertical distance from the substrate shorter than the first active layer, the second active layer comprising polysilicon; a second gate electrode CE2 disposed to overlap the second active layer, with a second gate insulation film 205 interposed therebetween; and one of a third electrode SE and a fourth electrode DE connected to sides of the second active layer through a second contact hole penetrating a second interlayer insulation film and the second gate insulation film. Jeon et al. do not teach forming the gate-driving unit at the non-display area of the substrate. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the gate-driving unit at the non-display area of the substrate in prior art’s device in order to be able to drive and operate the device. Regarding claim 8, Jeon et al. teach in figures 6, 12 and related text that the bypass line module comprises: a first layer line and a second layer line, but do not teach that the first layer line coplanar with the second gate electrode; and a second layer line coplanar with the third electrode. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the first layer line coplanar with the second gate electrode; and a second layer line coplanar with the third electrode in prior art’s device in order to simplify the processing steps of making the device. Regarding claim 10, Jeon et al. teach in figure 3 and related text (pertaining to the description of figure 3) that an encapsulation structure on the light-emitting device and the light-emitting device disconnection module, wherein the encapsulation structure comprises an inorganic encapsulation film and an organic encapsulation film 27, the inorganic encapsulation film and the organic encapsulation film being alternately stacked, and wherein only the inorganic encapsulation film of the encapsulation structure is disposed on the light-emitting device disconnection module (in order to encapsulate the device). Regarding claim 18, Jeon et al. teach in figure 3 and related text an organic stack of the light-emitting device is disconnected between adjacent two disconnection patterns of the plurality of disconnection patterns. Regarding claim 19, Jeon et al.do not explicitly state that each of the plurality of disconnection patterns entirely encircles the at least one camera hole. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form each of the plurality of disconnection patterns entirely encircles the at least one camera hole in prior art’s device in order to provide better electrical connections to the device and in order to form the device as intended by Jeon et al. as evident from figure 6 of Jeon et al. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Jeon et al. (11,782,477) in view of Park (20200075692). Regarding claim 6, Jeon et al. teach in figure 3 and related text substantially the entire claimed invention as recited in claim 4, except using a dam pattern disposed to be spaced apart from the plurality of disconnection patterns and coplanar with a bank defining an emission part of the light-emitting device. Park teaches in Figs. 9A-D and related text the light-emitting device disconnection module further comprises a dam pattern DAM 361/362 disposed to be spaced apart from the plurality of disconnection patterns and coplanar with a bank 325 defining an emission part of the light-emitting device (para [0121]-[0122]). Jeon et al. and Park are analogous art because they both are directed to similar type of displays and one of ordinary skill in the art would have had a reasonable expectation of success to combine the teachings of Tanaka with the features of Park because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display taught by Jeon et al. with the features taught by Park in order to provide protective ability against foreign matter (Park: [0095)). Allowable Subject Matter Claims 11-13 and 15-17 are allowed. Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Response to Arguments 1. Applicants argue that Jeon does not teach “a hole in substrate 199”. 1. It is noted that the claims do not require forming a hole in the substrate. Claim 1 recites “a substrate having a display area and a non-display area adjacent to the display area; at least one camera hole in the display area”. 2. Applicants argue that “The functional layers 222, the opposite electrode 223 and the capping layer 230 cannot be a plurality of disconnection patterns spaced apart from each other”. 2. The functional layers 222a and 222c are spaced apart from each other”. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ORI NADAV whose telephone number is 571-272-1660. The examiner can normally be reached between the hours of 7 AM to 4 PM (Eastern Standard Time) Monday through Friday. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached on 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). O.N. /ORI NADAV/ 12/1/2025 PRIMARY EXAMINER TECHNOLOGY CENTER 2800
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Prosecution Timeline

Dec 10, 2021
Application Filed
Jun 10, 2024
Non-Final Rejection — §103
Sep 18, 2024
Response Filed
Dec 06, 2024
Final Rejection — §103
Mar 11, 2025
Request for Continued Examination
Mar 13, 2025
Response after Non-Final Action
May 03, 2025
Non-Final Rejection — §103
Aug 08, 2025
Response Filed
Aug 18, 2025
Final Rejection — §103
Nov 20, 2025
Request for Continued Examination
Nov 25, 2025
Response after Non-Final Action
Feb 08, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
60%
Grant Probability
81%
With Interview (+20.6%)
3y 11m
Median Time to Grant
High
PTA Risk
Based on 693 resolved cases by this examiner. Grant probability derived from career allow rate.

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