DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 17 November 2025 has been entered.
Response to Arguments
Applicant’s arguments, see Remarks filed on 11 November 2025, with respect to Drawings and claims 6-7 and 22-25 have been fully considered and are persuasive. The Objections to Drawings and the 35 U.S.C. § 112 Rejection of claims 6-7 and 22-25 have been withdrawn.
Applicant's arguments filed on 11 November 2025 with respect to the 35 U.S.C. § 103 rejection of claims 1 and 22 have been fully considered but they are not persuasive. Applicant argues on Pages 9-10 of the Remarks that Kim does not teach the amended limitations of the die having one or more electrical contacts on the first side, and a dielectric layer continuous along the sidewalls of the die, on the second side of the die and on the second side of the glass core. The applicant specifically reasoned that Kim discloses the dielectric layer (16) in Fig. 3E to be on the top side of the die (2) and hence does not disclose the dielectric layer being on an opposite side of the die from the electrical contacts of the die. The examiner respectfully disagrees. The examiner finds that Kim Fig. 1 teaches electrical contacts (23) on the first side (bottom side) of the die and also teaches that the dielectric layer (16) is on the second side (top side) of the die, which is opposite the bottom side. In summary, the application is not placed in a condition for an allowance.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they do not include the following reference sign(s) mentioned in the description: Fig. 4 of the instant application shows contacts on the bottom surface of the die 420. However, these contacts do not have the reference sign 122 as discussed in Paragraph [0030] of the Specifications.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 3, 5-12, and 22-24 is/are rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being anticipated by Kim (US 2020/0058567 A1).
Regarding claim 1, Kim teaches an apparatus (12; see Fig. 1, [0028]; 12 is a substrate for mounting devices), comprising:
a glass core (14, see Fig. 1, [0030]) with a first side (Figs. 1, 3A-3I: bottom side of 14) and a second side opposite (Figs. 1, 3A-3I: top side 14) the first side;
an opening (22, see Fig. 3C, [0063]; also see [0062]: openings used to form vias 47) in the glass core extending from the first side to the second side (Fig. 3C shows cavity 22 and vias 47 extends from the bottom side of 14 to the top side of 14);
one or more through glass vias (TGV) (47; see Figs. 3B-3I, [0062]) laterally spaced apart from the opening (as shown in Figs. 3C, each 47 is horizontally spaced apart from 22), the one or more TGV extending from the first side to the second side of the glass core (as shown in Figs. 3B-3I, 47 extends from the bottom side of 14 to the top side of 14), wherein the one or more TGV include an electrically conductive material (see [0062]) that electrically couples the first side of the glass core with the second side of the glass core (see [0062], [0068]-[0069]);
a die (20; see Figs. 1, 3D-3I, [0064]) in the opening of the glass core (as shown in Fig. 3D, 20 is disposed within 22), the die having a first side (bottom side of 20) and a second side opposite the first side (top side of 20), and sidewalls (two vertical sidewalls of 20) between the first side and the second side, and the die having one or more electrical contacts (23, see ¶ 0040) on the first side (Fig. 1 shows 23 on the bottom side of 20); and
a dielectric layer (16, see Figs.1 & 3E and [0065] and [0041]: “a portion of the first dielectric layer 16 can form the encapsulant 24”) continuous along the sidewalls of the die (Fig. 3E shows 16 is a layer spanning uninterruptedly along surfaces of the two vertical sidewalls of 20), on the second side of the die and on the second side of the glass core (Fig. 3E shows 16 placed directly above the top surface of 20 and top surface of 14).
Regarding claim 3, The apparatus of claim 1, wherein the one or more TGV are filled with an electrically conductive material (¶ [0062]).
Regarding claim 6, The apparatus of claim 1, wherein a first distance between the first side and the second side of the first die perpendicular to the first side of the first die (Fig. 3D: the vertical height of 20, measured between the top of 20 to the bottom of 20 is the first distance), and a second distance between the first side of the second side of the glass core perpendicular to the first side of the glass core (Fig. 3D: the vertical height of 14, measured between the top of 14 and the bottom of 14 is the second distance) are the same ([0036]: “each die 20 can have a die height measured in a direction orthogonal to the outer surface 32 of the first dielectric layer 16 that is no greater than a height of the cavity 22 within which the die is disposed”).
Regarding claim 8, The apparatus of claim 1, wherein the first side of the glass core and the first side of the die are on a substrate (52&54; see Figs. 1, 3H-3I, [0045], [0066], [0070]).
Regarding claim 9, The apparatus of claim 1, wherein the die is a plurality of dies (as shown in Fig. 1, there are two dies 20; also see [0028]).
Regarding claim 10, The apparatus of claim 1, wherein the opening is a plurality of openings (Fig. 3C, [0063], 22, and [0062]: openings used to form vias 47; alternatively, as shown in Fig. 1, there are two dies 20 in separate cavities 22).
Regarding claim 11, The apparatus of claim 1, wherein the opening is surrounded by the glass core (as shown in Fig. 3C, opening 22 and the openings where vias 47 are deposited are surrounded by glass core 14).
Regarding claim 12, The apparatus of claim 1, wherein the opening 22 is at an edge (E1&E2; see Examiner Fig. 1) of the glass core (as shown in Examiner Fig. 1, opening 22 is at the edges E1 & E2 of 14).
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Examiner Fig. 1. Taken from Kim Fig. 3C.
Regarding claim 22, Kim teaches a package (10, see Fig. 1, [0028]) comprising:
an interposer (12; see [0028]: 12 is a substrate for mounting devices 30 and with interconnects 28, vias 47, and bridge die 20 used for connecting devices 30; hence 12 is an interposer) comprising:
a glass core (14, see Fig. 1, [0030]) with a first side (Figs. 1, 3A-3I: top side of 14) and a second side (Figs. 1, 3A-3I: bottom side 14) opposite the first side;
an opening (22, see Fig. 3C, [0063]; also [0062]: openings used to form vias 47) in the glass core extending from the first side to the second side (Fig. 3C shows 22 extends from top side to bottom side of 14);
one or more through glass vias (TGV) (47, see Figs. 3B-3I, [0062]) laterally spaced apart from the opening (as shown in Figs. 3C, each 47 is horizontally spaced apart from 22), the one or more TGV extending from the first side to the second side of the glass core (as shown in Figs. 3B-3I, 47 extends from top side to bottom side of 14), wherein the one or more TGV include an electrically conductive material (see [0062]) that electrically couples the first side of the glass core with the second side of the glass core ([0062], [0068]-[0069]); and
a first die (20, see Figs. 1, 3D-3I, [0064]) with a first side (top side of 20) and a second side (bottom side of 20) opposite the first side, and sidewalls (two vertical sidewalls of 20) between the first side and the second side, the first die disposed within the opening of the glass core (as shown in Fig. 3D, 20 is disposed within 22), wherein the first side of the first die is at the first side of the glass core (as shown in Figs. 1, 3D-3I, the top of 20 is on the same side as the top of 14), and the second side of the first die is at the second side of the glass core (as shown in Figs. 1, 3D-3I, the bottom of 20 is on the same side as the bottom of 14), and wherein a first side of the first die includes one or more electrical connections (21; Fig. 1 shows 21 on the top side of 20), and wherein the first die has one or more electrical contacts (23) on the second side (Fig. 1 shows 23 on the bottom side of 20), the one or more electrical contacts opposite the one or more electrical connections (Fig. 1 shows 23 on the bottom side of 20, which is opposite the top side of 20, with the top side of 20 having 21);
a second die (30a, see Fig. 1, [0047]) having a first side (bottom side of 30a) and a second side (top side of 30a) opposite the first side, and sidewalls (vertical sidewalls of 30a) between the first side and the second side, the second die electrically coupled with at least one of the TGV ([0043]: “46 can be electrically connected to additional patterned conductive layers, devices, conductive pads, etc. using one or more conductive vias 47”) and electrically coupled with at least one of the one or more electrical connections of the first die ([0028]: “the devices 30 are electrically connected to one or more of the dies 20”; see also Fig. 1), the second die physically coupled with the interposer ([0046]; as shown in Fig. 1, 30a is on top of 12); and
a dielectric layer (16, see Fig. 3E and [0065] and [0041]: “a portion of the first dielectric layer 16 can form the encapsulant 24”) continuous along the sidewalls of the first die (Fig. 3E shows 16 is a layer spanning uninterruptedly along the surfaces of the two vertical sidewalls of 20), on the first side of the first die (Fig. 3E shows 16 placed on the top side of 20), and on the first side of the glass core (Fig. 3E shows 16 placed on the top side of 14) .
Regarding claim 23, the package of claim 22, further comprising a third die 30b electrically coupled with at least one of the TGV ([0043]; also Fig. 1 shows 30b connected to 47 through 46) and electrically coupled with at least one of the one or more electrical connections of the first die 20 ([0028], [0040]; as shown in Fig. 1, 30b is connected to 20 through 60), the third die physically coupled with the interposer ([0046]; as shown in Fig. 1, 30b is on top of 12).
Regarding claim 24, the package of claim 22, wherein the opening in the glass core of the interposer is at an edge E1&E2 of the glass core (as shown in Examiner Fig. 1 in claim 12 rejection above, opening 22 is at the edges E1 & E2 of 14).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
Determining the scope and contents of the prior art.
Ascertaining the differences between the prior art and the claims at issue.
Resolving the level of ordinary skill in the pertinent art.
Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 2, 7, and 25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim (US 2020/0058567 A1) as applied to claims 1 and 22 above, and further in view of Pietambaram (US 2020/0006232 A1).
Regarding claim 2, Kim teaches the apparatus of claim 1 but does not teach the apparatus wherein the electrically conductive material includes copper.
Pietambaram, in the same field of invention, teaches a semiconductor device 200 (Fig. 2, [0041]) wherein the electrically conductive material of a through glass via 232 ([0041], also shown as 332 in Figs. 3D-3M) includes copper ([0066]).
A person of ordinary skill in the art, prior to the effective date of the claimed invention, will find it obvious to combine the teachings of Pietambaram into the device of Kim to use copper as the electrically conductive material of a through glass via in an apparatus at least comprising of a glass core, an opening in the glass core, and the said through glass via proximally located in the opening. The ordinary artisan would have been motivated to modify Kim in the manner set forth above for at least the purpose of substituting the unnamed conductive material of Kim with a material recognized in the art as an equivalence for the same purpose of providing conductivity. See MPEP 2144.06 (I).
Regarding claim 7, Kim teaches the apparatus of claim 1 but does not teach the apparatus wherein a value of a coefficient of thermal expansion (CTE) of the die and a value of a CTE of the glass core are a same value.
Pietambaram, in the same field of invention, teaches a device 200 (Fig. 2, [0041]) having a glass core 230 (¶ [0041]) and a die 240 (¶ [0042]) wherein a value of a coefficient of thermal expansion (CTE) of the die and a value of a CTE of the glass core are a same value. ([0036]: “Furthermore, the glass components may be tailored to match the CTE of the multi-chip components”; see also [0037], [0046] and [0047])
A person of ordinary skill in the art, prior to the effective date of the claimed invention, will find it obvious to combine the teachings of Pietambaram into the device of Kim to provide a CTE value of the die to be the same as a CTE value of the glass core in an apparatus at least comprising of a glass core, an opening in the glass core, and a through glass via proximally located in the opening. The ordinary artisan would have been motivated to modify Kim in the manner set forth above for at least the purpose of reducing die warpage by matching the CTEs of various materials in the package (Pietambaram [0003], [0036]-[0037]).
Regarding claim 25, Kim teaches the package of claim 22, but does not teach wherein the electrically conductive material includes copper.
Pietambaram, in the same field of invention, teaches a semiconductor package 200 (Fig. 2, [0041]) wherein the electrically conductive material of a through glass via 232 ([0041], also shown as 332 in Figs. 3D-3M) includes copper ([0066]).
A person of ordinary skill in the art, prior to the effective date of the claimed invention, will find it obvious to combine the teachings of Pietambaram into the device of Kim to use copper as the electrically conductive material of a through glass via in an apparatus at least comprising of a glass core, an opening in the glass core, and the said through glass via proximally located in the opening. The ordinary artisan would have been motivated to modify Kim in the manner set forth above for at least the purpose of substituting the unnamed conductive material of Kim with a material recognized in the art as an equivalence for the same purpose of providing conductivity. See MPEP 2144.06 (I).
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim (US 2020/0058567 A1) as applied to claims 1 above, and further in view of Huang (US 2019/0313524 A1).
Regarding claim 4, Kim teaches the apparatus of claim 1, but does not teach wherein a diameter of one of the one or more TGV is less than 25 μm, and wherein a pitch of the one or more TGV is less than 50 μm.
Huang, in the same field of invention, a glass substrate 100 (Fig. 1, [0125]) used as interposers in electronic devices (¶ [0003]) wherein a diameter of one of the one or more TGV 110 (¶ [0124]) is less than 25 μm (¶ [0206]), and wherein a pitch of the one or more TGV is less than 50 μm (¶ [0207]).
A person of ordinary skill in the art, prior to the effective date of the claimed invention, will find it obvious to combine the teachings of Huang into the device of Kim to provide at least one TGV having a diameter less than 25 μm and a pitch less than 50 μm in an apparatus at least comprising of a glass core, an opening in the glass core, and a through glass via proximally located in the opening. The ordinary artisan would have been motivated to modify Kim in the manner set forth above for at least the purpose of optimizing approaching ranges of the diameter and pitch of the via to prevent radial cracking (Huang [0207]) and surface stress (Huang Fig. 7, [0177]) through routine experimentation (Huang [0169]-[0209], Figs. 5-9). See MPEP § 2144.05 (I) and (II) (A).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DOUGLAS YAP whose telephone number is (703)756-1946. The examiner can normally be reached Monday - Friday 8:00 AM - 5:00 PM ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached at (571) 272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DOUGLAS YAP/Assistant Examiner, Art Unit 2899
/JOHN M PARKER/Examiner, Art Unit 2899