Prosecution Insights
Last updated: April 19, 2026
Application No. 17/550,449

SEMICONDUCTOR STRUCTURE

Non-Final OA §103
Filed
Dec 14, 2021
Examiner
KIM, SU C
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Epistar Corporation
OA Round
5 (Non-Final)
77%
Grant Probability
Favorable
5-6
OA Rounds
2y 11m
To Grant
65%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allow Rate
695 granted / 899 resolved
+9.3% vs TC avg
Minimal -12% lift
Without
With
+-12.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
48 currently pending
Career history
947
Total Applications
across all art units

Statute-Specific Performance

§103
57.6%
+17.6% vs TC avg
§102
25.0%
-15.0% vs TC avg
§112
6.5%
-33.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 899 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 2/23/2026 has been entered. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1-7, 11, & 13-24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bower et al. (US 20180138071, Bower) in view of Cok (US 20170133818, Cok). Regarding claim 1, Bower discloses that a semiconductor structure, comprising: a carrier 20 (Fig. 2I); a bonding structure 60 on the carrier 50 and having [[an]] a first upper surface (Fig. 21); a semiconductor stack 22 on the bonding structure 60 and comprising a first surface and a second surface opposite on the first surface; a supporting element 38 having a bottom surface connected to [[on]] the bonding structure 60, and having a side wall, and a second upper surface opposite to the bottom surface; and a bridge layer 24/36 having a first portion directly connected to the supporting element 38, a second portion connected to the first portion and a third portion connected to the second portion; wherein the second portion and the third portion of the bridge layer are suspended above the first upper surface of the bonding structure 60 (Fig. 2I), there is no solid material between the second portion and the first upper surface of the bonding structure or between the third portion and the first upper surface of the bonding structure, the bridge layer 24/36 is insulated from the semiconductor stack 22 (an element 24 is an insulator), and the first portion of the bridge layer directly contacts the side wall of the supporting element 38 (Fig. 2I). Bower fails to teach that a first electrode disposed on the first surface and wherein the third portion of the bridge layer directly contacts the second surface of the semiconductor stack ( by removing an element 26 in Fig. 2E-2G). However, Cok suggests that a first electrode disposed on the first surface and wherein the third portion of the bridge layer directly contacts the second surface of the semiconductor stack (See modified Fig. below). PNG media_image1.png 396 653 media_image1.png Greyscale Therefore, it would have been obvious to one of ordinary skill in the art before effective filing date of applicant(s) claimed invention was made to provide Bower with a first electrode disposed on the first surface and wherein the third portion of the bridge layer directly contacts the second surface of the semiconductor stack as taught by Cok in order to enhance color mixing (para. 0054) and also, the claim would have been obvious because a particular know technique was recognized as part of the ordinary capabilities of one skilled in the art. Reclaim 2, Bower & Cok disclose that the semiconductor stack is overlapped with the third portion of the bridge layer (Bower, Fig. 2I). Reclaim 3, Bower & Cok disclose that the semiconductor stack is not overlapped with the second portion of the bridge layer (Bower, Fig. 2I). Reclaim 4, Bower & Cok disclose that the supporting element 38 contacts the bonding structure 24 (Bower, Fig. 2I). Reclaim 5, Bower & Cok disclose that the semiconductor stack 22 comprises a first semiconductor layer, an active layer on the first semiconductor layer, and a second semiconductor layer on the active layer, and the active layer is not overlapped with the first portion and the second portion of the bridge layer (Bower, Fig. 2I). Reclaim 6, Bower & Cok disclose that the bonding structure includes BCB, COC, fluorocarbon polymer, PI, PFCB, oxide, nitride or metal (Bower, para. 0081). Reclaim 7, Bower & Cok disclose that the bridge layer includes oxide or nitride 24/36 (Bower, Fig. 2I, insulating material can be oxide or nitride formation). Reclaim 11, Bower & Cok disclose that further comprising a second electrode wherein the second electrode 25 is deposed on the first surface (Bower, Fig. 2B). Reclaim 13, Bower & Cok disclose that the semiconductor stack has a side surface, and the second portion of the bridge layer 24/36 is protruded from the side surface of the semiconductor stack (Fig. 2I). Reclaim 14, Bower & Cok disclose that the first portion of the bridge layer has a first width and the second portion of the bridge layer has a second width less than the first width (Bower, Fig. 2I). Reclaim 15, Bower & Cok disclose that the first portion of the bridge layer has a first width and the third portion of the bridge layer has a third width larger than the first width (Bower, Fig. 2I). Reclaim 16, Bower & Cok disclose that the first portion of the bridge layer has a first length and the second portion of the bridge layer has a second length less than the first length (Bower, Fig. 2I). Reclaim 17, Bower & Cok disclose that the bridge layer has a first thickness and the supporting element has a second thickness larger than the first thickness (Bower, Fig. 2I). Reclaim 18, Bower & Cok disclose that the bridge layer has a first thickness and the semiconductor stack has a third thickness larger than the first thickness (Bower, Fig. 2I). Reclaim 19, Bower & Cok disclose that the semiconductor stack 22 is suspended above the first upper surface of the bonding structure (Bower, Fig. 2I). Regarding claim 20, Bower discloses that a semiconductor structure, comprising: a carrier 50; a bonding structure 60 on the carrier and having a first upper surface; and a plurality of semiconductor devices 22 on the first upper surface of the bonding structure 60, each of the plurality of semiconductor devices comprising: a semiconductor stack 33 on the bonding structure 60 and comprising a first surface and second surface opposite to the first surface 50 (Fig. 2I); a supporting element 38 having a bottom surface connected to [[on]] the bonding structure 60, and a second upper surface opposite to the bottom surface; and a bridge layer 24/36 having a first portion directly connected to the supporting element 38 (Fig. 2I), a second portion connected to the first portion and a third portion connected to the second portion; wherein the second portion and the third portion of the bridge layer 24/36 are suspended above the first upper surface of the bonding structure 60 (Fig. 6I), there is no solid material between the second portion and the first upper surface of the bonding structure or between the third portion and the first upper surface of the bonding structure, the bridge layer 24/36 is insulated from the semiconductor stack (Fig. 2I), and wherein the third portion of the bridge layer directly contact the second surface of the semiconductor stack (Cok, Fig. 2-7). Reclaim 21, Bower & Cok disclose that the first portion of the bridge layer 24/36 is devoid of directly contacting the second upper surface of the supporting element 38 (Fig. 2I). Reclaim 22, Bower & Cok fail to specify that a ratio of the second length and the first length is between 0.1 and 0.5. 23. However, notwithstanding, one of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization. Before effective filing date of the invention it would have been obvious to a person of ordinary skill in the art to use a certain ratio of the second length and the first length, because it would have been to obtain a certain ratio of the second length and the first length to achieve sustainable support of the bridge layer. Reclaim 23 , Bower & Cok fail to specify that the second portion of the bridge layer comprises a second length and a fourth thickness, and the fourth thickness is less than the second length. However, notwithstanding, one of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization. Before effective filing date of the invention it would have been obvious to a person of ordinary skill in the art to use a certain length to thickness because it would have been to obtain a certain length to thickness to achieve sustainable support of the bridge layer (not so easy to break during the process to reduce failure). Reclaim 24, Bower & Cok fail to specify a ratio of the fourth thickness and the second length is between 0.05 and 1. However, notwithstanding, one of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization. Before effective filing date of the invention it would have been obvious to a person of ordinary skill in the art to use a certain ratio of the fourth thickness and the second length, because it would have been to obtain a certain ratio of the fourth thickness and the second length to achieve sustainable support of the bridge layer (not so easy to break during the process to reduce failure). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SU C KIM whose telephone number is (571)272-5972. The examiner can normally be reached M-F 9:00 to 5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 571-270-7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SU C KIM/Primary Examiner, Art Unit 2899
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Prosecution Timeline

Dec 14, 2021
Application Filed
Sep 04, 2024
Non-Final Rejection — §103
Dec 05, 2024
Response Filed
Feb 25, 2025
Final Rejection — §103
Apr 21, 2025
Interview Requested
Apr 25, 2025
Applicant Interview (Telephonic)
Apr 25, 2025
Examiner Interview Summary
May 28, 2025
Request for Continued Examination
May 29, 2025
Response after Non-Final Action
Jul 08, 2025
Non-Final Rejection — §103
Oct 10, 2025
Response Filed
Dec 18, 2025
Final Rejection — §103
Feb 23, 2026
Request for Continued Examination
Mar 02, 2026
Response after Non-Final Action
Mar 06, 2026
Non-Final Rejection — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
77%
Grant Probability
65%
With Interview (-12.4%)
2y 11m
Median Time to Grant
High
PTA Risk
Based on 899 resolved cases by this examiner. Grant probability derived from career allow rate.

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