Prosecution Insights
Last updated: April 18, 2026
Application No. 17/553,214

COUPLED FINS WITH BLIND TRENCH STRUCTURES

Non-Final OA §103
Filed
Dec 16, 2021
Examiner
MAIGA, SIDI MOHAMED
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
3 (Non-Final)
76%
Grant Probability
Favorable
3-4
OA Rounds
2y 8m
To Grant
85%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
22 granted / 29 resolved
+7.9% vs TC avg
Moderate +9% lift
Without
With
+9.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
32 currently pending
Career history
61
Total Applications
across all art units

Statute-Specific Performance

§103
64.2%
+24.2% vs TC avg
§102
28.5%
-11.5% vs TC avg
§112
6.6%
-33.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 29 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 03/17/2026 has been entered. Response to Arguments Applicant’s arguments with respect to claim(s) 1, 11 and 24 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1 – 5, 10 – 15 and 17 – 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over BIDDLE et al. (US 20130056253 A1, “BIDDLE”) in view of Bajorek et al. (US 4349862 A) Regarding claim 1, BIDDLE discloses (Fig. 1, 6, 8 and 9) an electronic package, comprising: a core, wherein the core comprises glass (See para [00[53]); a first via (1a, 1b, or 1g) vertically through the core; a first fin that extends out laterally from the first via; a second via (1a, 1b, or 1g) vertically through the core; and a second fin that extends out laterally from the second via, wherein the first fin and the second fin are laterally between the first via and the second via, and wherein a face of the first fin laterally overlaps with a face of the second fin (see annotated figure below). PNG media_image1.png 512 721 media_image1.png Greyscale BIDDLE is silent on wherein the first fin and the second fin are laterally between the first via and the second via However, Bajorek discloses (Fig. 6.1) wherein the first fin (325) and the second fin (324’) are laterally between the first via and the second via (Fig. 6.1) BIDDLE and Bajorek are both considered to be analogous to the claimed invention because they are in the same field of vias structure. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified BIDDLE to incorporate the teachings of Bajorek and provide wherein the first fin (325) and the second fin (324’) are laterally between the first via and the second via (Fig. 6.1). Doing so would provide a capacitive element (See Col. 5, Lines: 55 - 62) Regarding claim 2, BIDDLE in view of Bajorek discloses the electronic package of claim 1, wherein the first fin has a height that is smaller than a height of the first via (see annotated figure above). Regarding claim 3, BIDDLE in view of Bajorek discloses the electronic package of claim 2, wherein the first fin has a top surface substantially coplanar with a top surface of the first via, and a bottom surface that is above a bottom surface of the first via (see annotated figure above). Regarding claim 4, BIDDLE in view of Bajorek discloses the electronic package of claim 2, wherein the second fin has the height (See BIDDLE Fig. 6). Regarding claim 5, BIDDLE in view of Bajorek discloses the electronic package of claim 4, wherein a top surface of the first fin is substantially coplanar with a top surface of the second fin (see annotated figure above). Regarding claim 10, BIDDLE in view of Bajorek discloses the electronic package of claim 1, wherein BIDDLE further discloses the first via and the second via are part of single ended signaling interfaces (see para [0010] and [0057]). Regarding claim 11, BIDDLE (Fig. 1, 6, 8 and 9) discloses an electronic package, comprising: a substrate with a first surface and a second surface opposite from the first surface, wherein the substrate comprises glass (para [0053]); a first via (1a, 1b, or 1g) vertically through the substrate from the first surface to the second surface; a first fin extending laterally out from the via; a second via (1a, 1b, or 1g) vertically through the substrate from the first surface to the second surface; and a second fin extending laterally out from the second via, wherein the first fin and the second fin are laterally between the first via and the second via, and wherein a face of the first fin laterally overlaps with a face of the second fin (see annotated figure below). PNG media_image2.png 399 732 media_image2.png Greyscale BIDDLE is silent on wherein the first fin and the second fin are laterally between the first via and the second via However, Bajorek discloses (Fig. 6.1) wherein the first fin (325) and the second fin (324’) are laterally between the first via and the second via (Fig. 6.1) BIDDLE and Bajorek are both considered to be analogous to the claimed invention because they are in the same field of vias structure. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified BIDDLE to incorporate the teachings of Bajorek and provide wherein the first fin (325) and the second fin (324’) are laterally between the first via and the second via (Fig. 6.1). Doing so would provide a capacitive element (See Col. 5, Lines: 55 - 62) Regarding claim 12, BIDDLE in view of Bajorek discloses the electronic package of claim 11, wherein a thickness of the first fin is less than a diameter of the first via (see annotated figure below). PNG media_image3.png 257 613 media_image3.png Greyscale Regarding claim 13, BIDDLE in view of Bajorek discloses the electronic package of claim 11, wherein a length of the first fin is greater than a diameter of the first via (see annotated figure below). PNG media_image4.png 296 541 media_image4.png Greyscale Regarding claim 14, BIDDLE in view of Bajorek discloses the electronic package of claim 11, wherein BIDDLE further discloses a top surface of the first fin is substantially coplanar with the first surface of the substrate (se Fig. 8). Regarding claim 15, BIDDLE in view of Bajorek discloses the electronic package of claim 11, wherein a height of the first fin is less than a height of the first via (see annotated figure above). PNG media_image1.png 512 721 media_image1.png Greyscale Regarding claim 17, BIDDLE in view of Bajorek discloses the electronic package of claim 11, wherein the first via is part of a single ended signaling interface (see para [0010] and [0057]). Regarding claim 18, BIDDLE in view of Bajorek discloses the electronic package of claim 11, further comprising: a first pad over the first via on the first surface of the substrate; and a second pad under the first via on the second surface of the substrate (see annotated figure above). PNG media_image5.png 329 776 media_image5.png Greyscale Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over BIDDLE et al. (US 20130056253 A1, “BIDDLE”) in view of Bajorek et al. (US 4349862 A) and LIU et al. (US 20110094786 A1, “LIU”). Regarding claim 6, BIDDLE in view of Bajorek discloses the electronic package of claim 2, BIDDEL in view of Bajorek is silent on wherein the second fin has a height that is different than the height of the first fin. However, LIU discloses (Fig. 1) to disclose wherein the second fin has a height that is different than the height of the first fin (see annotated figure below). PNG media_image6.png 550 901 media_image6.png Greyscale Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified BIDDLE in view of Bajorek to incorporate the teachings of LIU and provide wherein the second fin has a height that is different than the height of the first fin (see figure above) . Doing so would provide design flexibility, improved signal integrity and tailored performance for high-speed electronic packages. Claim(s) 24 – 25 is/are rejected under 35 U.S.C. 103 as being unpatentable over BIDDLE et al. (US 20130056253 A1, “BIDDLE”) in view of Bajorek et al. (US 4349862 A) and ELSHERBINI et al. (US 20200273839 A1). Regarding claim 24, BIDDLE (Fig. 1, 6, 8 and 9) discloses an electronic system, comprising: a board; a package substrate coupled to the board, wherein a single ended signaling interface is provided in the package substrate (See abstract), wherein the single ended signaling interface comprises: a first via (1a, 1b, or 1g) vertically through a package core (para [0053]); a first fin extending laterally out from the first via; a second via (1a, 1b, or 1g) vertically through the package core; a second fin extending laterally out from the second via, wherein the first fin and the second fin are laterally between the first via and the second via, and wherein a surface of the second fin laterally overlaps with a surface of the first fin (see annotated figure below); PNG media_image1.png 512 721 media_image1.png Greyscale BIDDLE is silent on wherein the first fin and the second fin are laterally between the first via and the second via However, Bajorek discloses (Fig. 6.1) wherein the first fin (325) and the second fin (324’) are laterally between the first via and the second via (Fig. 6.1) BIDDLE and Bajorek are both considered to be analogous to the claimed invention because they are in the same field of vias structure. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified BIDDLE to incorporate the teachings of Bajorek and provide wherein the first fin (325) and the second fin (324’) are laterally between the first via and the second via (Fig. 6.1). Doing so would provide a capacitive element (See Col. 5, Lines: 55 - 62) BIDDLE in view of Bajorek is silent on a die coupled to the package substrate. However, ELSHERBINI discloses (Fig. 1) a die (114-3, 114-4) coupled to the package substrate (100). BIDDLE in view of Bajorek and ELSHERBINI are both considered to be analogous to the claimed invention because they are in the same field of substrate. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified DIBBLE in view of Bajorek to incorporate the teachings of ELSHERBINI and provide a die (114-3, 114-4) coupled to the package substrate (100). Doing so would provide mechanical stability and to facilitate connection to other components, such as circuit boards (para [0001]). Regarding claim 25, BIDDLE in view of Bajorek and ELSHERBINI discloses the electronic system of claim 24, wherein the first fin is at a top of the first via, and wherein the second fin is at a top of the second via (see annotated figure below). PNG media_image2.png 399 732 media_image2.png Greyscale Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SIDI MOHAMED MAIGA whose telephone number is (703)756-1870. The examiner can normally be reached Monday - Friday 8 am 5 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached on 571-272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SIDI M MAIGA/Examiner, Art Unit 2847 /TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Dec 16, 2021
Application Filed
Nov 02, 2022
Response after Non-Final Action
Jun 18, 2025
Non-Final Rejection — §103
Sep 16, 2025
Response Filed
Dec 13, 2025
Final Rejection — §103
Feb 13, 2026
Response after Non-Final Action
Mar 17, 2026
Request for Continued Examination
Mar 24, 2026
Response after Non-Final Action
Mar 31, 2026
Non-Final Rejection — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12586995
ELECTRICAL APPARATUS AND PLUG
2y 5m to grant Granted Mar 24, 2026
Patent 12588142
HIGH-FREQUENCY ELECTRONIC COMPONENT
2y 5m to grant Granted Mar 24, 2026
Patent 12568584
WIRING BOARD
2y 5m to grant Granted Mar 03, 2026
Patent 12563665
INSULATING CIRCUIT BOARD AND SEMICONDUCTOR DEVICE IN WHICH SAME IS USED
2y 5m to grant Granted Feb 24, 2026
Patent 12550257
WIRING SUBSTRATE
2y 5m to grant Granted Feb 10, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
76%
Grant Probability
85%
With Interview (+9.4%)
2y 8m
Median Time to Grant
High
PTA Risk
Based on 29 resolved cases by this examiner. Grant probability derived from career allow rate.

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