DETAILED ACTION
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 2/6/2026 has been entered.
Response to Arguments
Applicant’s arguments with respect to claim 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 6-8, 10, and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 2018/0233452) (“Lin”), Roth et al. (US 2021/0249952) (“Roth”), and Lee et al. (US 2017/0243845) (“Lee”).
With regard to claim 1, fig. 1B of Lin discloses a packaged device comprising: a first organic (“printed circuit board”, par [0020]) laminate substrate 200; a second laminate substrate 316 that is joined onto a top surface 202 of the first organic laminate substrate 200, wherein the second laminate substrate 316 has a higher wiring density than the first organic laminate substrate 200; a first component device 302 is mounted on a top surface 313 of the second laminate substrate 316; and a second component device (left 400 in fig. 1B) is mounted on a bottom surface 315 of the second organic laminate substrate 316 and recesses into a first cavity (unfilled space in 200 for 400) at the top surface 202 of the first organic laminate substrate 200.
Lin does not disclose a second organic laminate substrate, the first component device including a fan out wafer level package (FOWLP) and multiple integrated circuits (ICs) that are mounted onto the FOWLP.
However, fig. 1 of Roth discloses a second organic (“first substrate 101 includes organic material”, par [0025]) laminate substrate 101.
Roth does not disclose that the first component device including a fan out wafer level package (FOWLP) and multiple integrated circuits (ICs) that are mounted onto the FOWLP.
However, fig. 1 of Lee discloses that the first component device 100 including a fan out wafer level package (FOWLP) (“FOWLP 100”, par [0018]) and multiple integrated circuits (ICs) (105 110) that are mounted onto the FOWLP 100.
Therefore, it would have been obvious to one of ordinary skill in the art to form the intermetal dielectric layer 317 of fig. 1B of Lin with the organic material as taught in Roth in order to provide a cost effective and mechanically flexible way to spread a connection to a wider pitch or reroute a connection to a different connection. See par [0025] of Roth.
It would also have been obvious to one of ordinary skill in the art to replace logic die of Lin with the fan-out wafer-level-process integrated circuit as taught in Lee in order to provide a plurality of dies embedded in a molded wafer. See par [0002] of Lee.
With regard to claim 2, fig. 1B of Lin disclose that the first organic laminate substrate 200 is a laminate comprising a set of standard build-up layers 206 and the second laminate substrate 316 is a high-density interconnect (HDI) laminate 316.
Lin does not disclose a second organic laminate substrate.
However, fig. 1 of Roth discloses a second organic (“first substrate 101 includes organic material”, par [0025]) laminate substrate 101.
Therefore, it would have been obvious to one of ordinary skill in the art to form the intermetal dielectric layer 317 of fig. 1B of Lin with the organic material as taught in Roth in order to provide a cost effective and mechanically flexible way to spread a connection to a wider pitch or reroute a connection to a different connection. See par [0025] of Roth.
With regard to claim 6, fig. 1B of Lin discloses that the first component device 302 is mounted on the top surface (top of 316) of the second laminate substrate 316 at the FOWLP (“FOWLP”, par [0002]).
Lin does not disclose a second organic laminate substrate, the FOWLP further includes a fine pitch redistribution layer (RDL).
However, fig. 1 of Roth discloses a second organic (“first substrate 101 includes organic material”, par [0025]) laminate substrate 101.
Roth does not disclose that the FOWLP further includes a fine pitch redistribution layer (RDL).
However, fig. 1A of Lee discloses that the FOWLP 100 further includes a fine pitch redistribution layer (RDL) 130.
Therefore, it would have been obvious to one of ordinary skill in the art to form the intermetal dielectric layer 317 of fig. 1B of Lin with the organic material as taught in Roth in order to provide a cost effective and mechanically flexible way to spread a connection to a wider pitch or reroute a connection to a different connection. See par [0025] of Roth.
It would also have been obvious to one of ordinary skill in the art to replace logic die of Lin with the fan-out wafer-level-process integrated circuit as taught in Lee in order to provide a plurality of dies embedded in a molded wafer. See par [0002] of Lee.
With regard to claim 7, fig. 1B of Lin discloses that the second component device 400 provides memory storage (“high bandwidth memory (HBM) package 400”, par [0019]) for the first component device (“logic die 302”, par [0021]).
With regard to claim 8, fig. 1B of Lin discloses that the second component device 400 is a high bandwidth memory (HBM) (“high bandwidth memory (HBM) package 400”, par [0019]) and the first component device 302 is a central processing unit (CPU) (“logic die 302 may include a central processing unit (CPU)”, par [0021]) or graphical processing unit (GPU).
With regard to claim 10, fig. 1B of Lin discloses that the second component device (left 400 in fig. 1B) is mounted at a position of the second laminate substrate 316 that overlaps the first component device 302.
Lin does not disclose a second organic laminate substrate.
However, fig. 1 of Roth discloses a second organic (“first substrate 101 includes organic material”, par [0025]) laminate substrate 101.
Therefore, it would have been obvious to one of ordinary skill in the art to form the intermetal dielectric layer 317 of fig. 1B of Lin with the organic material as taught in Roth in order to provide a cost effective and mechanically flexible way to spread a connection to a wider pitch or reroute a connection to a different connection. See par [0025] of Roth.
With regard to claim 13, fig. 1B of Lin discloses that the second laminate substrate 316 is soldered onto the first organic laminate substrate 200 using control collapse of chip connection (C4) and ball grid array (BGA) (“ball grid array”, par [0024]).
Allowable Subject Matter
Claims 3-5, 9, and 11-12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 21-27 allowed.
The following is a statement of reasons for the indication of allowable subject matter:
The primary reason for the allowance of claim 21 is that Lin et al. (US 2018/0233452) (“Lin”), Roth et al. (US 2021/0249952) (“Roth”), and Lee et al. (US 2017/0243845) (“Lee”) do not disclose a conductive pillar having a first and a second end, the first end being in direct contact with the bottom surface of the HDI and the second end being in direct contact with a bottom surface of the first cavity.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BENJAMIN T LIU whose telephone number is (571)272-6009. The examiner can normally be reached Monday-Friday 11:00am-7:30pm.
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/BENJAMIN TZU-HUNG LIU/Primary Examiner, Art Unit 2893