DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Status
Claims 7-10 and 21-25 were previously withdrawn. Claims 16-20 and 26-30 were previously cancelled.
The amendments to claims 1, 3, 4, 6, and 11 in the reply dated 21 November 2025 are acknowledged. Claims 2 and 13 have been cancelled. Claim 6 now appears to read on the elected species. New claims 31-33 have been added, of which 32 and 33 are withdrawn for reading on unelected species. Claim 32 is withdrawn for reading on a species with an isolation structure between first and second source or drain regions, and claim 33 is withdrawn for its dependency on withdrawn claim 21. Claim 31 is herein examined.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 and 3-4 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Xie et al (US 20230040712 A1, hereinafter “Xie”).
Regarding Claim 1 – Xie discloses an integrated circuit comprising: a first source or drain region (710 [0064] and annotated Fig. 21); a second source or drain region (910 [0066] and annotated Fig. 21) spaced from and over the first source or drain region ([0065] and Fig. 21); and a conductive contact (1610 [0075] and Fig. 21) having a same continuous conductive material ([0075]) that contacts a top surface of the second source or drain, a side surface of the second source or drain region (1st Side Surface of 910, annotated Fig. 21), and a bottom surface of the second source or drain region (910 Bottom Surface, annotated Fig. 21), wherein the same continuous conductive material further extends onto a top surface of the first source or drain region (710 Top Surface, annotated Fig. 21).
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Regarding Claim 3 – Xie further discloses the integrated circuit of claim 1, wherein the same continuous conductive material (1610 [0075]) also extends down a side surface of the first source or drain region (1st Side Surface of 710, annotated Fig. 21).
Regarding Claim 4 – Xie further discloses the integrated circuit of claim 1, wherein the side surface of the second source or drain region is a first side surface of the second source or drain region, the same continuous conductive material also extending down a second side surface of the second source or drain region (2nd Side Surface of 910, annotated Fig. 21) such that the conductive contact is laterally adjacent to the bottom surface of the second source or drain region on both the first and second side surfaces of the second source or drain region (Annotated Fig. 21).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 5-6, 11-12, 14, and 31 are rejected under 35 U.S.C. 103 as being unpatentable over Xie et al (US 20230040712 A1, hereinafter “Xie”), in view of Liao et al (US 20210366907 A1, hereinafter “Liao”).
Regarding Claim 5 – Xie discloses all the limitations of claim 1.
Xie further discloses the conductive contact is a first conductive contact (1610 formed before other contacts such as 2110, [0075] and [0080]).
Xie fails to disclose the integrated circuit comprising a second conductive contact on a bottom surface of the first source or drain region.
However, Liao discloses the integrated circuit comprising a second conductive contact (274 Liao [0042] and Fig. 17A) on a bottom surface of the first source or drain region (Fig. 17A).
Liao discloses stacked nanoscale transistors analogous to Xie. Liao teaches a second, backside contact to the first source/drain region with dielectric isolation separating it from other contacts to enable higher flexibility and density in power and signal routing in support of high density stacked transistors ([0018]). Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to use a backside contact with dielectric isolation for the first source drain region to enable higher flexibility and density in power and signal routing.
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Regarding Claim 6 – Xie modified by Liao discloses all the limitations of claim 5.
The combination of Xie and Liao further discloses a dielectric layer adjacent to the first source or drain region (at least 216, Liao [0024] and Fig. 17A) and separating the first conductive contact (250, Liao [0039] and Fig. 17A) from the second conductive contact.
Regarding Claim 11 – Xie discloses a stacked transistor structure, comprising: a first nanoribbon (lower 130 [0048] and [0050] and Fig. 1B); a second nanoribbon (upper 130 [0048] and [0050] and Fig. 1B); a first gate structure (1320 [0071]) wrapped around the first nanoribbon Fig. 13); a first source or drain region (710 [0064]) laterally adjacent to the first gate structure and in contact with the first nanoribbon ([0063]); a second source or drain region (910 [0066]) spaced from and over the first source or drain region (Annotated Fig. 21), the second source or drain region laterally adjacent to the second gate structure and in contact with the second nanoribbon ([0066]); and a first conductive contact (1610 [0075] and Fig. 21) on a top surface of the second source or drain and extending down a side surface of the second source or drain region and a side surface of the first source or drain region (Annotated Fig. 21);
Xie fails to disclose a second gate structure wrapped around the second nanoribbon; a second conductive contact on a bottom surface of the first source or drain region; and a dielectric layer adjacent to the first source or drain region and separating the first conductive contact from the second conductive contact.
However, Liao discloses a second gate structure wrapped around the second nanoribbon (gate electrode may be a multi-layer structure, Liao [0035]); a second conductive contact on a bottom surface of the first source or drain region (274 Liao [0042] and Fig. 17A); and a dielectric layer (at least 216, Liao [0024] and Fig. 17A) adjacent to the first source or drain region and separating the first conductive contact from the second conductive contact (Liao Fig. 17A).
Liao discloses stacked nanoscale transistors analogous to Xie. Liao teaches a second, backside contact to the first source/drain region with dielectric isolation separating it from other contacts to enable higher flexibility and density in power and signal routing in support of high density stacked transistors ([0018]). Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to use a backside contact with dielectric isolation for the first source drain region to enable higher flexibility and density in power and signal routing.
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Regarding Claim 12 – Xie modified by Liao discloses all the limitations of claim 11.
The combination of Xie and Liao further discloses the conductive contact is also on a top surface of the first source or drain region (Xie [0075] and Annotated Fig. 21).
Regarding Claim 14 – Xie modified by Liao discloses all the limitations of claim 11.
The combination of Xie and Liao further discloses the side surface of the second source or drain region is a first side surface of the second source or drain region (1st Side Surface of 910 in annotated Xie Fig. 21), the conductive contact also extending down a second side surface of the second source or drain region such that the conductive contact is laterally adjacent to the bottom surface of the second source or drain region on both the first and second side surfaces of the second source or drain region (Xie Fig. 21).
Regarding Claim 31 – Xie modified by Liao discloses all the limitations of claim 11.
The combination of Xie and Liao further discloses the first conductive contact comprises a same continuous conductive material that contacts the top surface of the second source or drain region and extends down the side surface of the second source or drain region and the side surface of the first source or drain region (The conductive contact shown as the same layer of conductive material in annotated Fig. 21, deposited as 1610 [0075]).
Response to Arguments
Consistent with the interview discussion of 14 November 2025, the applicant argues that “(t)he span of the first and second source/drain regions is generic with respect to the selected species...”. The argument has since been further considered and found not persuasive. The examiner respectfully submits that the species in which the width of the first and second source/drain regions are different were clearly noted in the office action dated 3 June 2025 as species 8, 9, and 17. The widths shown in elected species 3 (Figs. 2c and 5a) are clearly shown equal in the drawings and not noted in the specification to be unequal. To apply the difference in width qualification to species 3 would negate at least species 17. Claim 21 recites the limitation that the width (“maximum span”) of a source or drain region is different from the one above it, specifically “the first maximum span is 5 nm or more greater than the second maximum span”. This limitation differentiates the claim from reading on the elected species 3, while clearly reading on unelected species 8, 9, and/or 17. Claims 22-25 depend on claim 21. Therefore, claims 21-25 remain withdrawn.
Applicant’s additional arguments have been considered but are moot in view of the new grounds of rejection necessitated by amendment.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JASON MCDONALD whose telephone number is (571)272-5944. The examiner can normally be reached M-F 7:30a-5p Eastern, alternating Fridays out of office.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio Maldonado can be reached at (571) 272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JASON MCDONALD/Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898
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