Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Amendment filed 9/30/2025 has been entered. Claims 1 – 10 are amended. Claims 25 – 38 are newly added. Claims 11 – 24 are canceled.
Claim Rejections - 35 USC § 112
Claims 1 and 27 ( Currently Amended ) are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Regarding claim 1 ( Currently Amended ), cited “ a passive die comprising silicon, the passive die attached to the surface of the EIC by second interconnects therebetween, wherein the second interconnects comprise second conductive pillars ”, which is not disclosed in the original specification; therefore, this limitation is new matter. Regarding claim 27 ( Currently Amended ), cited “ a passive die comprising silicon, the passive die flip chip attached to the surface of the EIC by second interconnects therebetween ”, which is not disclosed in the original specification; therefore, this limitation is new matter. For the purpose of examination, above limitation is viewed as the one shown in the original specification, [0019], cited “ In addition, additional passive silicon dies may be flip chipped on some or all power dissipating locations of the PIC, thus providing a low cost heat dissipation path through the top of the TIA and passive die as needed ”.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 – 10, 25 – 36 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nelson ( Pub. No. US 20200219865 A1 ), hereinafter Nelson.
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Regarding Independent Claim 1 ( Currently Amended ), Nelson teaches a microelectronics package system, comprising:
a photonic integrated circuit (PIC) ( Nelson, FIG. 5, 105; [0034], photonic integrated circuit 105 (PIC) ) directly attached to a surface of an electrical integrated circuit (EIC) ( Nelson, FIG. 5, 110; [0034], electronic integrated circuit 110 ) by first interconnects ( Nelson, FIG. 5, short electrical connections between 105 and 110; [0034] Referring to FIGS. 1A and 1B, in some embodiments, short electrical connections between (i) a component (e.g., a photodetector and/or modulator) on a photonic integrated circuit 105 (PIC) and (ii) a component or circuit (e.g., a transimpedance amplifier and/or modulator driver) on an electronic integrated circuit 110 may be formed by flip-chip bonding the photonic integrated circuit 105 to the electronic integrated circuit 110 to form a flip-chip assembly ) therebetween, wherein the first interconnects ( Nelson, FIG. 5, short electrical connections between 105 and 110 ) comprise first conductive pillars ( Nelson, [0036], In some embodiments, the length may be nearly as small as the height of the metal bumps 140 (e.g., copper pillar bumps, discussed in further detail below ) forming connections between the photonic integrated circuit 105 and the electronic integrated circuit 110 ), and wherein the first interconnects ( Nelson, FIG. 5, short electrical connections between 105 and 110 ) comprise a plurality of paths ( Nelson, FIG. 5, short electrical connections between 105 and 110 ) between the EIC ( Nelson, FIG. 5, 110; [0034], electronic integrated circuit 110 ) and the PIC ( Nelson, FIG. 5, 105; [0034], photonic integrated circuit 105 (PIC) ), wherein individual paths of the plurality of paths ( Nelson, FIG. 5, short electrical connections between 105 and 110 ) are less than 100 micrometers ( Nelson, [0036], In some embodiments, the electrical connection between an optoelectronic device on the photonic integrated circuit 105 and the corresponding interface circuit (e.g., amplifier) on the electronic integrated circuit 110 may have a length of less than 500 microns, or less than 200 microns, or less than 100 microns ) long; and
a passive die ( Nelson, FIG. 5, 505; [0045], One or more optical engines may be used to provide optical interfaces to a digital integrated circuit 505 (e.g., a switch ASIC) as shown in FIG. 5. An ASIC heat sink 510 conducts heat away from the digital integrated circuit 505 (e.g., to a heat-pipe-based cooling system) ) comprising silicon, the passive die attached to the surface of the EIC ( Nelson, FIG. 5, 540. [0045], A second beachfront 540 may be used to accommodate another optical engine (not shown), or, for example, an edge connector for making serial electrical connections to the digital integrated circuit 505. Ps. As explained in Claim Rejections - 35 USC § 112 of this office action, “EIC” here is viewed as “some or all power dissipating locations of the PIC” ) by second interconnects ( Nelson, FIG. 5, short electrical connections between 505 and 540 ) therebetween, wherein the second interconnects ( Nelson, [0046], In some embodiments, digital integrated circuit 505 has a plurality of electrical serial transmitter and receivers, and the package provides direct electrical connections (e.g., at the second beachfront 540) to a first plurality of the electrical serial transmitter and receivers of the digital integrated circuit 505 ) comprise second conductive pillars ( Nelson, [0036], In some embodiments, the length may be nearly as small as the height of the metal bumps 140 (e.g., copper pillar bumps, discussed in further detail below ).
Regarding Claim 2 ( Currently Amended ), Nelson teaches the microelectronics package system as claimed in claim 1, on which this claim is dependent, Nelson further teaches:
wherein the EIC ( Nelson, FIG. 5, 110; [0034], electronic integrated circuit 110 ) comprises a transimpedance amplifier ( Nelson, [0034], (ii) a component or circuit (e.g., a transimpedance amplifier and/or modulator driver) on an electronic integrated circuit 110 ), and wherein the PIC comprises a photodiode ( Nelson, [0034], (i) a component (e.g., a photodetector and/or modulator) connected to the transimpedance amplifier (Nelson, [0034]).
Regarding Claim 3 ( Currently Amended ), Nelson teaches the microelectronics package system as claimed in claim 1, on which this claim is dependent, Nelson further teaches:
further comprising:
an insert ( Nelson, [0034], The photonic integrated circuit may include a substrate (e.g., a silicon substrate) having a front surface (the upper surface of the photonic integrated circuit 105, in the orientation of FIG. 1A), on or in which may be V-grooves (for passive alignment to an optical fiber, not shown for ease of illustration), optical waveguides, optoelectronic devices (e.g., photodetectors and modulators), and one or more metal layers forming conductive traces for routing electrical signals to and from the optoelectronic devices; FIG. 4, PICs with single/few layers – BumpBond to IC; [0036], (or the photonic integrated circuit 105) to have a redistribution layer on either surface; it may be sufficient instead to have a relatively small number of patterned metal layers (e.g., 10 or fewer metal layers) on one or both of the electronic integrated circuit 110 and the photonic integrated circuit 105), wherein a second surface of the PIC, opposite the surface, is on the insert ( Nelson, photonic integrated circuit 105, [0036], (or the photonic integrated circuit 105) to have a redistribution layer on either surface; [0042], carrier 315 );
a base ( Nelson, FIG. 5, mechanical support; [0042], The carrier 315 may provide mechanical reinforcement to the electronic integrated circuit 110 and to the photonic integrated circuit 105 to reduce the risk of damage during assembly ), wherein the insert is between first and second portions of the base; and
a lid ( Nelson, FIG. 5, compression screw, attach screw, 515, 520; [0045], top clamp 515 removable heat sink section 520 ) over the EIC (Nelson, FIG. 5, 110) and the passive die ( Nelson, FIG. 5, 505 ), wherein a first thermal interface material (TIM) ( Nelson, FIG. 5, 525; [0045], a layer of compliant thermal interface material 525 )is between the EIC (Nelson, FIG. 5, 110) and the lid and a second TIM ( Nelson, FIG. 5, 525 ) is between the passive die ( Nelson, FIG. 5, 505 ) and the lid ( Nelson, FIG. 5, 520 ).
Regarding Claim 4 ( Currently Amended ), Nelson teaches the microelectronics package system as claimed in claim 3, on which this claim is dependent, Nelson further teaches:
wherein the insert ( Nelson, FIG. 4, PICs with single/few layers – BumpBond to IC; [0036], (or the photonic integrated circuit 105) to have a redistribution layer on either surface; it may be sufficient instead to have a relatively small number of patterned metal layers (e.g., 10 or fewer metal layers) on one or both of the electronic integrated circuit 110 and the photonic integrated circuit 105 ) comprises aluminum and nitrogen.
Regarding Claim 5 ( Currently Amended ), Nelson teaches the microelectronics package system as claimed in claim 1, on which this claim is dependent, Nelson further teaches: further comprising:
a substrate ( Nelson, [0034], The photonic integrated circuit may include a substrate (e.g., a silicon substrate) having a front surface (the upper surface of the photonic integrated circuit 105, in the orientation of FIG. 1A), on or in which may be V-grooves (for passive alignment to an optical fiber, not shown for ease of illustration), optical waveguides, optoelectronic devices (e.g., photodetectors and modulators), and one or more metal layers forming conductive traces for routing electrical signals to and from the optoelectronic devices ) on the base, wherein the substrate is coupled to the PIC by a wire bond ( Nelson, [0034], forming conductive traces ) therebetween.
Regarding Claim 6 ( Currently Amended ), Nelson teaches the microelectronics package system as claimed in claim 1, on which this claim is dependent, Nelson further teaches:
wherein the passive die ( Nelson, FIG. 5, 505; [0045], One or more optical engines may be used to provide optical interfaces to a digital integrated circuit 505 (e.g., a switch ASIC) as shown in FIG. 5. An ASIC heat sink 510 conducts heat away from the digital integrated circuit 505 (e.g., to a heat-pipe-based cooling system) ) is positioned near a region of the PIC ( Nelson, FIG. 5, 105; [0034], photonic integrated circuit 105 (PIC) ) to dissipate a higher amount of energy ( Nelson, [0045], An ASIC heat sink 510 conducts heat away from the digital integrated circuit 505 (e.g., to a heat-pipe-based cooling system); [0046], In some embodiments, the digital integrated circuit 505 is rectangular (e.g., square) and sufficiently large to accommodate one or more optical engines on each of its four edges, providing a plurality of optical interfaces to the digital integrated circuit 505) compared to nearby regions of the PIC ( Nelson, FIG. 5, 105; [0034], photonic integrated circuit 105 (PIC) ).
Regarding Claim 7 ( Currently Amended ), Nelson teaches the microelectronics package system as claimed in claim 1, on which this claim is dependent, Nelson further teaches:
wherein a pitch between the plurality of paths is less than 125 micrometers ( Nelson, [0036], In some embodiments, the electrical connection between an optoelectronic device on the photonic integrated circuit 105 and the corresponding interface circuit (e.g., amplifier) on the electronic integrated circuit 110 may have a length of less than 500 microns, or less than 200 microns, or less than 100 microns ).
Regarding Claim 8 ( Currently Amended ), Nelson teaches the microelectronics package system as claimed in claim 1, on which this claim is dependent, Nelson further teaches:
wherein the PIC ( Nelson, FIG. 5, 105; [0034], photonic integrated circuit 105 (PIC) ) comprises a laser ( Nelson, [0034], The photonic integrated circuit may include … an optical fiber … (i) a mode that may propagate in a single-mode fiber ), a semiconductor optical amplifier ( Nelson, [0035], transimpedance amplifiers for amplifying photocurrents generated by photodetectors on the photonic integrated circuit 105 ), or a photodiode (Nelson, [0014], In some embodiments: the photonic integrated circuit includes a photodetector).
Regarding Claim 9 ( Currently Amended ), Nelson teaches the microelectronics package system as claimed in claim 1, on which this claim is dependent, Nelson further teaches:
wherein the first interconnects and the second interconnects further comprise a solder material ( Nelson, [0038], the photonic integrated circuit 105 and the electronic integrated circuit 110 may be secured together and electrically connected through a plurality of metal bumps. For example, a plurality of solder-topped copper pillar bumps 140 (e.g. Cu/Ni/SnAg bumps) may be formed on the front surface of the photonic integrated circuit 105, and a corresponding plurality of pads 145 (e.g., Ni/Au pads) may be formed on the front surface of the electronic integrated circuit 110; the photonic integrated circuit 105 may then be soldered to the electronic integrated circuit 110 ).
Regarding Claim 10 ( Currently Amended ), Nelson teaches the microelectronics package system as claimed in claim 9, on which this claim is dependent, , Nelson further teaches:
wherein the first conductive pillars and the second conductive pillars each comprise copper ( Nelson, [0038], a plurality of solder-topped copper pillar bumps 140 (e.g. Cu/Ni/SnAg bumps) ).
Regarding Independent Claim 27 ( New ), Nelson teaches a microelectronics package system, comprising:
a photonic integrated circuit (PIC) ( Nelson, FIG. 5, 105; [0034], photonic integrated circuit 105 (PIC) ) flip chip attached to a surface of an electrical integrated circuit (EIC) ( Nelson, FIG. 5, 110; [0034], electronic integrated circuit 110 ) by first interconnects ( Nelson, FIG. 5, short electrical connections between 105 and 110; [0034] Referring to FIGS. 1A and 1B, in some embodiments, short electrical connections between (i) a component (e.g., a photodetector and/or modulator) on a photonic integrated circuit 105 (PIC) and (ii) a component or circuit (e.g., a transimpedance amplifier and/or modulator driver) on an electronic integrated circuit 110 may be formed by flip-chip bonding the photonic integrated circuit 105 to the electronic integrated circuit 110 to form a flip-chip assembly ) therebetween, wherein the first interconnects ( Nelson, FIG. 5, short electrical connections between 105 and 110 ) comprise a plurality of paths of less than 100 micrometers ( Nelson, [0036], In some embodiments, the electrical connection between an optoelectronic device on the photonic integrated circuit 105 and the corresponding interface circuit (e.g., amplifier) on the electronic integrated circuit 110 may have a length of less than 500 microns, or less than 200 microns, or less than 100 microns ) between the EIC and the PIC; and
a passive die ( Nelson, FIG. 5, 505; [0045], One or more optical engines may be used to provide optical interfaces to a digital integrated circuit 505 (e.g., a switch ASIC) as shown in FIG. 5. An ASIC heat sink 510 conducts heat away from the digital integrated circuit 505 (e.g., to a heat-pipe-based cooling system) ) comprising silicon, the passive die flip chip attached to the surface of the EIC ( Nelson, FIG. 5, 540. [0045], A second beachfront 540 may be used to accommodate another optical engine (not shown), or, for example, an edge connector for making serial electrical connections to the digital integrated circuit 505. Ps. As explained in Claim Rejections - 35 USC § 112 of this office action, “EIC” here is viewed as “some or all power dissipating locations of the PIC” ) by second interconnects ( Nelson, [0046], In some embodiments, digital integrated circuit 505 has a plurality of electrical serial transmitter and receivers, and the package provides direct electrical connections (e.g., at the second beachfront 540) to a first plurality of the electrical serial transmitter and receivers of the digital integrated circuit 505 ) therebetween.
Regarding Claim 28 ( New ), Nelson teaches the microelectronics package system as claimed in claim 27, on which this claim is dependent, Nelson further teaches:
wherein the EIC ( Nelson, FIG. 5, 110; [0034], electronic integrated circuit 110 ) comprises a transimpedance amplifier ( Nelson, [0034], (ii) a component or circuit (e.g., a transimpedance amplifier and/or modulator driver), and wherein the PIC comprises a photodiode ( Nelson, [0034], (i) a component (e.g., a photodetector and/or modulator) connected to the transimpedance amplifier (Nelson, [0034]).
Regarding Claim 29 ( New ), Nelson teaches the microelectronics package system as claimed in claim 27, on which this claim is dependent, Nelson further teaches:
an insert ( Nelson, [0034], The photonic integrated circuit may include a substrate (e.g., a silicon substrate) having a front surface (the upper surface of the photonic integrated circuit 105, in the orientation of FIG. 1A), on or in which may be V-grooves (for passive alignment to an optical fiber, not shown for ease of illustration), optical waveguides, optoelectronic devices (e.g., photodetectors and modulators), and one or more metal layers forming conductive traces for routing electrical signals to and from the optoelectronic devices; FIG. 4, PICs with single/few layers – BumpBond to IC; [0036], (or the photonic integrated circuit 105) to have a redistribution layer on either surface; it may be sufficient instead to have a relatively small number of patterned metal layers (e.g., 10 or fewer metal layers) on one or both of the electronic integrated circuit 110 and the photonic integrated circuit 105), wherein a second surface of the PIC, opposite the surface, is on the insert ( Nelson, photonic integrated circuit 105, [0036], (or the photonic integrated circuit 105) to have a redistribution layer on either surface; [0042], carrier 315 );
a base ( Nelson, FIG. 5, mechanical support; [0042], The carrier 315 may provide mechanical reinforcement to the electronic integrated circuit 110 and to the photonic integrated circuit 105 to reduce the risk of damage during assembly ), wherein the insert is between first and second portions of the base; and
a lid ( Nelson, FIG. 5, compression screw, attach screw, 515, 520; [0045], top clamp 515 removable heat sink section 520 ) over EIC (Nelson, FIG. 5, 110) and the passive die ( Nelson, FIG. 5, 505 ), wherein a first thermal interface material (TIM) ( Nelson, FIG. 5, 525; [0045], a layer of compliant thermal interface material 525 ) is between the EIC (Nelson, FIG. 5, 110) and the lid and a second TIM ( Nelson, FIG. 5, 525 ) is between the passive die ( Nelson, FIG. 5, 505 ) and the lid ( Nelson, FIG. 5, 520 ).
Regarding Claim 30 ( New ), Nelson teaches the microelectronics package system as claimed in claim 29, on which this claim is dependent, Nelson further teaches:
wherein the insert ( Nelson, FIG. 4, PICs with single/few layers – BumpBond to IC; [0036], (or the photonic integrated circuit 105) to have a redistribution layer on either surface; it may be sufficient instead to have a relatively small number of patterned metal layers (e.g., 10 or fewer metal layers) on one or both of the electronic integrated circuit 110 and the photonic integrated circuit 105 ) comprises aluminum and nitrogen.
Regarding Claim 31 ( New ), Nelson teaches the microelectronics package system as claimed in claim 29, on which this claim is dependent, Nelson further teaches:
a substrate ( Nelson, [0034], The photonic integrated circuit may include a substrate (e.g., a silicon substrate) having a front surface (the upper surface of the photonic integrated circuit 105, in the orientation of FIG. 1A), on or in which may be V-grooves (for passive alignment to an optical fiber, not shown for ease of illustration), optical waveguides, optoelectronic devices (e.g., photodetectors and modulators), and one or more metal layers forming conductive traces for routing electrical signals to and from the optoelectronic devices ) on the base, wherein the substrate is coupled to the PIC by a wire bond ( Nelson, [0034], forming conductive traces ) therebetween.
Regarding Claim 32 ( New ), Nelson teaches the microelectronics package system as claimed in claim 27, on which this claim is dependent, Nelson further teaches:
wherein the passive die ( Nelson, FIG. 5, 505; [0045], digital integrated circuit 505 (e.g., a switch ASIC) ) is positioned near a region of the PIC ( Nelson, FIG. 5, 105; [0034], photonic integrated circuit 105 (PIC) ) to dissipate a higher amount of energy ( Nelson, [0045], An ASIC heat sink 510 conducts heat away from the digital integrated circuit 505 (e.g., to a heat-pipe-based cooling system); [0046], In some embodiments, the digital integrated circuit 505 is rectangular (e.g., square) and sufficiently large to accommodate one or more optical engines on each of its four edges, providing a plurality of optical interfaces to the digital integrated circuit 505) compared to nearby regions of the PIC.
Regarding Claim 33 ( New ), Nelson teaches the microelectronics package system as claimed in claim 27, on which this claim is dependent, Nelson further teaches:
wherein a pitch between the plurality of paths is less than 125 micrometers ( Nelson, [0036], In some embodiments, the electrical connection between an optoelectronic device on the photonic integrated circuit 105 and the corresponding interface circuit (e.g., amplifier) on the electronic integrated circuit 110 may have a length of less than 500 microns, or less than 200 microns, or less than 100 microns ).
Regarding Claim 34 ( New ), Nelson teaches the microelectronics package system as claimed in claim 27, on which this claim is dependent, Nelson further teaches:
wherein the PIC ( Nelson, FIG. 5, 105; [0034], photonic integrated circuit 105 (PIC) ) comprises a laser ( Nelson, [0034], The photonic integrated circuit may include … an optical fiber … (i) a mode that may propagate in a single-mode fiber ), a semiconductor optical amplifier ( Nelson, [0035], transimpedance amplifiers for amplifying photocurrents generated by photodetectors on the photonic integrated circuit 105 ), or a photodiode (Nelson, [0014], In some embodiments: the photonic integrated circuit includes a photodetector).
Regarding Claim 35 ( New ), Nelson teaches the microelectronics package system as claimed in claim 27, on which this claim is dependent, Nelson further teaches:
wherein the each of the first interconnects and the second interconnects comprise conductive pillars and a solder material ( Nelson, [0038], the photonic integrated circuit 105 and the electronic integrated circuit 110 may be secured together and electrically connected through a plurality of metal bumps. For example, a plurality of solder-topped copper pillar bumps 140 (e.g. Cu/Ni/SnAg bumps) may be formed on the front surface of the photonic integrated circuit 105, and a corresponding plurality of pads 145 (e.g., Ni/Au pads) may be formed on the front surface of the electronic integrated circuit 110; the photonic integrated circuit 105 may then be soldered to the electronic integrated circuit 110 ).
Regarding Claim 36 ( New ), Nelson teaches the microelectronics package system as claimed in claim 35, on which this claim is dependent, Nelson further teaches:
wherein the conductive pillars each comprise copper ( Nelson, [0038], a plurality of solder-topped copper pillar bumps 140 (e.g. Cu/Ni/SnAg bumps) ).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 25, 26, 37, 38 are rejected under 35 U.S.C. 103 as being unpatentable over Nelson, in view of Crouch (Pub. No. US 20200166647 A1), hereinafter Crouch.
Regarding Claim 25 (New) Nelson teaches the microelectronics package system as claimed in claim 1, on which this claim is dependent,
Nelson fails to disclose:
wherein the PIC, EIC, and passive die are components of a LIDAR system.
However, Crouch teaches:
wherein the PIC, EIC, and passive die are components of a LIDAR system ( Crouch, [0002], Optical detection of range using lasers, often referenced by a mnemonic, LIDAR, for light detection and ranging, also sometimes called laser RADAR (radio-wave detection and ranging), is used for a variety of applications, from altimetry, to imaging, to collision avoidance; [0004], Useful optical bandwidths have been achieved using wideband radio frequency (RF) electrical signals to modulate an optical carrier; [0005], Recent work by current inventors, show a novel arrangement of optical components and coherent processing to detect Doppler shifts in returned signals that provide not only improved range but also relative signed speed on a vector between the LIDAR system and each external object );
Nelson and Crouch are both considered to be analogous to the claimed invention because they are photodetection systems and electrical/optical packages. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Nelson ( light detection ), to incorporate the teachings of Crouch ( LIDAR system ), to implement the light detection and ranging (LIDAR). Doing so would provide the specific function ( i.e. light detection and ranging (LIDAR) ) by using the photodetection systems and packages, and therefore the specific application for autonomous vehicles can be implemented.
Regarding Claim 26 (New) Nelson teaches the microelectronics package system as claimed in claim 1, on which this claim is dependent,
Nelson fails to disclose:
further comprising an autonomous vehicle, wherein the PIC, EIC, and passive die are components of a navigation system of the autonomous vehicle.
However, Crouch teaches:
further comprising an autonomous vehicle, wherein the PIC, EIC, and passive die are components of a navigation system of the autonomous vehicle ( Nelson, [0006], This information is expected to be of value in control systems for autonomous vehicles, such as self-driving, or driver-assisted, automobiles; [0048], In other embodiments, the invention is described in the context of a single front mounted hi-res Doppler LIDAR system on a personal automobile ).
Nelson and Crouch are both considered to be analogous to the claimed invention because they are photodetection systems and electrical/optical packages. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Nelson ( light detection ), to incorporate the teachings of Crouch ( LIDAR system ), to implement the light detection and ranging (LIDAR), wherein the PIC, EIC, and passive die are components of a navigation system of the autonomous vehicle. Doing so would provide the specific function ( i.e. light detection and ranging (LIDAR) ) by using the photodetection systems and packages, and therefore the specific application for autonomous vehicles can be implemented.
Regarding Claim 37 (New) Nelson teaches the microelectronics package system as claimed in claim 27, on which this claim is dependent,
Nelson fails to disclose:
wherein the PIC, EIC, and passive die are components of a navigation system of a LIDAR system.
However, Crouch teaches:
wherein the PIC, EIC, and passive die are components of a navigation system of a LIDAR system ( Crouch, [0002], Optical detection of range using lasers, often referenced by a mnemonic, LIDAR, for light detection and ranging, also sometimes called laser RADAR (radio-wave detection and ranging), is used for a variety of applications, from altimetry, to imaging, to collision avoidance; [0004], Useful optical bandwidths have been achieved using wideband radio frequency (RF) electrical signals to modulate an optical carrier; [0005], Recent work by current inventors, show a novel arrangement of optical components and coherent processing to detect Doppler shifts in returned signals that provide not only improved range but also relative signed speed on a vector between the LIDAR system and each external object );
Nelson and Crouch are both considered to be analogous to the claimed invention because they are photodetection systems and electrical/optical packages. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Nelson ( light detection ), to incorporate the teachings of Crouch ( LIDAR system ), to implement the light detection and ranging (LIDAR). Doing so would provide the specific function ( i.e. light detection and ranging (LIDAR) ) by using the photodetection systems and packages, and therefore the specific application for autonomous vehicles can be implemented.
Regarding Claim 38 (New) Nelson teaches the microelectronics package system as claimed in claim 27, on which this claim is dependent,
Nelson fails to disclose:
further comprising an autonomous vehicle, wherein the PIC, EIC, and passive die are components of a navigation system of the autonomous vehicle.
However, Crouch teaches:
further comprising an autonomous vehicle, wherein the PIC, EIC, and passive die are components of a navigation system of the autonomous vehicle ( Nelson, [0006], This information is expected to be of value in control systems for autonomous vehicles, such as self-driving, or driver-assisted, automobiles; [0048], In other embodiments, the invention is described in the context of a single front mounted hi-res Doppler LIDAR system on a personal automobile ).
Nelson and Crouch are both considered to be analogous to the claimed invention because they are photodetection systems and electrical/optical packages. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Nelson ( light detection ), to incorporate the teachings of Crouch ( LIDAR system ), to implement the light detection and ranging (LIDAR), wherein the PIC, EIC, and passive die are components of a navigation system of the autonomous vehicle. Doing so would provide the specific function ( i.e. light detection and ranging (LIDAR) ) by using the photodetection systems and packages, and therefore the specific application for autonomous vehicles can be implemented.
Response to Arguments
Applicant's arguments filed 9/30/2025 have been fully considered but they are not persuasive.
Applicant's remarks regarding Claim 1 ( Currently Amended ): page 6, line 15, cited “ However, Nelson fails to disclose or render obvious a passive die attached by interconnects to the same surface as the EIC. Instead, the EIC is adjacent to a mechanical support and fiber groove. (Nelson, FIG. 5). Therefore, claim 1 as amended is patentable over Nelson ”.
Examiners’ response: please refer to claim 1 in Claim Rejections - 35 USC § 112 of this office action, cited “ Regarding claim 1 ( Currently Amended ), cited “ a passive die comprising silicon, the passive die attached to the surface of the EIC by second interconnects therebetween, wherein the second interconnects comprise second conductive pillars ”, which is not disclosed in the original specification; therefore, this limitation is new matter. … For the purpose of examination, above limitation is viewed as the one shown in the original specification, [0019], cited “ In addition, additional passive silicon dies may be flip chipped on some or all power dissipating locations of the PIC, thus providing a low cost heat dissipation path through the top of the TIA and passive die as needed ” ”.
Applicant's remarks regarding Claim 1 ( Currently Amended ): page 6, line 24, cited “ However, Crouch fails to disclose or render obvious a passive die coupled to PIC by interconnects having pillars ”.
Examiners’ response: please refer to claim 1 in Claim Rejections - 35 USC § 102 of this office action, cited “ a passive die ( Nelson, FIG. 5, 505; [0045], One or more optical engines may be used to provide optical interfaces to a digital integrated circuit 505 (e.g., a switch ASIC) as shown in FIG. 5. An ASIC heat sink 510 conducts heat away from the digital integrated circuit 505 (e.g., to a heat-pipe-based cooling system) ) comprising silicon, the passive die attached to the surface of the EIC ( Nelson, FIG. 5, 540. [0045], A second beachfront 540 may be used to accommodate another optical engine (not shown), or, for example, an edge connector for making serial electrical connections to the digital integrated circuit 505. Ps. As explained in Claim Rejections - 35 USC § 112 of this office action, “EIC” here is viewed as “some or all power dissipating locations of the PIC” ) by second interconnects ( Nelson, FIG. 5, short electrical connections between 505 and 540 ) therebetween, wherein the second interconnects ( Nelson, [0046], In some embodiments, digital integrated circuit 505 has a plurality of electrical serial transmitter and receivers, and the package provides direct electrical connections (e.g., at the second beachfront 540) to a first plurality of the electrical serial transmitter and receivers of the digital integrated circuit 505 ) comprise second conductive pillars ( Nelson, [0036], In some embodiments, the length may be nearly as small as the height of the metal bumps 140 (e.g., copper pillar bumps, discussed in further detail below ) ”.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Da-Wei Lee whose telephone number is 703-756-1792. The examiner can normally be reached Monday thru Friday E.T..
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached on 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/DA WEI LEE/Examiner, Art Unit 2817
/MARLON T FLETCHER/Supervisory Primary Examiner, Art Unit 2817