Prosecution Insights
Last updated: July 17, 2026
Application No. 17/559,493

WRAP-AROUND LABEL FOR SSD

Final Rejection §103
Filed
Dec 22, 2021
Examiner
SEHAR, FAKEHA
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
SK hynix Inc.
OA Round
4 (Final)
83%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
82 granted / 99 resolved
+14.8% vs TC avg
Strong +19% interview lift
Without
With
+18.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
28 currently pending
Career history
138
Total Applications
across all art units

Statute-Specific Performance

§103
74.5%
+34.5% vs TC avg
§102
5.3%
-34.7% vs TC avg
§112
18.5%
-21.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 99 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment This Office Action is in response to Applicant’s Amendment filed on May 12, 2026. Claims 1 and 8 have been amended. No new claims have been added. No claims have been canceled. Claims 15-20 have been withdrawn. Currently, claims 1-14 are pending. Response to Arguments Applicant’s arguments with respect to claims 1and 8 have been considered as applied to the newly added claim limitations but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Lunsman et al. (US 10,667,431 B1; hereafter Lunsman) in view of Pax (US 2019/0348341 A1) and Wilson et al. (US 2023/0065622 A1; hereafter Wilson). Regarding claim 1, Lunsman teaches a solid state drive (see e.g., memory module 20 enclosed by a thermal interface device 10, Figures 1-4) comprising: a printed circuit board including a top surface positioned opposite from a back surface (see e.g., memory module 20 includes a board 21 including a top surface positioned opposite from a back surface, Column 8, Lines 5-10, Figures 1-4), the printed circuit board further including one or more memory chips disposed on the top surface (see e.g., memory chips 22 are disposed on the surface of the board 21, Column 8, Lines 5-10, Figures 1-4); and a thermal label, the thermal label being continuously wrapped around the printed circuit board (thermal interface device 10 includes an outer part 100 and an inner part 200. they both have a pair of side segments (outer side segments 110 or inner side segments 210) that face one another and are connected together by a top segment (outer top segment 120 or inner top segment 220), so as to have a roughly U-shaped cross-section (see FIGS. 2, 4, 6, and 9). When installed, the inner part 200 is nested within the outer part 100, with a memory module 20 located between the inner side segments 210L/R, Column 4, Lines 13-34, Figures 1-4). Lunsman does not explicitly teach “a thermal label comprising an adhesive backing layer, …. such that the adhesive backing layer on a first portion of the thermal label is adhered to the one or more memory chips disposed on the top surface of the printed circuit board and the adhesive backing layer on a second portion of the thermal label is adhered to the back surface of the printed circuit board”. In a similar field of endeavor Pax teaches a thermal label comprising an adhesive backing layer, …. such that the adhesive backing layer on a first portion of the thermal label is adhered to the one or more memory chips disposed on the top surface of the printed circuit board and the adhesive backing layer on a second portion of the thermal label is adhered to the back surface of the printed circuit board (see e.g., the heat spreader 410 is coupled to the memories 104a and 104b and wraps around the upper edge 105b of the substrate 102. More particularly, (i) the first portion 420 of the heat spreader 410 is generally planar and coupled to the first memories 104a on the front side 103a of the substrate 102 via an adhesive 516, (ii) the second portion 422 of the heat spreader 410 is generally planar and coupled to the second memories 104b on the second side 103b of the substrate 102 via the adhesive 516, and (iii) the third portion 424 of the heat spreader 410 is generally curved and extends around the upper edge 105b of the substrate 102, Para [0033], Figure 5C). Therefore, it would have been obvious to one skilled in the art at the time the invention was effectively filed to implement Pax’s teachings of a thermal label comprising an adhesive backing layer, …. such that the adhesive backing layer on a first portion of the thermal label is adhered to the one or more memory chips disposed on the top surface of the printed circuit board and the adhesive backing layer on a second portion of the thermal label is adhered to the back surface of the printed circuit board in the device of Lunsman in order to avoid peeling or weakening of the thermal coupling between the heat spreader and the memory devices on the circuit board. Lunsman does not explicitly teach “the adhesive backing layer on a second portion of the thermal label is adhered directly to the back surface of the printed circuit board”. In a similar field of endeavor Wilson teaches the adhesive backing layer on a second portion of the thermal label is adhered directly to the back surface of the printed circuit board (see e.g., the PCB having a thermally conductive label wrapped around a PCB to provide heat dissipation. The PCB may include memory components disposed on only one surface of the PCB such as the top surface or alternatively on both sides of the PCB thereby recognizing that both single-sided or double-sided memory component arrangements were known in the art. For a single-sided memory component arrangement, the thermally conductive label includes a first thermal conduction layer 112A positioned over the memory components 114A, 114B, 114C disposed on the top surface of the PCB 116 by a first adhesive layer and a second thermal conduction layer 112B positioned over the opposite side of the PCB 116 by a second adhesive layer, Pars [0015], [0016], [0017], Figures 1 and 2). Therefore, it would have been obvious to one skilled in the art at the time the invention was effectively field to implement Wilson’s teachings of the adhesive backing layer on a second portion of the thermal label is adhered directly to the back surface of the printed circuit board to provide improved thermal conductivity. Regarding claim 7, Lunsman, as modified by Pax and Wilson, teaches the limitations of claim 1 as mentioned above. Lunsman further teaches wherein the printed circuit board is sized to accommodate application of the thermal label to the top surface and the back surface of the printed circuit board while maintaining an overall side thickness of the solid state drive consistent with a first form factor (see e.g., the outer part 100 may be formed from a single piece of sheet metal that is worked (e.g., bent, cut, stamped, etc.) to form the two side segments 110 connected by the top segment 120. The planar portions of the outer segments 110 maybe between 0.1mm and 0.5mm thick. The inner part 200 may be formed from a single piece of sheet metal that is worked (e.g., bent, cut, stamped, etc.) to form the two side segments 210 connected by the top segment 220. In some examples, the inner side segments 210 may be between 0.05 mm and 0.50 mm thick, Column 6, Lines 14-25, Lines 60-67, column 7, Lines 1-2, Figures 1-4). Claims 2-4 are rejected under 35 U.S.C. 103 as being unpatentable over Lunsman et al. (US 10,667,431 B1; hereafter Lunsman) in view of in view of Pax (US 2019/0348341 A1) and Wilson et al. (US 2023/0065622 A1; hereafter Wilson) and further in view of Chen et al. (CN 203554777U; hereafter Chen). Regarding claim 2, Lunsman, as modified by Pax and Wilson, teaches the limitations of claim 1 as mentioned above. Lunsman does not explicitly teach “wherein the printed circuit board further comprises: a side surface extending perpendicular to the top surface and the back surface; and a transitional edge extending from the side surface to the back surface”. In a similar field of endeavor Chen teaches wherein the printed circuit board further comprises: a side surface extending perpendicular to the top surface and the back surface (see e.g., the circuit board 1 has a side surface extending perpendicular to the top and back surface as shown in modified Figure 14); and a transitional edge extending from the side surface to the back surface (see e.g., the circuit board 1 has a transitional edge extending from the side surface to the back surface as shown in modified Figure 4). PNG media_image1.png 302 604 media_image1.png Greyscale Modified Figure 4, Chen Therefore, it would have been obvious to one skilled in the art at the time the invention was effectively filed to implement Chen’s teachings of wherein the printed circuit board further comprises: a side surface extending perpendicular to the top surface and the back surface; and a transitional edge extending from the side surface to the back surface in the device of Lunsman in order to reduce the charge density at the edge of the circuit board and avoid generating metal plating layer which is thickened at the edge of the circuit board. Regarding claim 3, Lunsman, as modified by Pax, Wilson and Chen, teaches the limitations of claim 2 as mentioned above. Lunsman does not explicitly teach “wherein the transitional edge is a chamfered edge”. In a similar field of endeavor Chen teaches wherein the transitional edge is a chamfered edge (see e.g., the transitional edge is chamfered as shown in modified Figure 4, Para [0009]). Therefore, it would have been obvious to one skilled in the art at the time the invention was effectively filed to implement Chen’s teachings of wherein the transitional edge is a chamfered edge in the device of Lunsman in order to reduce the charge density at the edge of the circuit board and avoid generating metal plating layer which is thickened at the edge of the circuit board. Regarding claim 4, Lunsman, as modified by Pax, Wilson and Chen, teaches the limitations of claim 3 as mentioned above. Lunsman does not explicitly teach “wherein the printed circuit board further comprises: a second transitional edge extending from the side surface to the top surface”. In a similar field of endeavor Chen teaches wherein the printed circuit board further comprises: a second transitional edge extending from the side surface to the top surface (see e.g., the circuit board 1 has a second transitional edge extending from the side surface to the top surface as shown in modified Figure 4) Therefore, it would have been obvious to one skilled in the art at the time the invention was effectively filed to implement Chen’s teachings of a second transitional edge extending from the side surface to the top surface in the device of Lunsman in order to reduce the charge density at the edge of the circuit board and avoid generating metal plating layer which is thickened at the edge of the circuit board. Claims 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Lunsman et al. (US 10,667,431 B1; hereafter Lunsman) in view of in view of Pax (US 2019/0348341 A1) and Wilson et al. (US 2023/0065622 A1; hereafter Wilson) and further in view of Gao et al. (US 2020/0260602 A1; hereafter Gao). Regarding claim 5, Lunsman, as modified by Pax and Wilson, teaches the limitations of claim 1 as mentioned above. Lunsman does not explicitly teach “wherein the solid state drive comprises a form factor that does not exceed thirty millimeters”. In a similar field of endeavor Gao teaches (see e.g., SSD device 102 has a form factor heights varying from 5mm to 15mm, Para [0019]). Therefore, it would have been obvious to one skilled in the art at the time the invention was effectively filed to implement Gao’s teachings wherein the solid state drive comprises a form factor that does not exceed thirty millimeters in the device of Lunsman as a small form factor allows manufacturers to build smaller, thinner and lighter electronic devices. Regarding claim 6, Lunsman, as modified by Pax and Wilson, teaches the limitations of claim 1 as mentioned above. Lunsman does not explicitly teach “further comprising: a housing including a plurality of sides surrounding an interior region, and wherein the printed circuit board is located within the interior region of the housing”. In a similar field of endeavor Gao teaches a housing including a plurality of sides surrounding an interior region (see e.g., the SSD device 102 includes a cage 104. The cage 104 has a generally rectangular configuration and includes a first (e.g., top) cage wall or plate 106 and a second (e.g., bottom) cage wall or plate 108, where the cage plates are separated from each other by a suitable distance to define a gap between the plates. The gap between the plates 106, 108 provides a partial enclosure or housing for integrated circuit components of the SSD device 102 that are provided on one or more PCBs 120, Para [0019], Figures 3-5), and wherein the printed circuit board is located within the interior region of the housing (see e.g., the PCB 120 is located within the interior region of the cage 104, Figures 3-5). Therefore, it would have been obvious to one skilled in the art at the time the invention was effectively filed to implement Gao’s teachings of a housing including a plurality of sides surrounding an interior region, and wherein the printed circuit board is located within the interior region of the housing in the device of Lunsman in order to protect the sensitive internal components, managing heat and providing standardized form factor for physical installation. Claims 8 and 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over Lunsman et al. (US 10,667,431 B1; hereafter Lunsman) in view of in view of Gao et al. (US 2020/0260602 A1; hereafter Gao), Pax (US 2019/0348341 A1) and Wilson et al. (US 2023/0065622 A1; hereafter Wilson). Regarding claim 8, Lunsman teaches a system comprising: the solid state drive (see e.g., memory module 20 enclosed by a thermal interface device 10, Figures 1-4) comprising: a printed circuit board including a top surface positioned opposite from a back surface (see e.g., memory module 20 includes a board 21 including a top surface positioned opposite from a back surface, Column 8, Lines 5-10, Figures 1-4), the printed circuit board further including one or more memory chips disposed on the top surface (see e.g., memory chips 22 are disposed on the surface of the board 21, Column 8, Lines 5-10, Figures 1-4); and a thermal, the thermal label continuously wrapped around the printed circuit board (thermal interface device 10 includes an outer part 100 and an inner part 200. they both have a pair of side segments (outer side segments 110 or inner side segments 210) that face one another and are connected together by a top segment (outer top segment 120 or inner top segment 220), so as to have a roughly U-shaped cross-section (see FIGS. 2, 4, 6, and 9). When installed, the inner part 200 is nested within the outer part 100, with a memory module 20 located between the inner side segments 210L/R, Column 4, Lines 13-34, Figures 1-4). Lunsman does not explicitly teach a processor; and a solid state drive coupled to the processor, In a similar field of endeavor Gao teaches a processor; and (see e.g., server 40 which includes a controller/processor to control server operations, Para [0016], Figure 2) a solid state drive coupled to the processor (see e.g., the server 40 has one or more host interface connectors or ports to facilitate connection with external components such as the SSD device 2, Para [0016], Figures 2-5), Therefore, it would have been obvious to one skilled in the art at the time the invention was effectively filed to implement Gao’s teachings of a processor; and a solid state drive coupled to the processor in the device of Lunsman in order to control read/write operations to the memory chips. Lunsman does not explicitly teach “a thermal label comprising an adhesive backing layer, …. such that the adhesive backing layer on a first portion of the thermal label is adhered to the one or more memory chips disposed on the top surface of the printed circuit board and the adhesive backing layer on a second portion of the thermal label is adhered to the back surface of the printed circuit board”. In a similar field of endeavor Pax teaches a thermal label comprising an adhesive backing layer, …. such that the adhesive backing layer on a first portion of the thermal label is adhered to the one or more memory chips disposed on the top surface of the printed circuit board and the adhesive backing layer on a second portion of the thermal label is adhered to the back surface of the printed circuit board (see e.g., the heat spreader 410 is coupled to the memories 104a and 104b and wraps around the upper edge 105b of the substrate 102. More particularly, (i) the first portion 420 of the heat spreader 410 is generally planar and coupled to the first memories 104a on the front side 103a of the substrate 102 via an adhesive 516, (ii) the second portion 422 of the heat spreader 410 is generally planar and coupled to the second memories 104b on the second side 103b of the substrate 102 via the adhesive 516, and (iii) the third portion 424 of the heat spreader 410 is generally curved and extends around the upper edge 105b of the substrate 102, Para [0033], Figure 5C). Therefore, it would have been obvious to one skilled in the art at the time the invention was effectively filed to implement Pax’s teachings of a thermal label comprising an adhesive backing layer, …. such that the adhesive backing layer on a first portion of the thermal label is adhered to the one or more memory chips disposed on the top surface of the printed circuit board and the adhesive backing layer on a second portion of the thermal label is adhered to the back surface of the printed circuit board in the device of Lunsman in order to avoid peeling or weakening of the thermal coupling between the heat spreader and the memory devices on the circuit board. Lunsman does not explicitly teach “the adhesive backing layer on a second portion of the thermal label is adhered directly to the back surface of the printed circuit board”. In a similar field of endeavor Wilson teaches the adhesive backing layer on a second portion of the thermal label is adhered directly to the back surface of the printed circuit board (see e.g., the PCB having a thermally conductive label wrapped around a PCB to provide heat dissipation. The PCB may include memory components disposed on only one surface of the PCB such as the top surface or alternatively on both sides of the PCB thereby recognizing that both single-sided or double-sided memory component arrangements were known in the art. For a single-sided memory component arrangement, the thermally conductive label includes a first thermal conduction layer 112A positioned over the memory components 114A, 114B, 114C disposed on the top surface of the PCB 116 by a first adhesive layer and a second thermal conduction layer 112B positioned over the opposite side of the PCB 116 by a second adhesive layer, Pars [0015], [0016], [0017], Figures 1 and 2). Therefore, it would have been obvious to one skilled in the art at the time the invention was effectively field to implement Wilson’s teachings of the adhesive backing layer on a second portion of the thermal label is adhered directly to the back surface of the printed circuit board to provide improved thermal conductivity. Regarding claim 12, Lunsman, as modified by Gao, Pax and Wilson, teaches the limitations of claim 8 as mentioned above. Lunsman does not explicitly teach “wherein the solid state drive comprises a form factor that does not exceed thirty millimeters”. In a similar field of endeavor Gao teaches (see e.g., SSD device 102 has a form factor heights varying from 5mm to 15mm, Para [0019]). Therefore, it would have been obvious to one skilled in the art at the time the invention was effectively filed to implement Gao’s teachings wherein the solid state drive comprises a form factor that does not exceed thirty millimeters in the device of Lunsman as a small form factor allows manufacturers to build smaller, thinner and lighter electronic devices. Regarding claim 13, Lunsman, as modified by Gao, Pax and Wilson, teaches the limitations of claim 8 as mentioned above. Lunsman does not explicitly teach “further comprising: a housing including a plurality of sides surrounding an interior region, and wherein the printed circuit board is located within the interior region of the housing”. In a similar field of endeavor Gao teaches a housing including a plurality of sides surrounding an interior region (see e.g., the SSD device 102 includes a cage 104. The cage 104 has a generally rectangular configuration and includes a first (e.g., top) cage wall or plate 106 and a second (e.g., bottom) cage wall or plate 108, where the cage plates are separated from each other by a suitable distance to define a gap between the plates. The gap between the plates 106, 108 provides a partial enclosure or housing for integrated circuit components of the SSD device 102 that are provided on one or more PCBs 120, Para [0019], Figures 3-5), and wherein the printed circuit board is located within the interior region of the housing (see e.g., the PCB 120 is located within the interior region of the cage 104, Figures 3-5). Therefore, it would have been obvious to one skilled in the art at the time the invention was effectively filed to implement Gao’s teachings of a housing including a plurality of sides surrounding an interior region, and wherein the printed circuit board is located within the interior region of the housing in the device of Lunsman in order to protect the sensitive internal components, managing heat and providing standardized form factor for physical installation. Regarding claim 14, Lunsman, as modified by Gao, Pax and Wilson, teaches the limitations of claim 8 as mentioned above. Lunsman further teaches wherein the printed circuit board is sized to accommodate application of the thermal label to the top surface and the back surface of the printed circuit board while maintaining an overall side thickness of the solid state drive consistent with a first form factor (see e.g., the outer part 100 may be formed from a single piece of sheet metal that is worked (e.g., bent, cut, stamped, etc.) to form the two side segments 110 connected by the top segment 120. The planar portions of the outer segments 110 maybe between 0.1mm and 0.5mm thick. The inner part 200 may be formed from a single piece of sheet metal that is worked (e.g., bent, cut, stamped, etc.) to form the two side segments 210 connected by the top segment 220. In some examples, the inner side segments 210 may be between 0.05 mm and 0.50 mm thick, Column 6, Lines 14-25, Lines 60-67, column 7, Lines 1-2, Figures 1-4). Claims 9-11 are rejected under 35 U.S.C. 103 as being unpatentable over Lunsman et al. (US 10,667,431 B1; hereafter Lunsman) in view of in view of in view of Gao et al. (US 2020/0260602 A1; hereafter Gao), Pax (US 2019/0348341 A1) and Wilson et al. (US 2023/0065622 A1; hereafter Wilson) and further in view of Chen et al. (CN 203554777U; hereafter Chen). Regarding claim 9, Lunsman, as modified by Gao, Pax and Wilson, teaches the limitations of claim 8 as mentioned above. Lunsman does not explicitly teach “wherein the printed circuit board further comprises: a side surface extending perpendicular to the top surface and the back surface; and a transitional edge extending from the side surface to the back surface”. In a similar field of endeavor Chen teaches wherein the printed circuit board further comprises: a side surface extending perpendicular to the top surface and the back surface (see e.g., the circuit board 1 has a side surface extending perpendicular to the top and back surface as shown in modified Figure 14); and a transitional edge extending from the side surface to the back surface (see e.g., the circuit board 1 has a transitional edge extending from the side surface to the back surface as shown in modified Figure 4). Therefore, it would have been obvious to one skilled in the art at the time the invention was effectively filed to implement Chen’s teachings of wherein the printed circuit board further comprises: a side surface extending perpendicular to the top surface and the back surface; and a transitional edge extending from the side surface to the back surface in the device of Lunsman in order to reduce the charge density at the edge of the circuit board and avoid generating metal plating layer which is thickened at the edge of the circuit board. Regarding claim 10, Lunsman, as modified by Gao, Pax, Wilson and Chen, teaches the limitations of claim 9 as mentioned above. Lunsman does not explicitly teach “wherein the transitional edge is a chamfered edge”. In a similar field of endeavor Chen teaches wherein the transitional edge is a chamfered edge (see e.g., the transitional edge is chamfered as shown in modified Figure 4, Para [0009]). Therefore, it would have been obvious to one skilled in the art at the time the invention was effectively filed to implement Chen’s teachings of wherein the transitional edge is a chamfered edge in the device of Lunsman in order to reduce the charge density at the edge of the circuit board and avoid generating metal plating layer which is thickened at the edge of the circuit board. Regarding claim 11, Lunsman, as modified by Gao, Pax, Wilson and Chen, teaches the limitations of claim 10 as mentioned above. Lunsman does not explicitly teach “wherein the printed circuit board further comprises: a second transitional edge extending from the side surface to the top surface”. In a similar field of endeavor Chen teaches wherein the printed circuit board further comprises: a second transitional edge extending from the side surface to the top surface (see e.g., the circuit board 1 has a second transitional edge extending from the side surface to the top surface as shown in modified Figure 4) Therefore, it would have been obvious to one skilled in the art at the time the invention was effectively filed to implement Chen’s teachings of a second transitional edge extending from the side surface to the top surface in the device of Lunsman in order to reduce the charge density at the edge of the circuit board and avoid generating metal plating layer which is thickened at the edge of the circuit board. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to FAKEHA SEHAR whose telephone number is (571)272-4033. The examiner can normally be reached Monday-Thursday 7:00 am - 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara J. Green can be reached on (571) 270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FAKEHA SEHAR/Examiner, Art Unit 2893 /YARA B GREEN/Supervisor Patent Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Show 7 earlier events
Nov 10, 2025
Response after Non-Final Action
Dec 12, 2025
Request for Continued Examination
Dec 30, 2025
Response after Non-Final Action
Feb 12, 2026
Non-Final Rejection mailed — §103
Apr 30, 2026
Examiner Interview Summary
Apr 30, 2026
Applicant Interview (Telephonic)
May 12, 2026
Response Filed
Jun 11, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

5-6
Expected OA Rounds
83%
Grant Probability
99%
With Interview (+18.6%)
3y 1m (~0m remaining)
Median Time to Grant
High
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