Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-14, filed on 09/12/25, have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim #1-14, 27 are rejected under 35 U.S.C. 103 as being unpatentable over Jin et al., (U.S. Pat. No, 7,696,502), hereinafter referred to as "Jin" and in view of Miller et al., (U.S. Pat. No. 8,648,418), hereinafter referred to as "Miller".
Jin shows, with respect to claim #1, an integrated circuit (IC), comprising: a capacitor, comprising: a first electrode material layer (fig. #62, item 6207); a second electrode material layer (fig. #62, item 6203); and ban insulator material layer (fig. #62, item 6204, 6205, 6206) between the first electrode material layer and the second electrode material layer (column #61, line 25-41), wherein the insulator material layer comprises primarily oxygen (O) (column #5, line 53-58), a species A comprising one or more first rare-earths or metals, and a species B comprising one or more second rare-earths or metals (column #61, line 52-65, column #62, line 26-42), and wherein an atomic ratio of A:O is less than 1:3 and an atomic ratio B:O is also less than 1:3 (column #62, line 26-42); and one or more levels of interconnect metallization electrically coupled to the capacitor through the first or second electrode material layers (column #33, line 22-31).
Jin substantially shows the claimed invention as shown in the rejection of claim #1 above.
Jin fails to show, with respect to claim #1, an integrated circuit comprising the first electrode material layer and the second electrode material layer, wherein the insulator material layer is in direct contact with the first electrode material layer and comprises primarily oxygen (O), a species.
Miller teaches, with respect to claim #1, an integrated circuit comprising the first electrode material layer (fig. #3E, item 316) (column #9, line 58-65) and the second electrode material layer (fig. #3E, item 304) (column #5, line 51-62), wherein the insulator material layer (fig. #3E, item 306) (column #6, line 41-65) is in direct contact with the first electrode material layer and comprises primarily oxygen (O), a species (fig. #3E, item 304, 306 and 316) (column #13, line 57-60).
It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #1, to modified the invention of Jin as modified by the invention of Miller, which teaches, an integrated circuit comprising the first electrode material layer and the second electrode material layer, wherein the insulator material layer is in direct contact with the first electrode material layer and comprises primarily oxygen (O), a species, to incorporate a structural condition that would reduce leakage current, improve performance, and the ability to shrink transistors while maintaining or increasing capacitance, as taught by Miller.
Jin fails to show, with respect to claim #27, an integrated circuit wherein the insulator is in contact with the second electrode material.
Miller teaches, with respect to claim #27, an integrated circuit wherein the insulator (fig. #3E, item 306) (column #6, line 41-65) is in contact with the second electrode material (fig. #3E, item 304) (column #5, line 51-62).
It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #27, to modified the invention of Jin as modified by the invention of Miller, which teaches, an integrated circuit wherein the insulator is in contact with the second electrode material, to incorporate a structural condition that would reduce leakage current, improve performance, and the ability to shrink transistors while maintaining or increasing capacitance, as taught by Miller.
Jin shows, with respect to claim #2, an integrated circuit wherein the atomic ratio of A:O and the atomic ratio B:O are each larger than 1:4 (column #62, line 16-32).
Jin shows, with respect to claim #3, an integrated circuit wherein the atomic ratio of A:O is approximately equal to the atomic ratio B:O (column #62, line 16-32).
Jin shows, with respect to claim #4, an integrated circuit wherein the atomic ratio of A:O and the atomic ratio B:O are each substantially 2:7 (column #62, line 16-32).
Jin shows, with respect to claim #5, an integrated circuit wherein the insulator material layer (BaTiO3) has a relative permittivity of at least 50 (column #2, line 31-37).
Jin shows, with respect to claim #6, wherein the insulator material layer (BaTiO3) has a relative permittivity of at least 100 (column #2, line 31-37).
Jin shows, with respect to claim #7, wherein the insulator material layer is substantially amorphous (column #8, line 1-19, 45-48).
Jin shows, with respect to claim #8, wherein the insulator material layer comprises one or more crystalline phases (column #9, line 35-40; column #23, line 27-30).
Jin shows, with respect to claim #9, wherein the crystalline phases comprise a pyrochlore crystal structure (column #61, line 66-67, column #62, line 1-15).
Jin shows, with respect to claim #10, wherein A or B comprises Bi, Zn or Nb (column #61, line 66-67, column #62, line 1-15).
Jin shows, with respect to claim #11, wherein at least one of A or B comprises Mg, Cu, Ni, Sc, In or Ta (column #62, line 16-32).
Jin shows, with respect to claim #12, wherein both of A and B comprises Bi, Zn or Nb (column #62, line 16-32).
Jin shows, with respect to claim #13, wherein at least one of A or B comprises two of Bi, Zn or Nb (column #62, line 16-32).
Jin shows, with respect to claim #14, wherein A comprises Bi and wherein B comprises two or more of Ng, Cu, Zn, Sc, In, Nb, or Ta (column #62, line 16-32).
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Claim #24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jin et al., (U.S. Pat. No, 7,696,502), hereinafter referred to as "Jin" as modified by Miller et al., (U.S. Pat. No. 8,648,418), hereinafter referred to as "Miller" as shown in the rejection of claim #1 above and in further view of TAKAGI et al., (U.S. PUB. No. 2019/0269013), hereinafter referred to as "Takagi".
Jin as modified by Miller substantially shows the claimed invention as shown in the rejection of claim #1 above.
Jin as modified by Miller fails to show, with respect to claim #24, an integrated circuit wherein the first electrode comprises a seed layer comprising Ta or W, and wherein the first electrode further comprises a layer comprising Ti, Ru, or Ir between the seed layer and the insulator material layer.
Takagi teaches, with respect to claim #24, an integrated circuit (MIM; paragraph 0041) wherein the first electrode comprises a seed layer (fig. #17, item 102) (paragraph 0047) comprising Ta or W, and wherein the first electrode (fig. #17, item 110) (paragraph 0048) further comprises a layer comprising Ti, Ru, or Ir between the seed layer and the insulator material layer (fig. #17, item 111) (paragraph 0050)
It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #24, to modified the invention of Jin as modified by Miller, with the modifications of the invention of Takagi which teaches, wherein the first electrode comprises a seed layer comprising Ta or W, and wherein the first electrode further comprises a layer comprising Ti, Ru, or Ir between the seed layer and the insulator material layer, to incorporate a structural condition that would contribute the control of the capacitance of the device, as taught by Takagi.
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Claim #25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jin et al., (U.S. Pat. No, 7,696,502), hereinafter referred to as "Jin" as modified by Miller et al., (U.S. Pat. No. 8,648,418), hereinafter referred to as "Miller" as shown in the rejection of claim #1 above and in further view of KANG et al., (U.S. PUB. No. 2021/0142946), hereinafter referred to as "Kang".
Jin as modified by Miller substantially shows the claimed invention as shown in the rejection of claim #1 above.
Jin as modified by Miller fails to show, with respect to claim #25, an integrated circuit wherein the first electrode comprises more than 50 at. % carbon.
Kang teaches, with respect to claim #25, an integrated circuit wherein the first electrode (fig. #2a, item 102) comprises more than 50 at. % carbon (TaCN; Carbon (C); 6×12.01)/129.2×100 ≈ 55.8%) (fig. #2a, item 102) (paragraph 0054).
It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #25, to modified the invention of Jin as modified by Miller, with the modifications of the invention of Kang which teaches, an integrated circuit wherein the first electrode comprises more than 50 at. % carbon, to incorporate a structural condition that would contribute a lone pair of electrons on the nitrogen atom that can form a coordinate bond with the metal cation, as taught by Kang.
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Claim #26 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jin et al., (U.S. Pat. No, 7,696,502), hereinafter referred to as "Jin" as modified by Miller et al., (U.S. Pat. No. 8,648,418), hereinafter referred to as "Miller" and KANG et al., (U.S. PUB. No. 2021/0142946), hereinafter referred to as "Kang" as shown in the rejection of claim #25 above and in further view of SPANIER et al., (U.S. PUB. No. 2022/0013288), hereinafter referred to as "Spanier".
Jin as modified by Miller and Kang substantially shows the claimed invention as shown in the rejection of claim #25 above.
Jin as modified by Miller and Kang fails to show, with respect to claim #26, an integrated circuit wherein an uppermost surface of the first electrode comprises graphitic carbon and wherein the insulator is in direct contact with the graphitic carbon.
Spanier teaches, with respect to claim #26, an integrated circuit wherein an uppermost surface of the first electrode comprises graphitic carbon and wherein the insulator (fig. #3, item BTO) (paragraph 0097) is in direct contact with the graphitic carbon (fig. #3, item 102) (paragraph 0281, 0097).
It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #26, to modified the invention of Jin as modified by Miller and Kang, with the modifications of the invention of Spanier which teaches, an integrated circuit an integrated circuit wherein an uppermost surface of the first electrode comprises graphitic carbon and wherein the insulator is in direct contact with the graphitic carbon, to incorporate a structural condition that would exhibit a combination of high dielectric constant and low leakage that is superior to other high-k polycrystalline thin-film materials, as taught by Spanier.
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Claim #28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jin et al., (U.S. Pat. No, 7,696,502), hereinafter referred to as "Jin" as modified by Miller et al., (U.S. Pat. No. 8,648,418), hereinafter referred to as "Miller" as shown in the rejection of claim #27 above and in further view of SPANIER et al., (U.S. PUB. No. 2022/0013288), hereinafter referred to as "Spanier".
Jin as modified by Miller and Kang substantially shows the claimed invention as shown in the rejection of claim #27 above.
Jin as modified by Miller and Kang fails to show, with respect to claim #28, an integrated circuit wherein the second electrode material comprises a graphitic material layer in contact with the insulator material layer.
Spanier teaches, with respect to claim #28, an integrated circuit wherein the second electrode material (fig. #3, item Pt) (paragraph 0119, 0186) comprises a graphitic material layer in contact with the insulator material layer (fig. #3, item BTO) (paragraph 0097).
It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #28, to modified the invention of Jin as modified by Miller and Kang, with the modifications of the invention of Spanier which teaches, an integrated circuit an integrated circuit wherein an uppermost surface of the first electrode comprises graphitic carbon and wherein the insulator is in direct contact with the graphitic carbon, to incorporate a structural condition that would exhibit a combination of high dielectric constant and low leakage that is superior to other high-k polycrystalline thin-film materials, as taught by Spanier.
EXAMINATION NOTE
The rejections above rely on the references for all the teachings expressed in the text of the references and/or one of ordinary skill in the art would have reasonably understood or implied from the texts of the references. To emphasize certain aspects of the prior art, only specific portions of the texts have been pointed out. Each reference as a whole should be reviewed in responding to the rejection, since other sections of the same reference and/or various combinations of the cited references may be relied on in future rejections in view of amendments.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Andre’ Stevenson whose telephone number is (571) 272 1683 (Email Address, Andre.Stevenson@USPTO.GOV). The examiner can normally be reached on Monday through Friday from 7:30 am to 4:30 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached on 571-272 2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Andre’ Stevenson Sr./
Art Unit 2899
10/18/2025
/ZANDRA V SMITH/ Supervisory Patent Examiner, Art Unit 2899