DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Sakamoto et al. (US 2009/0107967, of record) and further in view of Muramatsu et al. (US 2009/0008373 A1, of record) and Tamura et al. (US 2007/0207594 A1, newly cited).
Re Claim 1, Sakamoto teaches a method of separating dies from a wafer (Figs. 17-21, and paras [0122] – [0132]), the method comprising:
applying laser pulses (irradiated with laser light L, Fig. 19b, para [0127], also see paras [0043] – [0044]) to a side in a plane of orthogonal first and second directions of the wafer (Fig. 17 shows a planar view of the wafer 1 with orthogonal first and second directions, and Fig. 19b shows that the laser light being irradiated along the thickness of the wafer) to create first (modified region 71, Fig. 19b, para [0128]) and second damage regions (modified region 72, Fig. 19b, para [0128]) at respective first (depth marked “D1” in annotated Fig. 19b, shown below) and second depths (depth marked “D2” in annotated Fig. 19b, shown below) in the wafer (1) and to create cracks that extend in the wafer from the first and second damage regions (fractures are generated from modified regions which act as a starting point, para [0092]) and that are spaced apart from one another along a third direction (71 and 72 are spaced apart by a distance equal to the difference of D1 and D2) that is orthogonal to the first and second directions (the difference “D1 - D2” is along the thickness which is orthogonal to the planar directions of the wafer 1);
applying a force to the wafer along the third direction (force exerted along the thickness direction by the knife edge 41, as it is pressed against the rear face 21 of the substrate 4, Fig. 20b, para [0130]) to propagate and join the cracks from the first and second damage regions together (the stress generated by the knife edge 41 open up fractures 24 which extend and joins the modified regions, whereby the wafer 1 is cut, para [0130]); and
expanding the wafer along the first and second directions to separate individual dies from the wafer (expandable tape 23 is attached to the rear face of the substrate, which expands the wafer in the planar direction to separate the individual semiconductor chips 25, Fig. 21, para [0131]. This process is done in two orthogonal directions as shown by the broken lines 5 (lines to cut) in Fig. 17 which are set like grids, see para [0127]).
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Sakamoto discloses that the laser enters through the front face (Fig. 19) where the device layer (15, Fig. 19, para [0124]) is formed and does not teach that the laser can also be applied through the rear face (opposite to the front face where the devices are formed).
Related art, Muramatsu teaches that the laser can be applied through either surfaces – front surface or rear surface (para [0106]), to create modified regions (7, Fig. 5, paras [0037] – [0038]) which act as a starting point for fractures and cracks. In one embodiment (Fig. 17), the laser (laser light L, Fig. 17, para [0096]) is applied in the front surface where the device layer (16, Fig. 17, para [0092]) is formed, similar to the disclosure of Sakamoto. However, Muramatsu also teaches, that the laser can also be applied through the rear surface to perform the same function (para [0106]), opposite to the surface containing the device layer. One of ordinary skill in the art would realize that there are only two possible laser entrances as taught by Muramatsu – either the laser is applied on the front surface where the device layer is present, or through the rear surface opposite to the surface containing the device layer, and both can perform the same function of creating damage regions and cracks which will later be used to separate the individual dies.
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to modify the method of Sakamoto, such that the laser is applied from the rear surface, opposite to the surface containing the device layer, as taught by Muramatsu. The substitution of a known process for its known purpose to yield predictable results is prima facie obvious. Also see KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Sakamoto discloses a carrier tape (expandable tape 23, Fig. 21), which is attached to the backside of the wafer (rear face 21, Fig. 21), and hence does not disclose that the carrier tape can be attached to the frontside of the wafer (front face 3, Fig. 21).
Related art, Tamura teaches that the expandable tape (32, paras [0067] – [0068], Figs. 7-10) can be formed either on the rear side of the wafer (backside 10a, Figs. 7-8, para [0062]), similar to device of Sakamoto, or it can be attached to the front side of the wafer (front side 10b, Figs. 9-10), which includes the devices (12, Figs. 9-10, para [0013]). From the teachings of Tamura, one of ordinary skill in the art would realize that the expandable tape can be attached on either side of the wafer.
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to modify the method of Sakamoto, such that the carrier tape is attached to the frontside of the wafer, as taught by Tamura. The substitution of a known process for its known purpose to yield predictable results is prima facie obvious. Also see KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Re Claim 7, Sakamoto modified by Muramatsu and Tamura teaches the method of Claim 1, wherein expanding the wafer comprises:
stretching the carrier tape along the first and second directions to separate individual dies from the wafer (Sakamoto’s expandable tape 23 expands the wafer in the planar direction to separate the individual semiconductor chips 25, Fig. 21, para [0131]. This process is done along two orthogonal directions as shown by the broken lines 5 (lines to cut) in Fig. 17 which are set like grids, see para [0127]).
Claims 2-3 are rejected under 35 U.S.C. 103 as being unpatentable over Sakamoto et al. (US 2009/0107967, of record), Muramatsu et al. (US 2009/0008373 A1, of record) and Tamura et al. (US 2007/0207594 A1, newly cited), and further in view of Herrick et al. (US 5,259,925, of record), Nakamura (US 2007/0128767, of record) and Hirata et al. (US 2018/0229331, of record).
Re Claim 2, Sakamoto modified by Muramatsu and Tamura teaches the method of claim 1, but does not teach that the force to the wafer comprises applying ultrasonic force to the wafer in a fluid bath.
Sakamoto is silent about the force being an ultrasonic force. Additionally, in the same semiconductor field of endeavor, Herrick teaches that the individual semiconductor devices can be irretrievable damaged by a cleaving process (Col. 2, lines 60-62).
However, in a related semiconductor art, Nakamura teaches that the wafer dividing step can be carried out using an ultrasonic apparatus 7 (Fig. 10, para [0052]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to modify the method of Sakamoto by incorporating the ultrasonic vibration as disclosed by Nakamura, because during the stress generated by the knife edge as disclosed in the method of Sakamoto, the cleaving process can irretrievably damage individual dies as disclosed by Herrick.
Furthermore, Sakamoto modified by Muramatsu, Tamura, Herrick and Nakamura is silent about the ultrasonic force being applied to the wafer in a fluid bath.
However, in the same semiconductor field of endeavor, Hirata teaches a wafer separation process (Fig. 6A, para [0036]) along the separation layer 22, using the ultrasonic vibrator 30 which applies the ultrasonic vibration to the wafer in a liquid bath 28.
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to modify the method of Sakamoto modified by Muramatsu, Tamura, Herrick and Nakamura by incorporating the ultrasonic apparatus as disclosed by Hirata, because ultrasonic waves propagate more efficiently in a denser medium like liquid compared to air.
Re Claim 3, Sakamoto modified by Muramatsu, Tamura, Herrick, Nakamura and Hirata teaches the method of Claim 2, wherein the ultrasonic force is applied at a frequency of 90 kHz or less (Nakamura discloses that the frequency of the ultrasonic oscillator is 28 kHz, para [0053]).
Claims 4-5 are rejected under 35 U.S.C. 103 as being unpatentable over Sakamoto et al. (US 2009/0107967, of record), Muramatsu et al. (US 2009/0008373 A1, of record) and Tamura et al. (US 2007/0207594 A1, newly cited), and further in view of Herrick et al. (US 5,259,925, of record), Nakamura (US 2007/0128767, of record) and Donofrio et al. (US 2020/0316724, of record).
Re Claim 4, Sakamoto modified by Muramatsu and Tamura teaches the method of claim 1, but does not disclose that applying the force to the wafer comprises applying ultrasonic force directly to a wafer chuck table that supports the wafer.
Sakamoto is silent about the force being an ultrasonic force. Additionally, in the same semiconductor field of endeavor, Herrick teaches that the individual semiconductor devices can be irretrievable damaged by a cleaving process (Col. 2, lines 60-62).
However, in a related semiconductor art, Nakamura teaches that the wafer dividing step can be carried out using an ultrasonic apparatus 7 (Fig. 10, para [0052]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to modify the method of Sakamoto by incorporating the ultrasonic vibration as disclosed by Nakamura, because during the stress generated by the knife edge as disclosed in the method of Sakamoto, the cleaving process can irretrievably damage individual dies as disclosed by Herrick.
Furthermore, Sakamoto modified by Muramatsu, Tamura, Herrick and Nakamura is silent about the ultrasonic force being directly applied to a wafer chuck table that supports the wafer.
However, in the same semiconductor field of endeavor, Donofrio teaches a method for effectuating fracture (Fig. 35, para [0265]) along a laser-induced subsurface damage zone (196A) of a crystalline material (190A) bonded to a carrier (202A+222, para [0265], which is equivalent to a wafer chuck) by applying ultrasonic energy (ultrasonic generator 224) to the crystalline material while in the bonded state (para [0265]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to modify the method of Sakamoto modified by Muramatsu, Tamura, Herrick and Nakamura, by incorporating the ultrasonic apparatus as disclosed by Donofrio, because ultrasonic waves propagate more efficiently in a denser medium like solid/liquid compared to air.
Re Claim 5, Sakamoto modified by Muramatsu, Tamura, Herrick, Nakamura and Donofrio teaches the method of claim 4, wherein the wafer chuck table (rigid carrier 202A, Donofrio) supports the wafer (wafer 1, Sakamoto) via the carrier tape (adhesive material 198A of Donofrio, similar to expandable tape 23 of Sakamoto).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Sakamoto et al. (US 2009/0107967, of record), Muramatsu et al. (US 2009/0008373 A1, of record) and Tamura et al. (US 2007/0207594 A1, newly cited), and further in view of Fukuyo et al. (US 2004/0002199, of record).
Re Claim 6, Sakamoto modified by Muramatsu and Tamura teaches the method of claim 1, wherein applying the laser pulses (L, Fig. 19b, Sakamoto) comprises:
setting a laser focus to focus a laser beam at a target depth (Sakamoto’s Fig. 2 shows the laser processing method which focusses the laser at a converging point P at a certain depth within the embodiment 1, also see para [0044]);
setting a laser power to create a damage region at the target depth in the wafer (the intensity of laser light is determined by the peak power density which creates a modified region 7 at the converging point P, see paras [0043] – [0044], Sakamoto) and to create cracks that extend in the wafer from the damage region (Sakamoto’s Fig. 19b shows modified regions 72 and fractures 24 extending from them); and
move the laser beam on the backside of the wafer along a separation path (Sakamoto’s Figs. 1 and 5 show that the laser light is relatively moved along the direction of A, to form a row of modified regions 7, see paras [0045] - [0048]. The laser can be applied from the rear side as explained in the rejection of claim 1 above).
Sakamoto modified by Muramatsu and Tamura does not explicitly mention a position controller for the laser.
However, in the same semiconductor field of endeavor, Fukuyo teaches that the laser processing system 100 has an overall controller 127 which controls the stage controller 115 (Fig. 14, also see paras [0280] and [0286]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to incorporate the stage controller of Fukuyo into the laser processing system of Sakamoto modified by Muramatsu for precise control of the positioning of the wafer during the cutting process and to enable process automation.
Claim 31 is rejected under 35 U.S.C. 103 as being unpatentable over Sakamoto et al. (US 2009/0107967, of record), Muramatsu et al. (US 2009/0008373 A1, of record) and Tamura et al. (US 2007/0207594 A1, newly cited), and further in view of Chou et al. (US 2019/0355652 A1, of record).
Re Claim 31, Sakamoto modified by Muramatsu and Tamura teaches the method of claim 1, but does not disclose that one of the individual dies is attached to a die attach pad or a package substrate and enclosed in a package structure.
However, in the same semiconductor field of endeavor, Chou teaches the following features (Fig. 1, para [0021]):
attaching one of the individual dies (die 108) to a die attach pad (die pad 106) or package substrate (package 100) and enclosed in a package structure (mold compound 102).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to incorporate the features disclosed by Chou in to the method of Sakamoto in order to have a fully functional semiconductor package that can be readily installed in an electronic device.
Claims 8 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Sakamoto et al. (US 2009/0107967, of record) and further in view of Muramatsu et al. (US 2009/0008373 A1, of record), Tamura et al. (US 2007/0207594 A1, newly cited) and Chou et al. (US 2019/0355652, of record).
Re Claim 8, Sakamoto teaches a method of fabricating an electronic device, the method (Figs. 17-21, and paras [0122] – [0132]) comprising:
applying laser pulses (irradiated with laser light L, Fig. 19b, para [0127], also see paras [0043] – [0044]) to a side in a plane of orthogonal first and second directions of a wafer (Fig. 17 shows a planar view of the wafer 1 with orthogonal first and second directions, and Fig. 19b shows that the laser light being irradiated along the thickness of the wafer) to create first (modified region 71, Fig. 19b, para [0128]) and second damage regions (modified region 72, Fig. 19b, para [0128]) at respective first (depth marked “D1” in annotated Fig. 19b, shown above) and second depths (depth marked “D2” in annotated Fig. 19b, shown above) in the wafer (1) and to create cracks that extend in the wafer from the first and second damage regions (fractures are generated from modified regions which act as a starting point, para [0092]) and that are spaced apart from one another along a third direction (71 and 72 are spaced apart by a distance equal to the difference of D1 and D2) that is orthogonal to the first and second directions (the difference “D1 - D2” is along the thickness which is orthogonal to the planar directions of the wafer 1);
applying a force to the wafer along the third direction (force exerted along the thickness direction by the knife edge 41, as it is pressed against the rear face 21 of the substrate 4, Fig. 20b, para [0130]) to propagate and join the cracks from the first and second damage regions together (the stress generated by the knife edge 41 open up fractures 24 which extend and joins the modified regions, whereby the wafer 1 is cut, para [0130]);
expanding the wafer along the first and second directions to separate individual dies from the wafer (expandable tape 23 is attached to the rear face of the substrate, which expands the wafer in the planar direction to separate the individual semiconductor chips 25, Fig. 21, para [0131]. This process is done in two orthogonal directions as shown by the broken lines 5 (lines to cut) in Fig. 17 which are set like grids, see para [0127]);
Sakamoto discloses that the laser enters through the front face (Fig. 19) where the device layer (15, Fig. 19, para [0124]) is formed and does not teach that the laser can also be applied through the rear face (opposite to the front face where the devices and circuits are formed).
Related art, Muramatsu teaches that the laser can be applied through either surfaces – front surface or rear surface (para [0106]), to create modified regions (7, Fig. 5, paras [0037] – [0038]) which act as a starting point for fractures and cracks. In one embodiment (Fig. 17), the laser (laser light L, Fig. 17, para [0096]) is applied in the front surface where the device layer (16, Fig. 17, para [0092]) is formed, similar to the disclosure of Sakamoto. However, Muramatsu also teaches, that the laser can also be applied through the rear surface to perform the same function (para [0106]), opposite to the surface containing the device layer. One of ordinary skill in the art would realize that there are only two possible laser entrances as taught by Muramatsu – either the laser is applied on the front surface where the device layer is present, or through the rear surface opposite to the surface containing the device layer, and both can perform the same function of creating damage regions and cracks which will later be used to separate the individual dies.
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to modify the method of Sakamoto, such that the laser is applied from the rear surface, opposite to the surface containing the device layer, as taught by Muramatsu. The substitution of a known process for its known purpose to yield predictable results is prima facie obvious. Also see KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Sakamoto discloses a carrier tape (expandable tape 23, Fig. 21), which is attached to the backside of the wafer (rear face 21, Fig. 21), and hence does not disclose that the carrier tape can be attached to the frontside of the wafer (front face 3, Fig. 21).
Related art, Tamura teaches that the expandable tape (32, paras [0067] – [0068], Figs. 7-10) can be formed either on the rear side of the wafer (backside 10a, Figs. 7-8, para [0062]), similar to device of Sakamoto, or it can be attached to the front side of the wafer (front side 10b, Figs. 9-10), which includes the devices (12, Figs. 9-10, para [0013]). From the teachings of Tamura, one of ordinary skill in the art would realize that the expandable tape can be attached on either side of the wafer.
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to modify the method of Sakamoto, such that the carrier tape is attached to the frontside of the wafer, as taught by Tamura. The substitution of a known process for its known purpose to yield predictable results is prima facie obvious. Also see KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Sakamoto is also silent about the about the following features:
attaching one of the individual dies to a die attach pad or package substrate; and
enclosing the one of the individual dies in a package structure.
However, in the same semiconductor field of endeavor, Chou teaches the following features (Fig. 1, para [0021]):
attaching one of the individual dies (die 108) to a die attach pad (die pad 106) or package substrate (package 100); and
enclosing the one of the individual dies (108) in a package structure (mold compound 102).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to incorporate the features disclosed by Chou in to the method of Sakamoto in order to have a fully functional semiconductor package that can be readily installed in an electronic device.
Re Claim 14, Sakamoto modified by Muramatsu, Tamura and Chou teaches the method of Claim 8, wherein expanding the wafer comprises:
stretching the carrier tape along the first and second directions to separate individual dies from the wafer (Sakamoto’s expandable tape 23 expands the wafer in the planar direction to separate the individual semiconductor chips 25, Fig. 21, para [0131]. This process is done along two orthogonal directions as shown by the broken lines 5 (lines to cut) in Fig. 17 which are set like grids, see para [0127]).
Claims 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Sakamoto et al. (US 2009/0107967, of record), Muramatsu et al. (US 2009/0008373 A1, of record), Tamura et al. (US 2007/0207594 A1, newly cited) and Chou et al. (US 2019/0355652, of record), and further in view of Herrick et al. (US 5,259,925, of record), Nakamura (US 2007/0128767, of record) and Hirata et al. (US 2018/0229331, of record).
Re Claim 9, Sakamoto modified by Muramatsu, Tamura and Chou teaches the method of claim 8, but does not teach that the force to the wafer comprises applying ultrasonic force to the wafer in a fluid bath.
Sakamoto is silent about the force being an ultrasonic force. Additionally, in the same semiconductor field of endeavor, Herrick teaches that the individual semiconductor devices can be irretrievable damaged by a cleaving process (Col. 2, lines 60-62).
However, in a related semiconductor art, Nakamura teaches that the wafer dividing step can be carried out using an ultrasonic apparatus 7 (Fig. 10, para [0052]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to modify the method of Sakamoto by incorporating the ultrasonic vibration as disclosed by Nakamura, because during the stress generated by the knife edge as disclosed in the method of Sakamoto, the cleaving process can irretrievably damage individual dies as disclosed by Herrick.
Furthermore, Sakamoto modified by Muramatsu, Tamura, Chou, Herrick and Nakamura is silent about the ultrasonic force being applied to the wafer in a fluid bath.
However, in the same semiconductor field of endeavor, Hirata teaches a wafer separation process (Fig. 6A, para [0036]) along the separation layer 22, using the ultrasonic vibrator 30 which applies the ultrasonic vibration to the wafer in a liquid bath 28.
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to modify the method of Sakamoto modified by Muramatsu, Tamura, Chou, Herrick and Nakamura by incorporating the ultrasonic apparatus as disclosed by Hirata, because ultrasonic waves propagate more efficiently in a denser medium like liquid compared to air.
Re Claim 10, Sakamoto modified by Muramatsu, Tamura, Chou, Herrick, Nakamura and Hirata teaches the method of Claim 9, wherein the ultrasonic force is applied at a frequency of 90 kHz or less (Nakamura discloses that the frequency of the ultrasonic oscillator is 28 kHz, para [0053]).
Claims 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Sakamoto et al. (US 2009/0107967, of record), Muramatsu et al. (US 2009/0008373 A1, of record), Tamura et al. (US 2007/0207594 A1, newly cited) and Chou et al. (US 2019/0355652, of record), and further in view of Herrick et al. (US 5,259,925, of record), Nakamura (US 2007/0128767, of record) and Donofrio et al. (US 2020/0316724, of record).
Re Claim 11, Sakamoto modified by Muramatsu, Tamura and Chou teaches the method of claim 8, but does not disclose that applying the force to the wafer comprises applying ultrasonic force directly to a wafer chuck table that supports the wafer.
Sakamoto is silent about the force being an ultrasonic force. Additionally, in the same semiconductor field of endeavor, Herrick teaches that the individual semiconductor devices can be irretrievable damaged by a cleaving process (Col. 2, lines 60-62).
However, in a related semiconductor art, Nakamura teaches that the wafer dividing step can be carried out using an ultrasonic apparatus 7 (Fig. 10, para [0052]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to modify the method of Sakamoto by incorporating the ultrasonic vibration as disclosed by Nakamura, because during the stress generated by the knife edge as disclosed in the method of Sakamoto, the cleaving process can irretrievably damage individual dies as disclosed by Herrick.
Furthermore, Sakamoto modified by Muramatsu, Tamura, Chou, Herrick and Nakamura is silent about the ultrasonic force being directly applied to a wafer chuck table that supports the wafer.
However, in the same semiconductor field of endeavor, Donofrio teaches a method for effectuating fracture (Fig. 35, para [0265]) along a laser-induced subsurface damage zone (196A) of a crystalline material (190A) bonded to a carrier (202A+222, para [0265], which is equivalent to a wafer chuck) by applying ultrasonic energy (ultrasonic generator 224) to the crystalline material while in the bonded state (para [0265]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to modify the method of Sakamoto modified by Muramatsu, Tamura, Chou, Herrick and Nakamura, by incorporating the ultrasonic apparatus as disclosed by Donofrio, because ultrasonic waves propagate more efficiently in a denser medium like solid/liquid compared to air.
Re Claim 12, Sakamoto modified by Muramatsu, Tamura, Chou, Herrick, Nakamura and Donofrio teaches the method of claim 11, wherein the wafer chuck table (rigid carrier 202A, Donofrio) supports the wafer (wafer 1, Sakamoto) via the carrier tape (adhesive material 198A of Donofrio, similar to expandable tape 23 of Sakamoto).
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Sakamoto et al. (US 2009/0107967, of record), Muramatsu et al. (US 2009/0008373 A1, of record), Tamura et al. (US 2007/0207594 A1, newly cited) and Chou et al. (US 2019/0355652, of record), and further in view of Fukuyo et al. (US 2004/0002199, of record).
Re Claim 13, Sakamoto modified by Muramatsu, Tamura and Chou teaches the method of claim 8, wherein applying the laser pulses (L, Fig. 19b, Sakamoto) comprises:
setting a laser focus to focus a laser beam at a target depth (Sakamoto’s Fig. 2 shows the laser processing method which focusses the laser at a converging point P at a certain depth within the embodiment 1, also see para [0044]);
setting a laser power to create a damage region at the target depth in the wafer (the intensity of laser light is determined by the peak power density which creates a modified region 7 at the converging point P, see paras [0043] – [0044], Sakamoto) and to create cracks that extend in the wafer from the damage region (Sakamoto’s Fig. 19b shows modified regions 72 and fractures 24 extending from them); and
move the laser beam on the backside of the wafer along a separation path (Sakamoto’s Figs. 1 and 5 show that the laser light is relatively moved along the direction of A, to form a row of modified regions 7, see paras [0045] - [0048]. The laser can be applied from the rear side as explained in the rejection of claim 8 above).
Sakamoto modified by Muramatsu, Tamura and Chou does not explicitly mention a position controller for the laser.
However, in the same semiconductor field of endeavor, Fukuyo teaches that the laser processing system 100 has an overall controller 127 which controls the stage controller 115 (Fig. 14, also see paras [0280] and [0286]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to incorporate the stage controller of Fukuyo into the laser processing system of Sakamoto modified by Muramatsu, Tamura and Chou for precise control of the positioning of the wafer during the cutting process and to enable process automation.
Response to Arguments
Applicant’s arguments with respect to claims 1 and 8 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/P.D./Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898