Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This office action is in response to the filing of the Applicant Arguments/Remarks Made in an Amendment on 02/25/2025. Currently, claims 1-20 are pending in the application.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 6-7, 9, 11, 14-15, 17 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by OKA et al (US 20100133667 A1).
Regarding claim 1, Figure 6 of OKA discloses an electronic device, comprising:
a multi-layered substrate (9, [0069]) comprised of a first metal layer (9c), a second metal layer (9a), and an intermediate layer (9b) disposed between the first metal layer and the second metal layer, the first metal layer (9c) being partitioned into sections, each section having a first surface;
a lead frame (1) attached to outer portions of the first metal layer (9c); and
a first die (6, [0069]) attached to the first surface of a first section of the first metal layer.
Regarding claim 6, Figure 6 of OKA discloses that the electronic device of claim 1, wherein the first metal layer (9c) and the second metal layer are comprised of copper ([0069]).
Regarding claim 7, Figure 6 of OKA discloses that the electronic device of claim 1 wherein the intermediate layer (9b) is comprised of a ceramic material ([0069]).
Regarding claim 9, Figure 6 of OKA discloses a power converter, comprising:
a multi-layered substrate (9, [0069]) comprised of a first metal layer (9c),
a second metal layer (9a), and an intermediate layer (9b) disposed between the first metal layer and the second metal layer, the first metal layer being partitioned into a first section (left) having a first surface (top surface) and a second section (right) having a first surface;
a lead frame (1, [0069]) attached to outer portions of the first metal layer; and
a first die (6, left one, [0069]) attached to the first surface of the first section and a second die (6, right one) attached to the first surface of the second section.
Regarding claim 11, Figure 6 of OKA discloses that the power converter of claim 9, wherein the first metal layer (9c) is partitioned into a third section (middle), and wherein a third die (6, middle section) is attached to a first surface of the third section.
Regarding claim 14, Figure 6 of OKA discloses that the power converter of claim 9, wherein the first metal layer (9c) and the second metal layer (9a) are comprised of copper ([0069]).
Regarding claim 15, Figure 6 of OKA discloses that the power converter of claim 9 wherein the intermediate layer (9b) is comprised of a ceramic material ([0069]).
Regarding claim 17, Figure 6 of OKA discloses a method, comprising:
providing a multi-layered substrate (9, [0069]), the multi-layered substrate having a first metal layer (9c), a second metal layer (9a), and an intermediate layer (9b) disposed between the first metal layer and the second metal layer, the first metal layer partitioned into sections (left, middle and right);
attaching a lead frame (1, [0069]) to outer portions of the first metal layer;
attaching a first die (6, [0069]) to a first surface of a first section of the first metal layer;
forming wire bonds (20) from the first die to the lead frame; and
forming a mold compound (3, [0051]) over portions of the lead frame (1), the multi-layered substrate (9), the first die (6), and the wire bonds (20, [0050]).
Regarding claim 20, Figure 6 of OKA discloses that the method of claim 17, wherein the first metal layer (9c) and the second metal layer (9a) are comprised of copper and the intermediate layer (9b) is comprised of a ceramic material ([0069]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-5, 8, 10, 12-13, 16 and 18-19 are rejected under 35 U.S.C. 103 as being obvious over OKA et al (US 20100133667 A1) in view of Joshi (US 9468087 B1).
Regarding claims 2-3, Figure 6 of OKA does not teach that the electronic device of claim 1, wherein the first die includes a first gallium nitride field-effect transistor, wherein the electronic device further comprises a second die attached to the first surface of a second section of the first metal layer, wherein the second die includes a second gallium nitride field-effect transistor and wherein the first gallium nitride field-effect transistor is configured to operate as a high-side gallium nitride field-effect transistor and the second gallium nitride field-effect transistor is configured to operate as a low-side gallium nitride field-effect transistor.
However, Joshi teaches a power module in which one or more power device dies include a switching device and a second device die with a circuit component are mounted to a lead frame or other interconnect structure on a substrate structure. Figures 1-2 and 5 teaches such a power module comprising driving circuit 108, a high-side gallium nitride field-effect transistor PD1 and a low-side gallium nitride field-effect transistor PD2 (Col. 4, lines 30-65) mounted on a ceramic substrate such as aluminum nitride (col. 6,lines 5-15).
Thus, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to modify the power semiconductor module of OKA wherein the first die includes a first gallium nitride field-effect transistor, wherein the electronic device further comprises a second die attached to the first surface of a second section of the first metal layer, wherein the second die includes a second gallium nitride field-effect transistor and wherein the first gallium nitride field-effect transistor is configured to operate as a high-side gallium nitride field-effect transistor and the second gallium nitride field-effect transistor is configured to operate as a low-side gallium nitride field-effect transistor according to the teaching of Joshi in order to have a power semiconductor module in a single package for inverters or switching rectifiers or power converters with improved performance and lower cost (Background of Joshi).
Regarding claims 4-5, Figure 6 of OKA discloses that the electronic device of claim 1, wherein the electronic device further comprises a second die (6, right one) attached to the first surface of a second section of the first metal layer and a third die (6, middle one) attached to the first surface of a third section of the first metal layer (9c) but OKA does not teach that the first die includes a first gallium nitride field-effect transistor, the second die includes a second gallium nitride field-effect transistor, and the third die includes a control module, wherein the first gallium nitride field- effect transistor is configured to operate as a high-side gallium nitride field-effect transistor and the second gallium nitride field-effect transistor is configured to operate as a low-side gallium nitride field-effect transistor.
However, Joshi teaches a power module in which one or more power device dies include a switching device and a second device die with a circuit component are mounted to a lead frame or other interconnect structure on a substrate structure. Figures 1-2 and 5 teaches such a power module comprising driving circuit 108, a high-side gallium nitride field-effect transistor PD1 and a low-side gallium nitride field-effect transistor PD2 (Col. 4, lines 30-65) mounted on a ceramic substrate such as aluminum nitride (col. 6,lines 5-15).
Thus, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to modify the power semiconductor module of OKA wherein the first die includes a first gallium nitride field-effect transistor, the second die includes a second gallium nitride field-effect transistor, and the third die includes a control module, wherein the first gallium nitride field- effect transistor is configured to operate as a high-side gallium nitride field-effect transistor and the second gallium nitride field-effect transistor is configured to operate as a low-side gallium nitride field-effect transistor according to the teaching of Joshi in order to have a power semiconductor module in a single package for inverters or switching rectifiers or power converters with improved performance and lower cost (Background of Joshi).
Regarding claims 8 and 16, Figure 6 of OKA does not explicitly teach that the electronic device of claim 7, wherein the ceramic material is one of aluminum oxide, aluminum nitride, and silicon nitride. Or
The power converter of claim 15, wherein the ceramic material is one of aluminum oxide, aluminum nitride, and silicon nitride.
However, Joshi teaches a power module in which one or more power device dies include a switching device and a second device die with a circuit component are mounted to a lead frame or other interconnect structure on a substrate structure. Figures 1-2 and 5 teaches such a power module comprising driving circuit 108, a high-side gallium nitride field-effect transistor PD1 and a low-side gallium nitride field-effect transistor PD2 (Col. 4, lines 30-65) mounted on a ceramic substrate such as aluminum nitride (col. 6,lines 5-15).
Thus, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to use a material such as aluminum nitride as the ceramic material in the device of OKA according to the teaching of Joshi for improved thermal conductivity (col. 6,lines 5-15, Joshi).
Regarding claim 10, Figure 6 of OKA does not explicitly teach that the power converter of claim 9, wherein the first die includes a gallium nitride field-effect transistor configured to operate as a high-side gallium nitride field-effect transistor and the second die includes a gallium nitride field-effect transistor configured to operate as a low-side gallium nitride field-effect transistor.
However, Joshi teaches a power module in which one or more power device dies include a switching device and a second device die with a circuit component are mounted to a lead frame or other interconnect structure on a substrate structure. Figures 1-2 and 5 teaches such a power module comprising driving circuit 108, a high-side gallium nitride field-effect transistor PD1 and a low-side gallium nitride field-effect transistor PD2 (Col. 4, lines 30-65) mounted on a ceramic substrate such as aluminum nitride (col. 6,lines 5-15).
Thus, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to modify the power semiconductor module of OKA wherein the first die includes a gallium nitride field-effect transistor configured to operate as a high-side gallium nitride field-effect transistor and the second die includes a gallium nitride field-effect transistor configured to operate as a low-side gallium nitride field-effect transistor according to the teaching of Joshi in order to have a power semiconductor module in a single package for inverters or switching rectifiers or power converters with improved performance and lower cost (Background of Joshi).
Regarding claim 12-13, Figure 6 of OKA does not explicitly teach that the power converter of claim 11, wherein the first die includes a first gallium nitride field-effect transistor, the second die includes a second gallium nitride field-effect transistor, and the third die includes a control module, wherein the first gallium nitride field- effect transistor is configured to operate as a high-side gallium nitride field-effect transistor and the second gallium nitride field-effect transistor is configured to operate as a low-side gallium nitride field-effect transistor.
However, Joshi teaches a power module in which one or more power device dies include a switching device and a second device die with a circuit component are mounted to a lead frame or other interconnect structure on a substrate structure. Figures 1-2 and 5 teaches such a power module comprising driving circuit 108, a high-side gallium nitride field-effect transistor PD1 and a low-side gallium nitride field-effect transistor PD2 (Col. 4, lines 30-65) mounted on a ceramic substrate such as aluminum nitride (col. 6,lines 5-15).
Thus, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to modify the power semiconductor module of OKA wherein the first die includes a first gallium nitride field-effect transistor, the second die includes a second gallium nitride field-effect transistor, and the third die includes a control module, wherein the first gallium nitride field- effect transistor is configured to operate as a high-side gallium nitride field-effect transistor and the second gallium nitride field-effect transistor is configured to operate as a low-side gallium nitride field-effect transistor according to the teaching of Joshi in order to have a power semiconductor module in a single package for inverters or switching rectifiers or power converters with improved performance and lower cost (Background of Joshi).
Regarding claim 18-19, Figure 6 of OKA does not explicitly teach that the method of claim 17, wherein the first die includes a first gallium nitride field-effect transistor, a second die attached to a first surface of a second section of the first metal layer includes a second gallium nitride field-effect transistor, and a third die attached to a first surface of a third section of the first metal layer includes a control module, wherein the first gallium nitride field-effect transistor is configured to operate as a high-side gallium nitride field- effect transistor and the second gallium nitride field-effect transistor is configured to operate as a low-side gallium nitride field-effect transistor.
However, Joshi teaches a power module in which one or more power device dies include a switching device and a second device die with a circuit component are mounted to a lead frame or other interconnect structure on a substrate structure. Figures 1-2 and 5 teaches such a power module comprising driving circuit 108, a high-side gallium nitride field-effect transistor PD1 and a low-side gallium nitride field-effect transistor PD2 (Col. 4, lines 30-65) mounted on a ceramic substrate such as aluminum nitride (col. 6,lines 5-15).
Thus, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to modify the power semiconductor module of OKA wherein the first die includes a first gallium nitride field-effect transistor, a second die attached to a first surface of a second section of the first metal layer includes a second gallium nitride field-effect transistor, and a third die attached to a first surface of a third section of the first metal layer includes a control module, wherein the first gallium nitride field-effect transistor is configured to operate as a high-side gallium nitride field- effect transistor and the second gallium nitride field-effect transistor is configured to operate as a low-side gallium nitride field-effect transistor according to the teaching of Joshi in order to have a power semiconductor module in a single package for inverters or switching rectifiers or power converters with improved performance and lower cost (Background of Joshi).
Response to Arguments
Applicant’s arguments/amendments regarding the rejection of claims 1-20, filed on 02/25/2025, have been fully considered but arguments are moot because newly added limitation to the claim (s) requires a new ground of rejection necessitated by amendments.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHAJA AHMAD whose telephone number is (571)270-7991. The examiner can normally be reached on Monday to Friday from 8:00 AM to 5:00 PM (Eastern Time).
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, GAUTHIER STEVEN B, can be reached on (571)270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KHAJA AHMAD/
Primary Examiner, Art Unit 2813
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