Prosecution Insights
Last updated: April 19, 2026
Application No. 17/565,220

WORK FUNCTION MATERIAL AND MANUFACTURING PROCESS THEREOF

Non-Final OA §102§103
Filed
Dec 29, 2021
Examiner
ASHBAHIAN, ERIC K
Art Unit
2891
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Limited
OA Round
2 (Non-Final)
67%
Grant Probability
Favorable
2-3
OA Rounds
2y 11m
To Grant
74%
With Interview

Examiner Intelligence

Grants 67% — above average
67%
Career Allow Rate
310 granted / 465 resolved
-1.3% vs TC avg
Moderate +7% lift
Without
With
+7.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
58 currently pending
Career history
523
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
51.3%
+11.3% vs TC avg
§102
17.1%
-22.9% vs TC avg
§112
25.1%
-14.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 465 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 21-25, 28 and 29 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Ando et al. (US 2021/0328103) hereinafter “Ando”. Regarding claim 21, Fig. 10B of Ando teaches a method, comprising: forming a nanostructure, of a transistor, vertically arranged above a substrate (Item 101); forming a channel structure of the nanostructure, the channel structure comprising a plurality of nanostructure channels (Items 104) over the substrate (Item 101) and extending between source/drains (Items 120) of the transistor; and forming a work function material (WFM) (Any of Items 231/234/232), that includes aluminum and carbon (Paragraph 0075 where Tantalum Aluminum Carbide is used), disposed around the plurality of nanostructure channels of the channel structure and separated from the source/drains (Item 120) by one or more inner spacers (Item 111); and where the WFM comprises a concentration of titanium that is in a range of 0% to less than 1.5% of the WFM (Where TaAlC is used such that no titanium (0%) is present). Regarding claim 22, Fig. 10B of Ando further teaches where the WFM (Any of Items 231/234/232) is disposed between the plurality of nanostructure channels (Items 104) and a filling metal (Item 230) of the transistor. Regarding claim 23, Fig. 10B of Ando further teaches where the transistor comprises a nanosheet transistor (Paragraph 0059). Regarding claim 24, Fig. 10B of Ando further teaches where the channel structure comprises multiple channels (Items 104), and wherein the WFM (Any of Items 231/234/232) is disposed around individual channels of the multiple channels (Items 104). Regarding claim 25, Fig. 10B of Ando further teaches forming an additional WFM (Any of the other of Items 231/234/232) disposed around the WFM (Any of Items 231/234/232). Under the alternate rejection of claim 25, Regarding claim 28, Fig. 1B of Zhang further teaches where the additional WFM (Any of the other of Items 231/234/232) comprises a titanium nitride (TiN) based material (Paragraph 0075). Regarding claim 29, Fig. 1B of Zhang further teaches where the WFM is an n-type WFM (Fig. 10B). Claims 30 and 31 are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Lin et al. (US 10,535,523) hereinafter “Lin”. Regarding claim 30, Figs. 2 and 3A of Lin teach a method, comprising: forming source/drains (Item S/D) on a surface of a substrate (Item 213) of a transistor; forming a channel extending between the source/drains and within the substrate (Item 213); and forming a work function material (WFM) (Item 205), that includes aluminum and carbon (Column 12, Lines 40-41 where TaAlC is used), disposed above the channel, and forming a gate (Item 207) disposed on the WFM (Item 205); where the WFM comprises a concentration of titanium that is in a range of 0% to less than 1.5% of the WFM (Where TaAlC is used such that no titanium (0%) is present). Regarding claim 31, Fig. 3A of Lin further teaches where the transistor comprises a FinFET transistor (Column 4, Lines 52-53). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 25-27 are rejected under 35 U.S.C. 103 as being unpatentable over Ando et al. (US 2021/0328103) hereinafter “Ando” in view of Zhang et al. (US 10,700,064) hereinafter “Zhang”. Regarding claim 25, Ando teaches all of the elements of the claimed invention as stated above except forming an interfacial layer disposed between the WFM and the channel structure or forming a high-k dielectric disposed between the WFM and the channel structure. Fig. 1B of Zhang further teaches where forming an interfacial layer (Column 8, Lines 24-29 where a thin interfacial layer is formed between the high-k dielectric and channel) disposed between the WFM (Item 163) and the channel structure (Items 112, 114 and 116), forming a high-k dielectric layer (Item 161) disposed between the WFM (Item 163) and the channel structure. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form an interfacial layer disposed between the WFM and the channel structure and form a high-k dielectric disposed between the WFM and the channel structure because the interfacial layer helps aids in the interface between a silicon channel material and a high-k dielectric layer on the channel material (Zhang Column 19, Lines 38-49). Regarding claim 26, the combination of Ando and Zhang teaches all of the elements of the claimed invention as stated above except where the interfacial layer comprises an oxide layer disposed directly on the channel structure. Fig. 1B of Zhang further teaches where the interfacial layer comprises an oxide layer (Column 8, Lines 24-25 where silicon oxide is the interfacial layer) disposed directly on the channel structure (Item 112, 114 and 116). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the interfacial layer comprises an oxide layer disposed directly on the channel structure because the interfacial layer helps aids in the interface between a silicon channel material and a high-k dielectric layer on the channel material (Zhang Column 19, Lines 38-49). Regarding claim 27, the combination of Ando and Zhang teaches all of the elements of the claimed invention as stated above except where the high-k dielectric layer comprises a hafnium oxide-based material disposed between the interfacial layer and the WFM. Fig. 1B of Zhang further teaches where the high-k dielectric layer (Item 161) comprises a hafnium oxide-based material (Column 8, Lines 22-24) disposed between the interfacial layer and the WFM (Item 163). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the high-k dielectric layer comprises a hafnium oxide-based material disposed between the interfacial layer and the WFM because the interfacial layer helps aids in the interface between a silicon channel material and a high-k dielectric layer on the channel material (Zhang Column 19, Lines 38-49). Claims 10, 11, 13, 14 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Ando et al. (US 2021/0328103) hereinafter “Ando” in view of Lin et al. (US 10,535,523) hereinafter “Lin”. Regarding claim 10, Fig. 10B of Ando teaches a method, comprising: forming a channel structure (Items 104) of a transistor, the channel structure comprising a plurality of nanostructure channels (Items 104) over a substrate (Item 101) and extending between source/drains (Items 120) of the transistor; and forming a work function material (WFM) (Any of 231/234/232), that includes aluminum and carbon (Paragraph 0075 where Tantalum Aluminum Carbide is used), around the channel structure, and where the WFM (Any of 231/234/232) comprises a concentration of titanium that is in a range of 0% to less than 1.5% of the WFM (Where TaAlC is used such that no titanium (0%) is present). Ando does not teach wherein forming the WFM around the channel structure includes applying a chemical soak, wherein a material of the chemical soak comprises an aluminum, carbon, and hydrogen based material. Lin teaches forming a work function material (Item 105) that is TaAlC as part of a gate structure (Column 7, Lines 64-67), where forming the work function material includes applying a chemical soak, where a material of the chemical soak comprises an aluminum, carbon and hydrogen based material (Column 8, Lines 22-25 where TEA is used). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have forming the WFM around the channel structure include applying a chemical soak, wherein a material of the chemical soak comprises an aluminum, carbon, and hydrogen based material because this process is known to form a conformal work function layer having improved step coverage (Zhang Column 8, Lines 9-11) and “(C) Use of known technique to improve similar devices (methods, or products) in the same way” and/or “(D) Applying a known technique to a known device (method, or product) ready for improvement to yield predictable results” support a prima facie case of obviousness (MPEP 2143; See also KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007)). Regarding claim 11, the combination of Ando and Lin teaches all of the elements of the claimed invention as stated above. Ando does not teach where applying the chemical soak comprises: applying the material of the chemical soak at a temperature in a range of approximately 250 degrees Celcius to approximately 600 degrees Celcius. Lin further teaches where the materials of the chemical soak are supplied at a temperature in a range of 200-1000 degrees Celcius (Column 14, Lines 63-65). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have applying the chemical soak comprise: applying the material of the chemical soak at a temperature in a range of approximately 250 degrees Celcius to approximately 600 degrees Celcius because this is known to be used as a temperature range during the supplying of precursors such as TEA (Lin Column 15, Lines 1-4) and In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976) (MPEP 2144.05). Regarding claim 13, Fig. 10B of Ando further teaches where forming the WFM (Any of Items 231/234/232) around the channel structure (Items 104) comprises: depositing the WFM around the high-k dielectric layer (Paragraph 0075). Regarding claim 14, Fig. 10B of Ando further teaches depositing, after forming the WFM (Any of Items 231/234/232) around the channel structure (Items 104), a filling metal (Item 230) around the WFM. Regarding claim 17, Fig. 10B of Ando further teaches where the channel structure comprises multiple channels (Any of Items 231/234/232) extending between source/drains (Items 120) of the transistor, and wherein forming the WFM around the channel structure comprises depositing the WFM around individual channels of the multiple channels (Items 104). Claims 12, 15 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Ando et al. (US 2021/0328103) hereinafter “Ando” in view of Lin et al. (US 10,535,523) hereinafter “Lin” and in further view of Zhang et al. (US 10,700,064) hereinafter “Zhang”. Regarding claim 12, the combination of Ando and Lin teaches all of the elements of the claimed invention as stated above except depositing an interfacial layer on the channel structure; and depositing a high-k dielectric layer on the interfacial layer. Fig. 1B of Zhang further teaches depositing an interfacial layer (Column 8, Lines 24-29 where a thin interfacial layer is formed between the high-k dielectric and channel) on the channel structure; and depositing a high-k dielectric layer (Item 161) on the interfacial layer. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to deposit an interfacial layer on the channel structure; and deposit a high-k dielectric layer on the interfacial layer because the interfacial layer helps aids in the interface between a silicon channel material and a high-k dielectric layer on the channel material (Zhang Column 19, Lines 38-49). Regarding claim 15, the combination of Ando and Lin teaches all of the elements of the claimed invention as stated above except forming the WFM around an additional channel structure of an additional transistor of a same electronic device as the transistor, wherein the WFM has a first thickness around the channel structure, and wherein the WFM has a second thickness around the additional channel structure, wherein the first thickness is different from the second thickness. Fig. 1B of Zhang further teaches forming the WFM (Item 163) around an additional channel structure (Combination of Items 122, 124 and 126) of an additional transistor of a same electronic device as the transistor, wherein the WFM (Item 163) has a first thickness around the channel structure (Combination of Items 112, 114 and 116), and wherein the WFM (Item 163) has a second thickness around the additional channel structure (Combination of Items 122, 124 and 126), wherein the first thickness is different from the second thickness. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form the WFM around an additional channel structure of an additional transistor of a same electronic device as the transistor, wherein the WFM has a first thickness around the channel structure, and wherein the WFM has a second thickness around the additional channel structure, wherein the first thickness is different from the second thickness because this yields a device having multi-threshold voltage gate-all-around field effect transistor devices (Zhang Abstract). Regarding claim 16, the combination of Ando, Lin and Zhang teaches all of the elements of the claimed invention as stated above. Zhang does not explicitly teach where the WFM has a thickness that is greater than 0 angstroms and less than 12 angstroms. However, the thickness of the WFM is known to be a result effective variable (Zhang Column 20, Lines 31-41 where the WFM is deposited with sufficient thickness to completely fill remaining portions of the channel spaces above and below the active nanosheet channel layers). In In re Antonie, 559 F.2d 618, 195 USPQ 6 (CCPA 1977), the CCPA held that a particular parameter must first be recognized as a result-effective variable, i.e., a variable which achieves a recognized result, before the determination of the optimum or workable ranges of said variable might be characterized as routine experimentation, because "obvious to try" is not a valid rationale for an obviousness finding (MPEP 2144.05). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to optimize the thickness of the WFM such that the WFM has a thickness that is greater than 0 angstroms and less than 12 angstroms because "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (MPEP 2144.05). Claim 32 is rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 10,535,523) hereinafter “Lin” in view of Zhang et al. (US 10,700,064) hereinafter “Zhang”. Regarding claim 32, Lin teaches all of the elements of the claimed invention as stated above except forming a tunneling dielectric between the channel and the WFM. Fig. 1B of Zhang further teaches forming an tunneling dielectric (Column 8, Lines 24-29 where a thin interfacial layer is formed between a high-k dielectric and channel) between a channel structure (Items 112, 114 and 116) and a WFM (Item 163). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form a tunneling dielectric between the channel and WFM because the tunneling dielectric serves as an interfacial layer such that device performance is not degraded (Zhang Column 19, Lines 36-50). Response to Arguments Applicant’s arguments, see Applicant’s REMARKS, filed 10/09/2025, with respect to the rejection(s) of claim(s) 10 and 21 under 35 USC 103(a) have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Ando. Applicant’s arguments, see Applicant’s REMARKS, filed 10/09/2025, with respect to the rejection(s) of claim(s) 30 under 35 USC 103(a) have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of another embodiment of Lin. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC K ASHBAHIAN whose telephone number is (571)270-5187. The examiner can normally be reached 8-5:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at 571-272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERIC K ASHBAHIAN/ Primary Examiner, Art Unit 2891
Read full office action

Prosecution Timeline

Dec 29, 2021
Application Filed
Mar 10, 2022
Response after Non-Final Action
Jul 08, 2025
Non-Final Rejection — §102, §103
Aug 31, 2025
Interview Requested
Sep 11, 2025
Applicant Interview (Telephonic)
Sep 11, 2025
Examiner Interview Summary
Oct 09, 2025
Response Filed
Jan 29, 2026
Non-Final Rejection — §102, §103
Feb 26, 2026
Interview Requested
Mar 17, 2026
Applicant Interview (Telephonic)
Mar 17, 2026
Examiner Interview Summary

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

2-3
Expected OA Rounds
67%
Grant Probability
74%
With Interview (+7.2%)
2y 11m
Median Time to Grant
Moderate
PTA Risk
Based on 465 resolved cases by this examiner. Grant probability derived from career allow rate.

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