DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This action is responsive to the following communications: the application filed January 14, 2022; the Information Disclosure Statement (IDS) filed January 14, 2022; and the Response to Restriction Requirement filed October 23, 2024.
Claims 1-20 are pending in the application. Claims 11-17 are withdrawn as they are directed to a non-elected invention. Claims 1 and 18 are independent claims.
Information Disclosure Statement
Acknowledgement is made of Applicant’s IDS submitted on January 14, 2022. The IDS submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Election/Restrictions
Applicant’s election with traverse of Invention I in the reply filed on October 23, 2024 is acknowledged. The traversal is apparently on the ground that including the term “metal silicide” in claims 1 and 18 obviates the restriction. This is not found persuasive because subcombination I (Invention I) still has separate utility such as for a method forming an IC including a buried layer having a second n-type dopant concentration less than or equal to a first n-type dopant concentration. Subcombination II still has separate utility such as for a method of forming an IC that does not have a Schottky contact/barrier.
The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4, 6-7, 9, and 18-20 are rejected under 35 U.S.C. 102(a)(1) as anticipated by U.S. Patent No. 3,995,301 to Magdo (referred to hereafter as “Magdo”).
Regarding claim 1, Magdo teaches a method of forming an integrated circuit {Figure 2B}, comprising: forming a metal silicide Schottky contact {47; “platinum silicide” (column 4, line 12); “With reference to FIGS. 2A and 2B, there will now be briefly described the utilization of the process described in FIGS. 1A through 1D for the fabrication of Schottky Barrier devices in a junction isolated integrated circuit” (column 5, lines 38-42)} at a top surface of a semiconductor layer {28} having a first conductivity type {N}; and forming a metal silicide ohmic contact {45; “platinum silicide” (column 4, line 12); “With reference to FIGS. 2A and 2B, there will now be briefly described the utilization of the process described in FIGS. 1A through 1D for the fabrication of Schottky Barrier devices in a junction isolated integrated circuit” (column 5, lines 38-42)} to the semiconductor layer; and forming a first doped region {25} at the top surface between the Schottky contact {47} and the ohmic contact {45}, the first doped region {25} having an opposite second conductivity type {P} and forming a closed path {“isolation region 25 respectively isolates regions 26 and 27” (column 5, lines 45-46} around the Schottky contact.
Regarding claim 2 (that depends from claim 1), Magdo teaches forming a doped buried layer {32} having the first conductivity type between the semiconductor layer {28} and a semiconductor substrate {29}.
Regarding claim 3 (that depends from claim 1), Magdo teaches the semiconductor layer {28} includes an N-type epitaxial layer {28} having first doping level {N-}.
Regarding claim 4 (that depends from claim 1), Magdo teaches forming a second doped region {30} having the second conductivity type that intersects the surface between the first doped {25} and the Schottky contact {47}.
Regarding claim 6 (that depends from claim 1), Magdo teaches forming a dielectric isolation layer {34} over the surface of the semiconductor layer {28} between the ohmic contact {45} and the Schottky contact {47}.
Regarding claim 7 (that depends from claim 1), Magdo Figure 2B shows the first conductivity type is N-type and the second conductivity type is P-type.
Regarding claim 9 (that depends from claim 1), Magdo teaches forming an isolation structure {34} that extends from the surface into the semiconductor layer {28}, the isolation structure surrounding the ohmic contact {45} and the Schottky contact {47}.
Regarding claim 18, Magdo teaches a method of forming an electronic device {Figure 2B}, comprising: forming a buried layer {32} in a semiconductor substrate {28}, the buried layer {32} separated from a surface of the semiconductor substrate {28} by a semiconductor layer {28} having a first conductivity type {N}; forming a metal silicide Schottky barrier {47; “platinum silicide” (column 4, line 12); “With reference to FIGS. 2A and 2B, there will now be briefly described the utilization of the process described in FIGS. 1A through 1D for the fabrication of Schottky Barrier devices in a junction isolated integrated circuit” (column 5, lines 38-42)} to the semiconductor layer; forming a metal silicide ohmic contact {45; “platinum silicide” (column 4, line 12); “With reference to FIGS. 2A and 2B, there will now be briefly described the utilization of the process described in FIGS. 1A through 1D for the fabrication of Schottky Barrier devices in a junction isolated integrated circuit” (column 5, lines 38-42)} to the semiconductor layer {28}; and forming a doped region {25} having an opposite second conductivity type in the semiconductor layer {28} between the Schottky barrier {47} and the ohmic contact {45}, the doped region completely surrounding {“isolation region 25 respectively isolates regions 26 and 27” (column 5, lines 45-46} the Schottky barrier at the surface.
Regarding claim 19 (that depends from claim 18), Magdo teaches forming an insulating layer {34} on the surface between the Schottky barrier {47} and the ohmic contact {45}, and wherein the insulating layer {34} ends over the doped region {25}.
Regarding claim 20 (that depends from claim 18), Magdo Figure 2B shows the first conductivity type is N-type and the second conductivity type is P-type.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 5, 8, and 10 are rejected under 35 U.S.C. 103 as unpatentable over Magdo in view of U.S. Patent No. 7,608,907 B2 to Mallikarjunaswamy et al. (referred to hereafter as “Mallikarjunaswamy”).
Regarding claim 5 (that depends from claim 4), Magdo does not appear to explicitly describe forming a field plate that extends over the first doped region and the second doped region. Mallikarjunaswamy shows that it was known that use of a field plate “improves surface breakdown” (column, lines). It would have been obvious to one of ordinary skill in the art at the time of the invention to combine the Mallikarjunaswamy field plate with the Magdo device to improve the surface breakdown thereof.
Regarding claim 8 (that depends from claim 1), Magdo does not appear to explicitly describe forming a field plate over the first doped region. Mallikarjunaswamy shows that it was known that use of a field plate “improves surface breakdown” (column, lines). It would have been obvious to one of ordinary skill in the art at the time of the invention to combine the Mallikarjunaswamy field plate with the Magdo device to improve the surface breakdown thereof.
Regarding claim 10 (that depends from claim 1), Magdo does not appear to explicitly describe forming a gate layer over the first doped region, and forming a lateral diffused metal-oxide semiconductor (LDMOS) transistor in or over the semiconductor layer, the LDMOS transistor including a gate formed from a same material layer as the gate layer. Mallikarjunaswamy shows that it was known to provide “a Schottky diode and a LDMOS device coupled in series with the Schottky diode” for an improved diode” (Mallikarjunaswamy abstract). It would have been obvious to one of ordinary skill in the art at the time of the invention to combine the Mallikarjunaswamy LDMOS device with the Magdo Schottky device to improve the surface breakdown thereof.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Robert Carpenter whose telephone number is (571)270-5140. The examiner can normally be reached on Monday through Friday from 9AM to 5PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at (571)272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Robert K Carpenter/Primary Examiner, Art Unit 2812
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