DETAILED ACTION
The present Office action is in response to the Request for Continued Examination (RCE) filed on 27 JUNE 2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Claims 1, 7, 8, 15, and 19 have been amended. No claims have been canceled or added. Claims 1-20 are pending and herein examined.
Response to Arguments
Applicant’s arguments, see Remarks, filed 03/05/2026, with respect to the rejection(s) of claim(s) 1, 8, and 15 under 35 U.S.C. § 103 have been fully considered and are partially persuasive.
With regard to claim 1, rejected under 35 U.S.C. § 103 as being unpatentable over U.S. Publication No. 2015/0281705 A1 (hereinafter “Wang”) in view of U.S. Publication No. 2005/0152400 A1 (hereinafter “Suzuki”), further in view of U.S. Publication No. 2011/0194439 A1 (hereinafter “Maze”), and even further in view of U.S. Publication No. 2002/0092030 A1 (hereinafter “Gu”), Applicant alleges the following:
In the Remarks, pp. 2-3, each of Wang, Suzuki, Maze, and Gu are argued independently and not in the combination presented. In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986).
Applicant further alleges:
“The Office Action relied on language that an indication is “generated based at least in part on the chunk size.” Amended claim 1 removes this ambiguity and now requires an indication that indicates encoded data meeting the chunk size has been stored in a buffer. None of the cited references disclose or suggest such an indication.” (Remarks, pp. 3-4.)
The current amendment does not include additional specificity, because the “indication” remains a broad, relatively subjective term. The “indication” may be a flag defining specifically a completion state of the chunk size being met or it may be the initiation of a hand-shake, where the hand-shake occurs when the buffer is ready to empty at a time of being full, because the buffer fullness is the chunk size. The rejection relies upon Suzuki parsing information from a bitstream (i.e., the “indication”) for consuming the data. See Suzuki, ¶¶ [0079-0085] and [0099].
Applicant further alleges:
“Recasting these teachings into a consumer-defined, encoder-enforced chunk-completion signaling scheme is only possible with hindsight knowledge of Applicant’s invention.” (Remarks, p. 4.)
In response to applicant's argument that the examiner's conclusion of obviousness is based upon improper hindsight reasoning, it must be recognized that any judgment on obviousness is in a sense necessarily a reconstruction based upon hindsight reasoning. But so long as it takes into account only knowledge which was within the level of ordinary skill at the time the claimed invention was made, and does not include knowledge gleaned only from the applicant's disclosure, such a reconstruction is proper. See In re McLaughlin, 443 F.2d 1392, 170 USPQ 209 (CCPA 1971).
Applicant further alleges:
“In the Response to Arguments, the Examiner acknowledges that Wang, Suzuki, and Maze do not expressly disclose a consumer module setting the chunk size, and relied on Gu to cure this deficiency. As discussed above, Gu does not disclose setting a chunk size as a unit of consumption, nor does it disclose encoder signaling keyed to such a unit.” (Remarks, pp. 4-5.)
The Examiner recognizes Wang, Suzuki, and Maze’s deficiency without Gu’s disclosure; however, Applicant expressed concerns regarding Suzuki’s combination with Wang without teaching the defining limitations of the chunk size and the Examiner agrees. The chunk size deficiencies covered by Maze and Gu in combination with Wang is found to still be obvious. For this reason, the current rejection presents Wang, Maze, Gu, and then Suzuki. In this way, Suzuki it is obvious for Suzuki to function with the chunk size as presented in the combination of Wang, Maze, and Gu.
Examiner’s Note: Due to the length of prosecution, the Examiner suggests initiating a conversation before a subsequent response to discuss the rejection and any potential amendments. Applicant’s Remarks have been helpful in identifying differences between the instant application and the prior-art of record. Two instances includes (i) the prior-art of claim 1 concerns synchronizing a decoder with an encoder, whereas the consumer module and encoder are not two distinct devices, and (ii) the instant application allows for dynamically updating the pointer, whereas the prior-art’s “consumer module” provides feedback in a “one and done” type of setting. See instant application, ¶ [0017].
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
With regard to claims 1, 8, and 15, each claim recites a variation of the video encoder that “read[s] a chunk size corresponding to encoded video data.” The specification discloses the read operation is performed by the consumer module. There appears to be no section that describes the encoder as reading the chunk size. For instance, FIG. 5 was provided as support, but the video encoder 510 only receives a completion acknowledgement 505C. The video encoder 510 in FIG. 5 is capable of writing and providing write pointer updates with a frame completion flag; however, nowhere the encoder does not read the bitstream buffer 515. Instead, the consumer module 525 is designed with reading capabilities. See specification, ¶¶ [0018], [0032], and [0036].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 2, 5, 7-9, 12, 14, 15, 18, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Publication No. 2015/0281705 A1 (hereinafter “Wang”) in view of U.S. Publication No. 2011/0194439 A1 (hereinafter “Maze”), further in view of U.S. Publication No. 2002/0092030 A1 (hereinafter “Gu”), and even further in view of U.S. Publication No. 2005/0152400 A1 (hereinafter “Suzuki”).
Regarding claim 1, Wang discloses a system ([0012], “system for coding a sequence comprising a plurality of pictures”) comprising:
a video encoder comprising circuitry ([0038], “source encoder 202 […] may include, for example a processor and related memory storing instructions”) configured to:
read a chunk size corresponding to encoded video data [defining a buffer size] ([0176] defines the encoder buffer size dependent on the decoder buffer size, wherein the buffer size represents the granularity, Eq. 25, “buffer_size=min(buffer_delay,decoder_buffer_size).” The buffer size represents the granularity. Note, [0008] describes building upon the prior-art, such as AVC and HEVC, which use parameters supported by the decoder for properly encoding (e.g., profile and level, buffer size, etc.), also see Wang, [0035-0036])
a consumer module comprising circuitry ([0078], “decoder 220.” FIG. 17, processing system 1700 including computer 1702 and processors 1704A-B) configured to:
([0176] defines the encoder buffer size dependent on the decoder buffer size, wherein the buffer size represents the granularity, Eq. 25, “buffer_size=min(buffer_delay,decoder_buffer_size).” Note, by use of the decoder_buffer_size, the chunk size is representative of what the decoder can handle, which is desirable); and
retrieve at least one chunk of encoded video data from the buffer (FIG. 2C depicts transmitter buffer 267 transmitting compressed bitstream to receiver buffer 259; [0016], “encoded AV information is transmitted to an received at another location”).
Wang fails to expressly disclose the chunk size being less than a frame size;
convey an indication to a consumer module when encoded data meeting the chunk size has been stored in a buffer;
[consumer module configured to] set the chunk size; and
[retrieve] in response to said indication.
However, Maze teaches the chunk size being less than a frame size ([0107], “adapt the encoding and/or the packetization to obtain a size of payload data which is the closest possible to the maximum size. For example, the encoding may be adapted by modifying the image portions (“slices”) or the quantization step size. The packetization may be adapted by fragmenting or by combining the image portions, if the packetization mode allows this;” [0006-0007] describes streaming slice image portions at a time and limitations in packet sizes. Note, having to fragment image portions and streaming such image portions is indicative of the size of data being less than a frame size).
Before the effective filing date of the claimed invention, it would have been obvious to a person having ordinary skill in the art to have utilized buffer management techniques that are limited to image portions, as taught by Maze ([0107]), in Wang’s invention. One would have been motivated to modify Wang’s invention, by incorporating Maze’s invention, to incorporate efficient memory and processor resource management (Maze: ¶ [0007-0008]).
Wang and Maze fail to expressly disclose convey an indication to a consumer module when encoded data meeting the chunk size has been stored in a buffer;
[consumer module configured to] set the chunk size; and
[retrieve] in response to said indication.
However, Gu teaches [consumer module configured to] set the chunk size ([0039], “the decoder may employ a back-channel for transmitting information from the decoder to the encoder 200, such as information concerning decoding capabilities, information concerning available buffers (i.e., memory) and buffer allocation, and information concerning data errors.” Note, the chunk size is interpreted as an amount of data for buffering and packetizing. Wang discloses setting the buffering based on the decoder, such information being provided by the decoder in accordance with Gu’s disclosure).
Before the effective filing date of the claimed invention, it would have been obvious to a person having ordinary skill in the art to have an encoder utilize decoder information, as taught by Gu ([0039]), in Wang and Maze’s invention. One would have been motivated to modify Wang and Maze’s invention, by incorporating Gu’s invention, because it is obvious to a person having ordinary skill in the art to use the known technique for back-channeling to improve similar compression systems in the same way (see MPEP § 2143(I)(C)).
Wang, Maze, and Gu fail to expressly disclose convey an indication to a consumer module when encoded data meeting the chunk size has been stored in a buffer; and
[retrieve] in response to said indication.
However, Suzuki teaches convey an indication to a consumer module when encoded data meeting the chunk size has been stored in a buffer ([0099], “The bitstream analyzing unit 91 decodes buffer information BH in the bitstream.” FIG. 7, decoding device 90 receives input bitstream BS and parses buffer information BH to provide to decoding-possibility determining 92 that determines to consume the data based on the input bitstream BS information at image-information device 40. Paragraphs [0090] and [0094] describe syntax for the buffer information BH including rate[i], buffer[i], and f[i]. Note, the buffer information is of the encoder. Paragraphs [0079-0085] describes how buffer occupancy is determined); and
[retrieve] in response to said indication (FIG. 7, decoding device 90 decodes at image-information decoding device 40 in response to receiving input bitstream BS containing buffer information BH).
Before the effective filing date of the claimed invention, it would have been obvious to a person having ordinary skill in the art to have provided buffer information from the encoder to the decoder for consumption, as taught by Suzuki ([0078-0090]), in Wang, Maze, and Gu’s disclosure. One would have been motivated to modify Wang, Maze, and Gu’s disclose, by modifying Suzuki’s disclosure, to efficiently determine the decoding possibility of a bitstream and to simplify bitstream editing (Suzuki: ¶ [0043]).
Regarding claim 2, Wang, Maze, Gu, and Suzuki disclose every limitation of claim 1, as outlined above. Additionally, Wang discloses wherein the circuitry of the consumer module is further configured to monitor the indication for updates by the video encoder ([0177-0178] describes preventing overflow and underflow of both the encoder and decoder buffers based on the bits of a current picture. In FIG. 2C each of controller 241 and controller 267 control the buffers and monitors their capacity, such as signal 263 from receiver buffer 259 that provides control information received from the encoder to controller 267. See [0048-0056]. Note, encoder and decoder buffers have inverse relationships for overflow and underflow, meaning the encoder detecting upper capacity at the transmitter buffer is associated with a lower capacity at the receiver buffer and similarly detected by the decoder controller).
Regarding claim 5, Wang, Maze, Gu, and Suzuki disclose all of the limitations of claim 1, as outlined above. Additionally, Maze discloses wherein the chunk size specifies a size equal to a maximum size of a network transmission packet payload ([0107], “The encoder 2011 and/or the packetizer 212 interrogate the buffer memory factory 213 to know the maximum size available for the payload data in a network packet. With the reply, they respectively adapt the encoding and/or the packetization to obtain a size of payload data which is the closest possible to the maximum size”).
Regarding claim 7, Wang, Maze, Gu, and Suzuki disclose all of the limitations of claim 1, as outlined above. Additionally, Gu disclose wherein the circuitry of the consumer module is configured to set the chunk size by writing a programmable setting to a location accessible by the video encoder, the programmable setting defining the desired unit of consumption, and wherein the video encoder is configured to read the chunk size from the location ([0039], “the decoder may employ a back-channel for transmitting information from the decoder to the encoder 200, such as information concerning decoding capabilities, information concerning available buffers (i.e., memory) and buffer allocation, and information concerning data errors.” Note, the chunk size is interpreted as an amount of data for buffering and packetizing, and the location accessible by the encoder is where the back-channel is interfacing with the encoder for the encoder to read). The same motivation of claim 1 applies to claim 7.
Regarding claim 8, the limitations are the same as those in claim 1; however, written as a process claim instead of an apparatus claim. Therefore, the same rationale of claim 1 applies equally as well to claim 8.
Regarding claim 9, the limitations are the same as those in claim 2. Therefore, the same rationale of claim 2 applies equally as well to claim 9.
Regarding claim 12, the limitations are the same as those in claim 5. Therefore, the same rationale of claim 5 applies equally as well to claim 12.
Regarding claim 14, the limitations are the same as those in claim 7. Therefore, the same rationale of claim 7 applies equally as well to claim 14.
Regarding claim 15, the limitations are the same as those in claim 1. Therefore, the same rationale of claim 1 applies equally as well to claim 15.
Regarding claim 18, the limitations are the same as those in claim 4. Therefore, the same rationale of claim 4 applies equally as well to claim 18.
Regarding claim 20, the limitations are the same as those in claim 7. Therefore, the same rationale of claim 7 applies equally as well to claim 20.
Claim(s) 3, 4, 10, 11, 16, and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Publication No. 2015/0281705 A1 (hereinafter “Wang”) in view of U.S. Publication No. 2011/0194439 A1 (hereinafter “Maze”), further in view of U.S. Publication No. 2002/0092030 A1 (hereinafter “Gu”), even further in view of U.S. Publication No. 2005/0152400 A1 (hereinafter “Suzuki”), and even more in further in view of U.S. Publication No. 2014/0176586 A1 (hereinafter “Gruber”).
Regarding claim 3, Wang, Maze, Gu, and Suzuki disclose every limitation of claim 1, as outlined above. Wang, Maze, Gu, and Suzuki fail to expressly disclose Additionally, Gruber discloses wherein the indication comprises a memory address.
However, Gruber teaches wherein the indication comprises a memory address ([0065], “A read request may specify a memory address or a range of memory addresses from which data should be returned to the requester. A write request may specify a memory address or a range of memory addresses to which specified data should be written. The data to be written may be supplied to memory controller 20 by the requester (e.g., CPU 6 and/or GPU 10) via one or more data busses in conjunction with the write request. In some examples, the data to be written may form a part of the write request. In response to receiving memory access requests, memory controller 20 may issue one or more read commands to memory 22 and/or one or more write commands to memory 22 to service the read and write requests.” The data transfer described in paragraphs [0128-0129] defines an amount of data across a range of memory addresses. Therefore, it is understood in the combination with Wang and Suzuki, the buffer size identifies a range of memory addresses allocated for the data).
Before the effective filing date of the claimed invention, it would have been obvious to a person having ordinary skill in the art to have used memory addresses in buffer indicators, as taught by Gruber ([0065]), in Wang, Maze, Gu, and Suzuki’s invention. One would have been motivated to modify Wang, Maze, Gu, and Suzuki’s invention, by incorporating Gu’s invention, because it is an obvious buffer management technique for improving buffer threshold levels in synchronized reading and writing operations that prevent overflow and underflow.
Regarding claim 4, Wang, Maze, Gu, and Suzuki, and Gruber disclose every limitation of claim 3, as outlined above. Additionally, Gruber discloses wherein the memory address identifies a location in the buffer that contains most recently written data ([0128-0131] describes sequential reading and writing operations, which comprise a range of memory addresses, as per [0065], of which one address will be the most recently populated memory address). The same motivation of claim 1 applies to claim 3.
Regarding claim 10, the limitations are the same as those in claim 3. Therefore, the same rationale of claim 3 applies equally as well to claim 10.
Regarding claim 11, the limitations are the same as those in claim 4. Therefore, the same rationale of claim 4 applies equally as well to claim 11.
Regarding claim 16, the limitations are the same as those in claim 2. Therefore, the same rationale of claim 2 applies equally as well to claim 16.
Regarding claim 17, the limitations are the same as those in claim 3. Therefore, the same rationale of claim 3 applies equally as well to claim 17.
Claim(s) 6, 13, and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Publication No. 2015/0281705 A1 (hereinafter “Wang”) in view of U.S. Publication No. 2011/0194439 A1 (hereinafter “Maze”), further in view of U.S. Publication No. 2002/0092030 A1 (hereinafter “Gu”), even further in view of U.S. Publication No. 2005/0152400 A1 (hereinafter “Suzuki”), and even more in further in view of Hoffman et al., “RTP Payload Format for MPEG1/MPEG2 Video” (hereinafter “Hoffman”).
Regarding claim 6, Wang, Maze, Gu, and Suzuki disclose all of the limitations of claim 1, as outlined above. Wang, Maze, Gu, and Suzuki fail to expressly disclose wherein the circuitry of the consumer module is configured to retrieve a final amount of encoded video data from the buffer when the final amount is less than the chunk size, responsive to detecting a frame completion flag that indicates encoding of a video frame has been completed is set.
However, Hoffman discloses wherein the circuitry of the consumer module is configured to retrieve a final amount of encoded video data from the buffer when the final amount is less than the chunk size, responsive to detecting a frame completion flag that indicates encoding of a video frame has been completed is set (Section 3.3, p. 7, “M bit: For video, set to 1 on packet containing MPEG frame end code, 0 otherwise:” e.g., flag indicating the end of the MPEG frame. Note, dependent on the size of the remaining frame, the end of the MPEG frame is consumed and can be less than the buffer fullness).
Before the effective filing date of the claimed invention, it would have been obvious to a person having ordinary skill in the art to have a payload size respective to a final MPEG frame portion, as taught by Hoffman (Section 3.3), in Wang, Maze, Gu, and Suzuki’s invention. One would have been motivated to modify Wang, Maze, Gu, and Suzuki’s invention, by incorporating Hoffman’s invention, to conform with MPEG standard practices for optimized packetization scheme to transport MPEG video (Hoffman: Section 1).
Regarding claim 13, the limitations are the same as those in claim 6. Therefore, the same rationale of claim 6 applies equally as well to claim 13.
Regarding claim 19, the limitations are the same as those in claim 6. Therefore, the same rationale of claim 6 applies equally as well to claim 19.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 11,252,429 (hereinafter “Patent ‘429”). Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the instant application are entirely anticipated by Patent ‘429.
Conclusion
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/STUART D BENNETT/Examiner, Art Unit 2481