Prosecution Insights
Prosecution Insights
Technology areas: Computing & Software • Semiconductors, Circuits & Optics
108 pending office actions • 63 art units • 105 examiners • 0 of 108 (0%) have an AI response strategy ready • 218 patents granted in the last 365 days
Amd manages a large portfolio of 107 pending office actions in the Computing & Software technology area. These actions are distributed among 104 distinct examiners and 63 distinct art units. The busiest examiner, LEE, ERIC D, is responsible for 2 pending office actions.
The scale of the portfolio is evident in the 107 pending office actions, which are spread across 104 distinct examiners. This high number of examiners indicates that the company faces a wide variety of individual examination styles. Furthermore, the 63 distinct art units involved suggest that the company's computing and software technologies are extremely diverse, touching dozens of specialized groups at the patent office.
With the busiest examiner, LEE, ERIC D, handling only 2 pending office actions, the prosecution risk is highly fragmented. No single individual has a dominant influence over the 107 pending actions. Practitioners must navigate 63 distinct art units and 104 distinct examiners, requiring a highly coordinated and adaptable strategy to maintain consistency across the Computing & Software portfolio.
Based on the USPTO statutory response window for each pending office action. 41 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.
Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 41 of the docket's apps have a known mailing date.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §101 only | 1 (1%) |
| §101 + other | 9 (8%) |
| §103 only | 46 (43%) |
| §102 only | 9 (8%) |
| §112 only | 5 (5%) |
| Double-patenting + other | 2 (2%) |
| Multi-statute (no §101) | 36 (33%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| LEE, ERIC D | 2 | 81.4% | +19.4% |
| CLEARY, THOMAS J | 2 | 72.8% | +15.8% |
| RIGGINS, ARI FAITH COLEMA | 2 | 50.0% | +80.0% |
| CHAPPELL, DANIEL C | 1 | 80.8% | +45.8% |
| LAUTURE, JOSEPH J | 1 | 95.0% | +0.9% |
| WONG, TITUS | 1 | 77.5% | +19.6% |
| MAI, LAM T | 1 | 96.1% | +0.9% |
| MAYE, AYUB A | 1 | 57.8% | +41.3% |
| HOANG, HIEU T | 1 | 80.9% | +16.3% |
| CHERY, MARDOCHEE | 1 | 88.5% | +10.3% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 5 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 19232658 | LOCALIZED AND RELOCATABLE SOFTWARE PLACEMENT AND NOC-BASED ACCESS TO MEMORY CONTROLLERS | CHAPPELL, DANIEL C | — |
| 19015963 | DYNAMIC DATA CONVERSION FOR NETWORK COMPUTER SYSTEMS | LAUTURE, JOSEPH J | — |
| 18999290 | ADAPTIVE QUANTIZATION AND COMPRESSION FOR VARIABLE-LENGTH COLLECTIVE COMMUNICATION | MAI, LAM T | — |
| 18589398 | MODULAR INTERCONNECT FOR AN INTEGRATED CIRCUIT DEVICE | LEE, ERIC D | — |
| 18139659 | PREDICTION OF ROUTING CONGESTION | LEE, ERIC D | — |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 8 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 19040546 | HUE-ADAPTIVE SATURATION INCREASE FOR OLED DISPLAY POWER REDUCTION | PIZIALI, JEFFREY J | 88d overdue |
| 17954183 | DIVERSIFIED VIRTUAL MEMORY | LIN, HSING CHUN | 42d overdue |
| 18346017 | SYSTEMS AND METHODS FOR MEMORY MANAGEMENT | TALUKDAR, ARVIND | 17d overdue |
| 18620732 | SOURCE BASED LOCAL DIMMING | BOCAR, DONNA V | 15d overdue |
| 17894873 | FRACTIONAL LOGARITHMIC NUMBER SYSTEM ADDER | BUI, KENNY KIM | 3d overdue |
| 18215685 | HIGH-BANDWIDTH THREE-DIMENSIONAL (3D) DIE STACK | BRASFIELD, QUINTON A | 7d |
| 18394668 | AN AREA AND POWER EFFICIENT CLOCK DATA RECOVERY (CDR) AND ADAPTATION IMPLEMENTATION FOR DENSE WAVELENGTH-DIVISION MULTIPLEXING (DWDM) OPTICAL LINKS | BAIG, ADNAN | 28d |
| 18530020 | SCALABLE PAIRINGS OF CHIPLETS OF A DISPLAY CONTROL CIRCUIT | SUN, CHARLIE | 33d |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 8 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18346070 | Mitigation Of Undershoot And Overshoot On A Power Rail | CLEARY, THOMAS J | 22d overdue |
| 19232658 | LOCALIZED AND RELOCATABLE SOFTWARE PLACEMENT AND NOC-BASED ACCESS TO MEMORY CONTROLLERS | CHAPPELL, DANIEL C | — |
| 19006047 | PROTOCOL ENHANCEMENTS FOR LOW LATENCY APPLICATIONS | WONG, TITUS | — |
| 18981128 | A MULTI-DIE RING OSCILLATOR WITH SPLIT ENTROPY FOR SECURITY AND PHYSICAL UNCLONABLE FUNCTION (PUF) APPLICATIONS | MAYE, AYUB A | — |
| 18978089 | TIMED FABRIC ACCESS WITH PRE-SCHEDULED ALLOCATION | HOANG, HIEU T | — |
| 18898370 | OFFLOADING OPERATIONS USING A NETWORK INTERFACE CONTROLLER | CHERY, MARDOCHEE | — |
| 18589398 | MODULAR INTERCONNECT FOR AN INTEGRATED CIRCUIT DEVICE | LEE, ERIC D | — |
| 18139659 | PREDICTION OF ROUTING CONGESTION | LEE, ERIC D | — |
| Art Unit | Apps |
|---|---|
| 2175 | 5 |
| 2197 | 4 |
| 2196 | 4 |
| 2851 | 4 |
| 2199 | 3 |
| 3715 | 3 |
| 2176 | 3 |
| 2195 | 3 |
| 2139 | 2 |
| 2436 | 2 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 19232658 | LOCALIZED AND RELOCATABLE SOFTWARE PLACEMENT AND NOC-BASED ACCESS TO MEMORY CONTROLLERS | CHAPPELL, DANIEL C | 2139 | §103DP | Non-Final OA | — | Pending | Jun 09, 2025 |
| 19015963 | DYNAMIC DATA CONVERSION FOR NETWORK COMPUTER SYSTEMS | LAUTURE, JOSEPH J | — | §112 | Non-Final OA | — | Pending | Jan 10, 2025 |
| 19006047 | PROTOCOL ENHANCEMENTS FOR LOW LATENCY APPLICATIONS | WONG, TITUS | 2181 | §112 | Non-Final OA | — | Pending | Dec 30, 2024 |
| 18999290 | ADAPTIVE QUANTIZATION AND COMPRESSION FOR VARIABLE-LENGTH COLLECTIVE COMMUNICATION | MAI, LAM T | 2845 | §112 | Non-Final OA | — | Pending | Dec 23, 2024 |
| 18981128 | A MULTI-DIE RING OSCILLATOR WITH SPLIT ENTROPY FOR SECURITY AND PHYSICAL UNCLONABLE FUNCTION (PUF) APPLICATIONS | MAYE, AYUB A | 2436 | §103 | Non-Final OA | — | Pending | Dec 13, 2024 |
| 18978089 | TIMED FABRIC ACCESS WITH PRE-SCHEDULED ALLOCATION | HOANG, HIEU T | 2449 | §101§103 | Final Rejection | — | Pending | Dec 12, 2024 |
| 18898370 | OFFLOADING OPERATIONS USING A NETWORK INTERFACE CONTROLLER | CHERY, MARDOCHEE | 2133 | §102§103 | Non-Final OA | — | Pending | Sep 26, 2024 |
| 18807703 | IIC WITH ADAPTIVE CHIP-TO-CHIP INTERFACE TO SUPPORT DIFFERENT CHIP-TO-CHIP PROTOCOLS | PHAN, RAYMOND NGAN | 2175 | §102Other | Final Rejection | 4d overdue | Pending | Aug 16, 2024 |
| 18784251 | MEMORY DEFRAGMENTATION IN PROGRAMMABLE INTEGRATED CIRCUIT DEVICES | JUNG, ANDREW J | 2175 | §103 | Non-Final OA | 32d overdue | Pending | Jul 25, 2024 |
| 18778625 | CONTENT ADAPTIVE DATATYPE | LY, CHEYNE D | 2152 | §103 | Final Rejection | 2d overdue | Pending | Jul 19, 2024 |
| 18758280 | DYNAMICALLY POOLED ALLOCATIONS OF MEMORY BUFFERS ON SPATIAL COMPUTE ARCHITECTURES | MACASIANO, JOANNE GONZALES | 2197 | §102§103Other | Non-Final OA | — | Pending | Jun 28, 2024 |
| 18759722 | TRANSMISSION AND PROCESSING OF DATA IN PARALLEL SYSTEMS | JACOB, AJITH | 2161 | §103 | Non-Final OA | 13d | Pending | Jun 28, 2024 |
| 18731006 | UNALIGNED LOAD AND STORE IN A CORE | VICARY, KEITH E | 2183 | §103§112 | Non-Final OA | — | Pending | May 31, 2024 |
| 18658906 | EDGE COUPLER BEAM DEFLECTION SYSTEM | SMITH, CHAD | 2874 | §102§103 | Final Rejection | — | Pending | May 08, 2024 |
| 18589398 | MODULAR INTERCONNECT FOR AN INTEGRATED CIRCUIT DEVICE | LEE, ERIC D | — | §102 | Non-Final OA | — | Pending | Feb 27, 2024 |
| 18443243 | MULTI-WAVELENGTH POLARIZATION DIVERSIFIED OPTICAL RECEIVER CONFIGURATION | CONNELLY, MICHELLE R | 2874 | §102§103 | Non-Final OA | — | Pending | Feb 15, 2024 |
| 18394668 | AN AREA AND POWER EFFICIENT CLOCK DATA RECOVERY (CDR) AND ADAPTATION IMPLEMENTATION FOR DENSE WAVELENGTH-DIVISION MULTIPLEXING (DWDM) OPTICAL LINKS | BAIG, ADNAN | 2461 | §103§112 | Final Rejection | 28d | Pending | Dec 22, 2023 |
| 18389974 | REDUCTION OF STUCK CHANNELS AT A NEURAL NETWORK | WOOLWINE, SHANE D | — | §102§103 | Non-Final OA | — | Pending | Dec 20, 2023 |
| 18535491 | FINE-TUNING OF NEURAL NETWORKS | RYLANDER, BART I | — | §103 | Non-Final OA | — | Pending | Dec 11, 2023 |
| 18526364 | SUBSTRATE NOISE ISOLATION STRUCTURES FOR ELECTRONIC DEVICES | MILLER, ALEXANDER MICHAEL | 2898 | §102§103§112 | Non-Final OA | — | Pending | Dec 01, 2023 |
| 18509189 | SIMULATING DATA TRANSFERS FOR HIGH-LEVEL SYNTHESIS DESIGNS | DINH, PAUL | — | §102 | Non-Final OA | — | Pending | Nov 14, 2023 |
| 18501868 | SYSTEMS AND METHODS FOR TASK MANAGEMENT | KIM, SISLEY NAHYUN | 2196 | §103 | Final Rejection | 1d overdue | Pending | Nov 03, 2023 |
| 18384302 | APPARATUS AND METHOD OF PRINTING SOLDER ON PRINTED CIRCUIT BOARD FOR WARPAGE COMPENSATION | LEGASPI, EUGENE REY DEVERA | — | §103§112 | Non-Final OA | — | Pending | Oct 26, 2023 |
| 18381052 | EFFICIENT METHOD FOR THE LATCH TIMING ANALYSIS OF ELECTRONIC DESIGNS | GARBOWSKI, LEIGH M | — | §103§112 | Non-Final OA | — | Pending | Oct 17, 2023 |
| 18474158 | THERMALLY AWARE STACKING TOPOLOGY | CHA, GRACE YEH-EUN SAET | 2897 | §102§103 | Non-Final OA | — | Pending | Sep 25, 2023 |
| 18474138 | TEMPERATURE SENSORS IN DIE PAIR TOPOLOGY | TRAN, DZUNG | 2893 | §103 | Non-Final OA | 42d | Pending | Sep 25, 2023 |
| 18371937 | CO-SIMULATION ON A SYSTEM-ON-CHIP | GEBRESILASSIE, KIBROM K | — | §102§103 | Non-Final OA | — | Pending | Sep 22, 2023 |
| 18471114 | DEVICES, SYSTEMS, AND METHODS FOR A PROGRAMMABLE THREE-DIMENSIONAL SEMICONDUCTOR POWER DELIVERY NETWORK | CHOU, SHIH TSUN A | 2811 | §103 | Non-Final OA | — | Pending | Sep 20, 2023 |
| 18242246 | RANDOMIZATION OF INSTRUCTION EXECUTION FLOW FOR GLITCH PROTECTION | CHEN, ZHI | 2196 | §103 | Non-Final OA | — | Pending | Sep 05, 2023 |
| 18241140 | STIFFENER WITH INTEGRATED CONNECTORS | RAMOS-DIAZ, FERNANDO JOSE | 2818 | §103 | Final Rejection | 1d overdue | Pending | Aug 31, 2023 |
| 18226193 | SYSTEM-ON-CHIP HAVING MULTIPLE CIRCUITS AND MEMORY CONTROLLER IN SEPARATE AND INDEPENDENT POWER DOMAINS | AYASH, MARWAN | 2133 | §103§112 | Non-Final OA | — | Pending | Jul 25, 2023 |
| 18346017 | SYSTEMS AND METHODS FOR MEMORY MANAGEMENT | TALUKDAR, ARVIND | 2132 | §102§103 | Non-Final OA | 17d overdue | Pending | Jun 30, 2023 |
| 18216314 | HARDWARE-BASED ACCELERATOR SIGNALING | WU, QING YUAN | 2199 | §103 | Final Rejection | 8d overdue | Pending | Jun 29, 2023 |
| 18215685 | HIGH-BANDWIDTH THREE-DIMENSIONAL (3D) DIE STACK | BRASFIELD, QUINTON A | 2814 | §102§103 | Final Rejection | 7d | Pending | Jun 28, 2023 |
| 18214381 | BUILDING MULTI-DIE FPGAS USING CHIP-ON-WAFER TECHNOLOGY | PIZARRO CRESPO, MARCOS D | 2814 | §102§103§112 | Final Rejection | — | Pending | Jun 26, 2023 |
| 18213647 | 8-T SRAM BITCELL FOR FPGA PROGRAMMING | TRAN, ANTHAN | 2825 | §102 | Non-Final OA | 30d overdue | Pending | Jun 23, 2023 |
| 18211465 | SYNTHESIS OF SIMULATION-DIRECTED STATEMENTS | KIK, PHALLAKA | 2851 | §103 | Non-Final OA | — | Pending | Jun 19, 2023 |
| 18204658 | SELF-AUTHENTICATION OF DATA STORED OFF-CHIP | LANIER, BENJAMIN E | 2437 | §103 | Final Rejection | 12d | Pending | Jun 01, 2023 |
| 18139659 | PREDICTION OF ROUTING CONGESTION | LEE, ERIC D | 2851 | §103 | Final Rejection | — | Pending | Apr 26, 2023 |
| 18065491 | SYNTHESIS FOR MATRIX MULTIPLICATION USING A DATA PROCESSING ARRAY | DUONG, HUY | — | §101§102§103 | Non-Final OA | — | Pending | Dec 13, 2022 |
| 17894873 | FRACTIONAL LOGARITHMIC NUMBER SYSTEM ADDER | BUI, KENNY KIM | 2182 | §101§103§112 | Final Rejection | 3d overdue | Pending | Aug 24, 2022 |
| 17892852 | SOFTMAX AND LOG SOFTMAX METHOD AND SYSTEM | OCHOA, JUAN CARLOS | 2186 | §101 | Non-Final OA | — | Pending | Aug 22, 2022 |
| 17867625 | ADAPTIVE MATRIX MULTIPLIERS | SANDIFER, MATTHEW D | 2151 | §112 | Non-Final OA | 55d | Pending | Jul 18, 2022 |
| 17712052 | METHOD OF TESTING STRUCTURES AND STACKING WAFERS | GOODWIN, DAVID J | 2817 | §103 | Final Rejection | — | Pending | Apr 01, 2022 |
| 19093097 | AUTOMATED DATA-DRIVEN SYSTEM TO OPTIMIZE OVERCLOCKING | ABBASZADEH, JAWEED A | — | §102§103Other | Non-Final OA | — | Pending | Mar 27, 2025 |
| 19040546 | HUE-ADAPTIVE SATURATION INCREASE FOR OLED DISPLAY POWER REDUCTION | PIZIALI, JEFFREY J | 2628 | §103§112 | Non-Final OA | 88d overdue | Pending | Jan 29, 2025 |
| 19007218 | DYNAMIC VOLTAGE MARGIN ADJUSTMENT BASED ON WORKLOAD CHARACTERISTICS | CLEARY, THOMAS J | 2175 | §102§103§112 | Non-Final OA | — | Pending | Dec 31, 2024 |
| 18984729 | Identification of Accelerator Location | CHEN, BIAO | 2611 | §103 | Non-Final OA | — | Pending | Dec 17, 2024 |
| 18898851 | MULTI-HOST REMOTE MEMORY ACCESS | MA, WEI | 2135 | §103§112 | Non-Final OA | — | Pending | Sep 27, 2024 |
| 18896418 | METHODS AND SYSTEMS FOR SYNCHRONIZING TRUSTED OPERATING SYSTEMS | CARNES, THOMAS A | 2436 | §103 | Final Rejection | — | Pending | Sep 25, 2024 |
IP Author helps IP teams respond to office actions faster with AI-generated responses, examiner analytics, and prosecution intelligence.
Start Free TrialAmd has 108 pending office actions as of October 2026, spread across 63 art units and 105 examiners.
Eric D Lee has the most, with 2 of Amd's pending office actions.
Mostly Computing & Software (USPTO Tech Center 2100), based on where its pending office actions are examined.