DETAILED ACTION
This Office Action is sent in response to Applicant’s Communication received 19 Feb 2026 for application number 17/591,934. The Office hereby acknowledges receipt of the following and placed of record in file: Applicant Arguments/Remarks, and Claims.
Claims 1-7 and 9-24 are presented for examination. Elected claims 1-7, 9, 11-14, and 18 are examined below. Non-elected claims 10, 15-17, and 19-24 have been withdrawn.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
The objections to claims 1-7, 9, 11-14, and 18, 7, 9, 13, and 14 have been removed in light of amendments.
Regarding arguments towards the 103 rejections, Applicant’s arguments with respect to claim(s) have been considered but are moot because of new grounds of rejection necessitated by amendment; see the Rejection below for prior art mappings and explanations.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-7, 9, 11-13, and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Armitage et al. [hereinafter as Armitage] (US 2022/0190024 A1 – relies on provisional application filing date of 14 Dec 2020) in view of Kashimoto et al. [hereinafter as Kashimoto] (US 2016/0149085 A1) further in view of Engl et al. [hereinafter as Engl] (US 2011/0101390 A1).
In reference to claim 1, Armitage teaches A light-emitting device comprising:
a plurality of light-emitting cells [each stack of layers 110-118, hereinafter as “CLS”, being a light-emitting cell; Fig. 7, paras 0068-0069], each of the plurality of light-emitting cells being configured to independently emit light [each cell can produce light];
a common semiconductor layer [n-type current spreading layer 108] provided on the plurality of light-emitting cells [CLS];
a single first electrode [cathode contact metal 138; Fig. 7, para 0071] provided on the common semiconductor layer [108]; and
a plurality of second electrodes [anode contact 136] provided spaced apart [136 and 138 spaced apart] from the single first electrode [138] and from each other and respectively provided on the plurality of light-emitting cells [CLS];
a first wiring [connection between 138 and driver circuitry] connecting the first single electrode [138] to a driving layer [para 0073 discloses driver circuitry]; and
a plurality of second wirings [connection between 136 and driver circuitry] connecting the plurality of second electrodes [136] to the driving layer [para 0073 discloses driver circuitry],
wherein the single first electrode [138] extends toward an upper surface [138 extends up the sides of CLS] of at least one of the plurality of light-emitting cells [CLS] along a side surface [138 extends up] of at least one of the plurality of light-emitting cells [CLS].
However, Armitage does not explicitly teach the first electrode is provided on the upper surface of the at least one of the plurality of light-emitting cells.
Armitage and Kashimoto teach the first electrode [n-side electrode 5a of Kashimoto; Fig. 11C, para 0091] is provided on the upper surface [5a of Kashimoto is provided on upper surface of light-emitting cells, and would analogously be provided on the upper surface of CLS of Armitage] of the at least one of the plurality of light-emitting cells [CLS of Armitage].
It would have been obvious to one of ordinary skill in art, absent unexpected results, having the teachings of Armitage and Kashimoto before the effective filing date of the claimed invention, to include the electrode as disclosed by Kashimoto into the LED device of Armitage in order to obtain a LED device with an electrode that is provided on upper surfaces of a light-emitting cells.
One of ordinary skill in the art would be motivated to obtain a LED device with an electrode that is provided on upper surfaces of a light-emitting cells to provide the predictable result of providing more uniform current distribution for efficient light generation and preventing localized overheating.
However, Armitage and Kashimoto do not explicitly teach wherein when the plurality of light-emitting cells comprises a first light-emitting cell does not emit light and second light-emitting cell emits light, a current flow is concentrated on the second light-emitting cell as the second wiring connected to the first light-emitting cell is cut to maintain luminance of the light-emitting device.
Engl teaches wherein when the plurality of light-emitting cells comprises a first light-emitting cell does not emit light and second light-emitting cell emits light, a current flow is concentrated on the second light-emitting cell as the second wiring connected to the first light-emitting cell is cut to maintain luminance of the light-emitting device [Fig. 3, paras 0090-0093 discloses a switch controls current flow to a right-hand or left-hand side of the device, i.e. current flows for the desired portions and cut from the undesired portion; thus, the desired portion produces light, while the cut portion does not].
It would have been obvious to one of ordinary skill in art, absent unexpected results, having the teachings of Armitage, Kashimoto, and Engl before the effective filing date of the claimed invention, to include the current flow regulation as disclosed by Engl into the LED device of Armitage and Kashimoto in order to obtain a LED device that varies current flow to light-emitting cells.
One of ordinary skill in the art would be motivated to obtain a LED device that varies current flow to light-emitting cells to provide the predictable result of achieving a different light yield [Engl, para 0093].
In reference to claim 2, Armitage, Kashimoto, and Engl teach the invention of claim 1.
Armitage teaches The light-emitting device of claim 1, wherein the plurality of light-emitting cells [CLS] are provided spaced apart [CLS are spaced apart from each other] from each other on a first surface of the common semiconductor layer [108].
In reference to claim 3, Armitage, Kashimoto, and Engl teach the invention of claim 1.
Armitage teaches The light-emitting device of claim 1, wherein a width of each of the plurality of light-emitting cells [CLS] is less than a width [width of CLS is less than width of 108] of the common semiconductor layer [108].
In reference to claim 4, Armitage, Kashimoto, and Engl teach the invention of claim 1.
Armitage teaches The light-emitting device of claim 1, wherein at least one of the plurality of light-emitting cells [CLS] comprises a first semiconductor layer [n-type layer 114], an active layer [electroluminescence quantum well 116], and a second semiconductor layer [p-type layer 118], which are sequentially provided [114, 116, and 118 are sequentially provided].
In reference to claim 5, Armitage, Kashimoto, and Engl teach the invention of claim 4.
Armitage teaches The light-emitting device of claim 4, wherein each of the plurality of second electrodes [136] is provided on [136 is on 118] the second semiconductor layer [118].
In reference to claim 6, Armitage, Kashimoto, and Engl teach the invention of claim 4.
Armitage teaches The light-emitting device of claim 4, wherein a material of the first semiconductor layer [114] is the same as a material [para 0035,0036 discloses n-type III-V materials] of the common semiconductor layer [108].
In reference to claim 7, Armitage, Kashimoto, and Engl teach the invention of claim 1.
Armitage teaches The light-emitting device of claim 1, wherein the single first electrode [138] is provided on a first surface [138 is on surface of 108] of the common semiconductor layer [108] on which the plurality of light-emitting cells [CLS] are provided.
In reference to claim 9, Armitage, Kashimoto, and Engl teach the invention of claim 1.
Armitage teaches The light-emitting device of claim 1, further comprising: a first insulating layer [dielectric layer 126] provided between [126 is between 138 and CLS] the single first electrode [138] and the plurality of light-emitting cells [CLS].
In reference to claim 11, Armitage, Kashimoto, and Engl teach the invention of claim 1.
Armitage teaches The light-emitting device of claim 1, wherein the plurality of light-emitting cells [CLS] are symmetrical with respect to a center axis of the light-emitting device [Figs. 6B and 7 depict symmetry of the CLS].
In reference to claim 12, Armitage, Kashimoto, and Engl teach the invention of claim 1.
Armitage teaches The light-emitting device of claim 1, wherein the plurality of second electrodes [136] are symmetrical with respect to a center axis of the light-emitting device [Figs. 6B and 7 depict symmetry of 136].
In reference to claim 13, Armitage, Kashimoto, and Engl teach the invention of claim 1.
Armitage teaches The light-emitting device of claim 1, wherein the single first electrode [138] is symmetrical with respect to a center axis of the light-emitting device [Figs. 6B and 7 depict symmetry of 138].
In reference to claim 18, Armitage, Kashimoto, and Engl teach the invention of claim 1.
Armitage teaches The light-emitting device of claim 1, wherein an outer circumferential surface of the common semiconductor layer [108] has at least one of a circular shape, an oval shape, and a polygonal shape [Fig. 6B, para 0032 discloses a top view of a device, depicting a polygonal shape].
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Armitage in view of Kashimoto further in view of Engl further in view of Lee et al. [hereinafter as Lee] (US 2012/0326171 A1).
In reference to claim 14, Armitage, Kashimoto, and Engl teach the invention of claim 1.
Armitage teaches first electrode [138] and the plurality of second electrodes [136].
However, while Armitage teaches a transparent conductive oxide layer 130, Armitage, Kashimoto, and Engl do not explicitly teach The light-emitting device of claim 1, wherein at least one of the single first electrode and the plurality of second electrodes is transparent.
Lee teaches The light-emitting device of claim 1, wherein at least one of the single first electrode and the plurality of second electrodes is transparent [Fig. 17b, para 0051 discloses a transparent electrode layer 29].
It would have been obvious to one of ordinary skill in art, absent unexpected results, having the teachings of Armitage, Kashimoto, Engl, and Lee before the effective filing date of the claimed invention, to include the transparent electrode as disclosed by Lee into the LED device of Armitage, Kashimoto, and Engl in order to obtain a LED device with a transparent electrode.
One of ordinary skill in the art would be motivated to obtain a LED device with a transparent electrode to provide the predictable result of dispersing light to increase a light emitting area of a LED [Lee, para 0007].
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDREW CHUNG whose telephone number is (571)272-5237. The examiner can normally be reached M-F 9-5pm.
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/ANDREW CHUNG/
Examiner, Art Unit 2898
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