DETAILED ACTION
This Office Action is sent in response to Applicant’s Communication received 25 Nov 2025 for application number 17/622,336. The Office hereby acknowledges receipt of the following and placed of record in file: Applicant Arguments/Remarks, and Claims.
Claims 1-18 and 20 are presented for examination. Elected claims 1-3, 6, 9-13, 16, and 20 are examined below. Non-elected claims 4-5, 7-8, 14-15, and 17-18 have been withdrawn.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 16 is objected to because of the following informalities: the phrase, “the second opening”, on line 10, lacks antecedent basis. The claim is expected to read as corresponding claim 6, regarding “the second opening”; claim 16 has been interpreted as such. Appropriate correction is required.
Response to Arguments
Regarding claim 1, Applicant contends that the prior art does not teach the limitations of the amended claims; Examiner respectfully disagrees. Luo and Okamoto teach:
at least one first opening [opening of layer 2 and conductive layer 3/4 of Okamoto; Fig. 1, para 0070; analogously, first opening of Luo; see annotated Fig. 9] is defined in the first base [first base of Luo; analogously, layer 2 of Okamoto; Fig. 1, para 0070] and the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto], the first opening [opening of 2 and 3/4 of Okamoto; analogously, first opening of Luo] completely penetrates the first base [first base of Luo; analogously, 2 of Okamoto] and the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto] in a direction perpendicular to the first base [first base of Luo; analogously, 2 of Okamoto];
a bridging terminal [conductive pillars Z2/Z3 of Luo; Fig. 9, para 0073; analogously, conductor 7 of Okamoto; Fig. 1, para 0070] is disposed in the first opening [opening of 2 and 3/4 of Okamoto; analogously, first opening of Luo] of the first base [first base of Luo; analogously, 2 of Okamoto] and the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto], the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto] are electrically connected to the driving backplate [IC3,IC1,IC2 of Luo] through the bridging terminal [Z2/Z3 of Luo; analogously, 7 of Okamoto], and the bridging terminal [Z2/Z3 of Luo; analogously, 7 of Okamoto] is electrically connected to and in effective contact with a lateral surface of the first bonding terminals [D3,D2 of Luo; analogously, 7 of Okamoto is electrically connected to lateral surface of 3/4 of Okamoto], the lateral surface [lateral surface of 3/4 of Okamoto is cross section of opening of 2 and 3/4 of Okamoto] of the first bonding terminal [D3,D2 of Luo; analogously, 3/4 of Okamoto] being a cross section of the first bonding terminal exposed by the first opening [opening of 2 and ¾ of Okamoto; analogously, see annotated Fig. 9 of Luo for first opening].
Regarding claim 11, Applicant contends that the prior art does not teach the limitations of the amended claims; Examiner respectfully disagrees. Luo and Okamoto teach:
at least one first opening [opening of layer 2 and conductive layer 3/4 of Okamoto; Fig. 1, para 0070; analogously, first opening of Luo; see annotated Fig. 9] is defined in the first base [first base of Luo; analogously, layer 2 of Okamoto; Fig. 1, para 0070] and the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto], the first opening [opening of 2 and 3/4 of Okamoto; analogously, first opening of Luo] completely penetrates the first base [first base of Luo; analogously, 2 of Okamoto] and the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto] in a direction perpendicular to the first base [first base of Luo; analogously, 2 of Okamoto];
a bridging terminal [conductive pillars Z2/Z3 of Luo; Fig. 9, para 0073; analogously, conductor 7 of Okamoto; Fig. 1, para 0070] is disposed in the first opening [opening of 2 and 3/4 of Okamoto; analogously, first opening of Luo] of the first base [first base of Luo; analogously, 2 of Okamoto] and the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto], the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto] are electrically connected to the driving backplate [IC3,IC1,IC2 of Luo] through the bridging terminal [Z2/Z3 of Luo; analogously, 7 of Okamoto], and the bridging terminal [Z2/Z3 of Luo; analogously, 7 of Okamoto] is electrically connected to and in effective contact with a lateral surface of the first bonding terminals [D3,D2 of Luo; analogously, 7 of Okamoto is electrically connected to lateral surface of 3 of Okamoto], the lateral surface [lateral surface of 3/4 of Okamoto is cross section of opening of 2 and 3/4 of Okamoto] of the first bonding terminal [D3,D2 of Luo; analogously, 3/4 of Okamoto] being a cross section of the first bonding terminal exposed by the first opening [opening of 2 and 3/4 of Okamoto; analogously, see annotated Fig. 9 of Luo for first opening]; and
wherein a second bonding terminal [3/4 on different layer of Okamoto] is disposed on a side of the driving backplate [IC3,IC1,IC2 of Luo] facing the display substrate [display substrate of Luo; see annotated Fig. 9], and the first bonding terminals [D3,D2 of Luo; analogously, 7 of Okamoto is electrically connected to lateral surface of 3 of Okamoto] are electrically connected to the second bonding terminal [3/4 on different layer of Okamoto] through the bridging terminal [Z2/Z3 of Luo; analogously, 7 of Okamoto]; the first bonding terminals [D3,D2 of Luo; analogously, 7 of Okamoto is electrically connected to lateral surface of 3 of Okamoto] and the second bonding terminal [3/4 on different layer of Okamoto] are spaced apart in the direction perpendicular to the first base [first base of Luo; see annotated Fig. 9], and the first bonding terminals [D3,D2 of Luo; analogously, 7 of Okamoto is electrically connected to lateral surface of 3 of Okamoto] are disposed in a material layer different from that of the second bonding terminal [3/4 on different layer of Okamoto].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 9-11, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Luo et al. [hereinafter as Luo] (US 2021/0225901 A1) in view of Okamoto et al. [hereinafter as Okamoto] (JP 2006/156553).
In reference to claim 1, Luo teaches A display panel [Fig. 9, para 0120], comprising a driving backplate [chips IC3,IC1,IC2; Fig. 9, para 0073] and a display substrate [display substrate; see annotated Fig. 9] electrically connected to the driving backplate [IC3,IC1,IC2], wherein the display substrate [display substrate; see annotated Fig. 9] comprises:
a first base [first flexible base 11; Figs. 8-9, para 0109; i.e. first base; see annotated Fig. 9] disposed facing toward the driving backplate [IC3,IC1,IC2]; and
a plurality of first bonding terminals [conductive patterns D3,D2; Fig. 9, para 0073] disposed on a side of the first base [first base; see annotated Fig. 9] away from the driving backplate [D3,D2 on 11 away from IC3,IC1,IC2], wherein the display substrate [display substrate; see annotated Fig. 9] is bonded to the driving backplate [IC3,IC1,IC2] through the first bonding terminals [D3,D2] to realize electrical connection [bonded to IC3,IC1,IC2 through D3,D2 making electrical contact; see annotated Fig. 9],
wherein, in bonding regions of the display substrate [display substrate; see annotated Fig. 9] and the driving backplate [IC3,IC1,IC2], at least one first opening [first opening; see annotated Fig. 9] is defined in the first base [first base; see annotated Fig. 9].
However, Luo does not explicitly teach:
at least one first opening is defined in the first base and the first bonding terminals, the first opening completely penetrates the first base and the first bonding terminals in a direction perpendicular to the first base;
a bridging terminal is disposed in the first opening of the first base and the first bonding terminals, the first bonding terminals are electrically connected to the driving backplate through the bridging terminal, and the bridging terminal is electrically connected to and in effective contact with a lateral surface of the first bonding terminals, the lateral surface of the first bonding terminal being a cross section of the first bonding terminal exposed by the first opening.
Luo and Okamoto teach:
at least one first opening [opening of layer 2 and conductive layer 3/4 of Okamoto; Fig. 1, para 0070; analogously, first opening of Luo; see annotated Fig. 9] is defined in the first base [first base of Luo; analogously, layer 2 of Okamoto; Fig. 1, para 0070] and the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto], the first opening [opening of 2 and 3/4 of Okamoto; analogously, first opening of Luo] completely penetrates the first base [first base of Luo; analogously, 2 of Okamoto] and the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto] in a direction perpendicular to the first base [first base of Luo; analogously, 2 of Okamoto];
a bridging terminal [conductive pillars Z2/Z3 of Luo; Fig. 9, para 0073; analogously, conductor 7 of Okamoto; Fig. 1, para 0070] is disposed in the first opening [opening of 2 and 3/4 of Okamoto; analogously, first opening of Luo] of the first base [first base of Luo; analogously, 2 of Okamoto] and the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto], the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto] are electrically connected to the driving backplate [IC3,IC1,IC2 of Luo] through the bridging terminal [Z2/Z3 of Luo; analogously, 7 of Okamoto], and the bridging terminal [Z2/Z3 of Luo; analogously, 7 of Okamoto] is electrically connected to and in effective contact with a lateral surface of the first bonding terminals [D3,D2 of Luo; analogously, 7 of Okamoto is electrically connected to lateral surface of 3/4 of Okamoto], the lateral surface [lateral surface of 3/4 of Okamoto is cross section of opening of 2 and 3/4 of Okamoto] of the first bonding terminal [D3,D2 of Luo; analogously, 3/4 of Okamoto] being a cross section of the first bonding terminal exposed by the first opening [opening of 2 and 3/4 of Okamoto; analogously, see annotated Fig. 9 of Luo for first opening].
It would have been obvious to one having ordinary skill in the art before the time of filing to incorporate Okamoto’s bridging terminal configuration into Luo’s device for the benefit of having improved reliability of the electrical connection and reduced stress between the conductors [para 0082 & 0084].
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In reference to claim 9, Luo and Okamoto teach the invention of claim 1.
Luo teaches The display panel as claimed in claim 1, wherein a second bonding terminal [conductive pattern D1; Fig. 9, para 0073] is disposed on a side of the driving backplate [IC3,IC1,IC2] facing toward the display substrate [display substrate; see annotated Fig. 9], and the second bonding terminal [D1] is electrically connected to the first bonding terminals [D3,D2 and D1 are electrically connected].
In reference to claim 10, Luo and Okamoto teach the invention of claim 9.
Luo teaches The display panel as claimed in claim 9, wherein a number of the display substrate is plural, and the plurality of display substrates are arranged in an array manner on the driving backplate [at least one type of TFT Array and the plurality thereof formed on the side of 11 away from IC3,IC1,IC2; para 0070].
In reference to claim 11, Luo teaches A display device [Fig. 10, para 0122-0123], comprising a housing and a display panel [Fig. 9, para 0120], wherein an accommodating chamber is defined in the housing, the display panel is disposed in the accommodating chamber, wherein the display panel comprises a driving backplate [chips IC3,IC1,IC2; Fig. 9, para 0073] and a display substrate [display substrate; see annotated Fig. 9] electrically connected to the driving backplate [IC3,IC1,IC2], the display substrate comprises:
a first base [first flexible base 11; Figs. 8-9, para 0109; i.e. first base; see annotated Fig. 9] disposed facing toward the driving backplate [IC3,IC1,IC2]; and
a plurality of first bonding terminals [conductive patterns D3,D2; Fig. 9, para 0073] disposed on a side of the first base away from the driving backplate [D3,D2 on 11 away from IC3,IC1,IC2], wherein the display substrate [display substrate; see annotated Fig. 9] is bonded to the driving backplate [IC3,IC1,IC2] through the first bonding terminals [D3,D2] to realize electrical connection [bonded to IC3,IC1,IC2 through D3,D2 making electrical contact; see annotated Fig. 9], and
wherein, in bonding regions of the display substrate [display substrate; see annotated Fig. 9] and the driving backplate [IC3,IC1,IC2], at least one first opening [first opening; see annotated Fig. 9] is defined in the first base [first base; see annotated Fig. 9].
However, Luo does not explicitly teach:
at least one first opening is defined in the first base and the first bonding terminals, the first opening completely penetrates the first base and the first bonding terminals in a direction perpendicular to the first base;
a bridging terminal is disposed in the first opening of the first base and the first bonding terminals, the first bonding terminals are electrically connected to the driving backplate through the bridging terminal, and the bridging terminal is electrically connected to and in effective contact with a lateral surface of the first bonding terminals, the lateral surface of the first bonding terminal being a cross section of the first bonding terminal exposed by the first opening; and
wherein a second bonding terminal is disposed on a side of the driving backplate facing the display substrate, and the first bonding terminals are electrically connected to the second bonding terminal through the bridging terminal; the first bonding terminals and the second bonding terminal are spaced apart in the direction perpendicular to the first base, and the first bonding terminals are disposed in a material layer different from that of the second bonding terminal.
Luo and Okamoto teach:
at least one first opening [opening of layer 2 and conductive layer 3/4 of Okamoto; Fig. 1, para 0070; analogously, first opening of Luo; see annotated Fig. 9] is defined in the first base [first base of Luo; analogously, layer 2 of Okamoto; Fig. 1, para 0070] and the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto], the first opening [opening of 2 and 3/4 of Okamoto; analogously, first opening of Luo] completely penetrates the first base [first base of Luo; analogously, 2 of Okamoto] and the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto] in a direction perpendicular to the first base [first base of Luo; analogously, 2 of Okamoto];
a bridging terminal [conductive pillars Z2/Z3 of Luo; Fig. 9, para 0073; analogously, conductor 7 of Okamoto; Fig. 1, para 0070] is disposed in the first opening [opening of 2 and 3/4 of Okamoto; analogously, first opening of Luo] of the first base [first base of Luo; analogously, 2 of Okamoto] and the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto], the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto] are electrically connected to the driving backplate [IC3,IC1,IC2 of Luo] through the bridging terminal [Z2/Z3 of Luo; analogously, 7 of Okamoto], and the bridging terminal [Z2/Z3 of Luo; analogously, 7 of Okamoto] is electrically connected to and in effective contact with a lateral surface of the first bonding terminals [D3,D2 of Luo; analogously, 7 of Okamoto is electrically connected to lateral surface of 3 of Okamoto], the lateral surface [lateral surface of 3/4 of Okamoto is cross section of opening of 2 and 3/4 of Okamoto] of the first bonding terminal [D3,D2 of Luo; analogously, 3/4 of Okamoto] being a cross section of the first bonding terminal exposed by the first opening [opening of 2 and ¾ of Okamoto; analogously, see annotated Fig. 9 of Luo for first opening]; and
wherein a second bonding terminal [3/4 on different layer of Okamoto] is disposed on a side of the driving backplate [IC3,IC1,IC2 of Luo] facing the display substrate [display substrate of Luo; see annotated Fig. 9], and the first bonding terminals [D3,D2 of Luo; analogously, 7 of Okamoto is electrically connected to lateral surface of 3 of Okamoto] are electrically connected to the second bonding terminal [3/4 on different layer of Okamoto] through the bridging terminal [Z2/Z3 of Luo; analogously, 7 of Okamoto]; the first bonding terminals [D3,D2 of Luo; analogously, 7 of Okamoto is electrically connected to lateral surface of 3 of Okamoto] and the second bonding terminal [3/4 on different layer of Okamoto] are spaced apart in the direction perpendicular to the first base [first base of Luo; see annotated Fig. 9], and the first bonding terminals [D3,D2 of Luo; analogously, 7 of Okamoto is electrically connected to lateral surface of 3 of Okamoto] are disposed in a material layer different from that of the second bonding terminal [3/4 on different layer of Okamoto].
It would have been obvious to one having ordinary skill in the art before the time of filing to incorporate Okamoto’s bridging terminal configuration into Luo’s device for the benefit of having improved reliability of the electrical connection and reduced stress between the conductors [para 0082 & 0084].
In reference to claim 20, Luo and Okamoto teach the invention of claim 11.
The display device as claimed in claim 11, wherein a number of the display substrate is plural, and the plurality of display substrates are arranged in an array manner on the driving backplate.
Claim(s) 2-3 and 12-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Luo in view of Okamoto further in view of Lee et al. [hereinafter as Lee] (US 2016/0056188 A1).
In reference to claim 2, Luo and Okamoto teach the invention of claim 1.
However, Luo and Okamoto do not explicitly teach The display panel as claimed in claim 1, wherein the display substrate comprises an auxiliary conductive layer disposed in the first opening, and the first bonding terminals are electrically connected to the bridging terminal through the auxiliary conductive layer.
Luo, Okamoto, and Lee teach wherein the display substrate [display substrate of Luo; see annotated Fig. 9] comprises an auxiliary conductive layer [through via barrier layer 81B; Fig. 7A, para 0076] disposed in the first opening [opening of 2 and 3/4 of Okamoto; analogously, first opening of Luo and opening of plug 82 of Lee; Fig. 7A, para 0076], and the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto] are electrically connected to the bridging terminal [Z2/Z3 of Luo; analogously, 7 of Okamoto] through the auxiliary conductive layer [81B of Lee].
It would have been obvious to one having ordinary skill in the art before the time of filing to incorporate the teaching of Lee’s barrier liner (81B) on the sidewalls of the bridging interconnect/terminal on Luo’s device in order to provide a diffusion barrier for the bridging interconnect/terminal. Upon modification, the first bonding terminals would be electrically connected to the bridging terminal through the auxiliary conductive layer since the auxiliary conductive layer would be on the sidewalls of the bridging terminal [para 0009].
In reference to claim 3, Luo, Okamoto, and Lee teach the invention of claim 2.
Luo, Okamoto, and Lee teach The display panel as claimed in claim 2, wherein the auxiliary conductive layer [81b of Lee] covers surfaces of the first base [substrate 20; Fig. 7A, para 0073] in the first opening [opening of 2 and 3/4 of Okamoto; analogously, first opening of Luo and opening of plug 82 of Lee; Fig. 7A, para 0076] and the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto] in the first opening [opening of 2 and 3/4 of Okamoto; analogously, first opening of Luo and opening of 82 of Lee].
In reference to claim 12, Luo and Okamoto teach the invention of claim 11.
However, Luo and Okamoto do not explicitly teach The display device as claimed in claim 11, wherein the display substrate comprises an auxiliary conductive layer disposed in the first opening, and the first bonding terminals are electrically connected to the bridging terminal through the auxiliary conductive layer.
Luo, Okamoto, and Lee teach wherein the display substrate [display substrate of Luo; see annotated Fig. 9] comprises an auxiliary conductive layer [through via barrier layer 81B; Fig. 7A, para 0076] disposed in the first opening [opening of 2 and 3/4 of Okamoto; analogously, first opening of Luo and opening of plug 82 of Lee; Fig. 7A, para 0076], and the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto] are electrically connected to the bridging terminal [Z2/Z3 of Luo; analogously, 7 of Okamoto] through the auxiliary conductive layer [81B of Lee].
It would have been obvious to one having ordinary skill in the art before the time of filing to incorporate the teaching of Lee’s barrier liner (81B) on the sidewalls of the bridging interconnect/terminal on Luo’s device in order to provide a diffusion barrier for the bridging interconnect/terminal. Upon modification, the first bonding terminals would be electrically connected to the bridging terminal through the auxiliary conductive layer since the auxiliary conductive layer would be on the sidewalls of the bridging terminal [para 0009].
In reference to claim 13, Luo, Okamoto, and Lee teach the invention of claim 12.
Lee teaches The display device as claimed in claim 12, wherein the auxiliary conductive layer [81b of Lee] covers surfaces of the first base [substrate 20; Fig. 7A, para 0073] in the first opening [opening of 2 and 3/4 of Okamoto; analogously, first opening of Luo and opening of plug 82 of Lee; Fig. 7A, para 0076] and the first bonding terminals [D3,D2 of Luo; analogously, 3/4 of Okamoto] in the first opening [opening of 2 and 3/4 of Okamoto; analogously, first opening of Luo and opening of 82 of Lee].
Claim(s) 6 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Luo in view of Okamoto further in view of Kishimoto (US 2020/0411617 A1).
In reference to claim 6, Luo and Okamoto teach the invention of claim 1.
Luo teaches The display panel as claimed in claim 1, wherein the display substrate comprises: a first barrier layer [buffer layer 13; Figs. 6,9, para 0061] covered on the first bonding terminals [D3,D2] and the first base [first base; see annotated Fig. 9]; a driving circuit layer [TFT] disposed on the first barrier layer [13] and comprising a plurality of thin film transistors and a plurality of signal lines [LED disposed on 13, 12 and 13 stacked on 11 away from 1 with TFT array stacked on 13 away from 01 also away from 13; Fig. 9, para 0071], the signal lines are electrically connected to the corresponding first bonding terminals [TFT interconnect connected to individual transistors in TFT array; para. 0073].
However, Luo and Okamoto do not explicitly teach a pixel electrode disposed on the driving circuit layer and electrically connected to the corresponding thin film transistor; a pixel definition layer covered on the pixel electrode and the driving circuit layer, wherein the pixel definition layer has a second opening, and the second opening exposes a part of the pixel electrode.
Kishimoto teaches a pixel electrode [first electrode 41; Fig. 1, para 0031] disposed on the driving circuit layer and electrically connected to the corresponding thin film transistor [41 on the drive circuit connected to 20; Fig. 1, para 0031]; a pixel definition layer [insulating bank 42; Fig. 1, para 0045] covered on the pixel electrode [41] and the driving circuit layer, wherein the pixel definition layer [42] has a second opening, and the second opening exposes a part of the pixel electrode [42 on 41 and drive circuit with a hole in 43 through opening of 42 exposing partial 41; Fig. 1, para 0031, 0046].
It would have been obvious to one having ordinary skill in the art before the time of filing to incorporate Kishimoto’s pixel electrode and pixel definition layer in Luo’s device in order to provide the structure and various elements of the LED chip to implement a working light emitting element.
In reference to claim 16, Luo and Okamoto teach the invention of claim 11.
Luo teaches The display device as claimed in claim 11, wherein the display substrate comprises:
a first barrier layer [buffer layer 13; Figs. 6,9, para 0061] covered on the first bonding terminals [D3,D2] and the first base [first base; see annotated Fig. 9];
a driving circuit layer [TFT] disposed on the first barrier layer [13] and comprising a plurality of thin film transistors and a plurality of signal lines [LED disposed on 13, 12 and 13 stacked on 11 away from 1 with TFT array stacked on 13 away from 01 also away from 13; Fig. 9, para 0071], the signal lines are electrically connected to the corresponding first bonding terminals [TFT interconnect connected to individual transistors in TFT array; para. 0073].
However, Luo and Okamoto do not explicitly teach a pixel electrode disposed on the driving circuit layer and electrically connected to the corresponding thin film transistor; a pixel definition layer covered on the pixel electrode and the driving circuit layer, the second opening exposes a part of the pixel electrode.
Kishimoto teaches a pixel electrode [first electrode 41; Fig. 1, para 0031] disposed on the driving circuit layer and electrically connected to the corresponding thin film transistor [41 on the drive circuit connected to 20; Fig. 1, para 0031]; a pixel definition layer [insulating bank 42; Fig. 1, para 0045] covered on the pixel electrode [41] and the driving circuit layer, the second opening exposes a part of the pixel electrode [42 on 41 and drive circuit with a hole in 43 through opening of 42 exposing partial 41; Fig. 1, para 0031, 0046].
It would have been obvious to one having ordinary skill in the art before the time of filing to incorporate Kishimoto’s pixel electrode and pixel definition layer in Luo’s device in order to provide the structure and various elements of the LED chip to implement a working light emitting element.
Conclusion
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/ANDREW CHUNG/
Examiner, Art Unit 2898