Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Amendment, received 12/31/2025, has been entered.
Claims 1-20 are presented for examination.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-7 and 15-17 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (US Pub. No. 2019/0140039 A1), hereafter referred to as Lee.
As to claim 1, Lee discloses a display panel (fig 1, 10), dividing to a display region (fig 10, region of OLE) and a bonding region (fig 10, region of POE) and comprising:
a substrate (fig 10, SUB1);
a bonding pad pattern (POE) disposed on the substrate (SUB1) within the bonding region (region of POE);
an anode (ANO) disposed on the substrate (SUB1) within the display region (region of OLE);
a light emitting layer (fig 10 shows OL that comprises EML) disposed on the anode (ANO);
an organic electronic functional layer (ETL and EIL stacked on EML of the shown OL in fig 10) covering the light emitting layer (EML); and
a cathode (CAT) covering the organic electronic functional layer (ETL/EIL of the OL), wherein the organic electronic functional layer further covers a part of the bonding pad pattern (ETL/EIL of the OL is shown on POE), and the cathode (CAT) further covers a remaining part (part of POE covered by CAT that is not covered by ETL/EIL of the OL) of the bonding pad pattern (POE).
As to claim 2, Lee discloses the display panel according to claim 1 (paragraphs above),
wherein the organic electronic functional layer comprises an electron transport layer and an electron injection layer stacked thereon (fig 10, OL includes ETL/EIL stacked on EML).
As to claim 3, Lee discloses the display panel according to claim 1 (paragraphs above),
wherein the organic electronic functional layer extends from the display region to the bonding region (fig 10, OL which comprises ETL/EIL extends to POE), and the cathode extends from the display region to the bonding region (CAT extends to POE).
As to claim 4, Lee discloses the display panel according to claim 1 (paragraphs above),
a driving circuit layer (T) disposed on the substrate (SUB1), a planarization layer (OC) covering the driving circuit layer (T), the anode (ANO) disposed on the planarization layer (OC), a pixel definition layer (BN) disposed on the planarization layer (OC) and covering part of the anode (ANO), wherein the pixel definition layer (BN) is provided with an opening (opening exposing ANO), a hole injection layer and a hole transport layer are disposed in the opening in a stack (HIL/HTL in OL; [0070]), and the light emitting layer (EML) is disposed on the hole transport layer (HTL).
As to claim 5, Lee discloses the display panel according to claim 4 (paragraphs above),
wherein the organic electronic functional layer comprises an electron transport layer (ETL) covering the light emitting layer (EML), the pixel definition layer (BN), a part of the driving circuit layer (T) and contacting with the bonding pad pattern (POE) and an electron injection layer (EIL) covering the electron transport layer (ETL), contacting the bonding pad pattern (POE), and covering a part of the bonding pad pattern (POE), wherein the cathode (CAT) covers the electron injection layer (EIL) and another part of the bonding pad pattern (POE).
As to claim 6, Lee discloses a method of manufacturing a display panel (fig 10, [0075]), comprising:
providing a substrate (SUB1), wherein the substrate is dividing to a display region (region of OLE) and a bonding region (region of POE), and the substrate comprises a bonding pad pattern (POE) disposed within the bonding region and light emitting layer (OL comprising EML; [0070]) disposed within the display region;
depositing an organic electronic functional layer (OL comprises ETL/EIL, [0075]) covering the light emitting layer (EML) and a part of the bonding pad pattern (POE); and
depositing a cathode (CAT; [0075]) covering the organic electronic functional layer (OL comprising ETL/EIL) and a remaining part (part of POE covered by CAT that is not covered by ETL/EIL of the OL) of the bonding pad pattern (POE).
As to claim 7, Lee discloses the method of manufacturing the display panel according to claim 6 (paragraphs above),
wherein the depositing of the organic electronic functional layer covering the light emitting layer and the part of the bonding pad pattern and the depositing of the cathode covering the organic electronic functional layer and another part of the bonding pad pattern use a same mask (fig 10, pattern BR2 acts as a mask during the deposition processes of both OL and CAT).
As to claim 15, Lee discloses the method of manufacturing the display panel according to claim 6 (paragraphs above),
Lee further discloses wherein the depositing of the cathode covering the organic electronic functional layer and another part of the bonding pad pattern comprises depositing the cathode by sputtering ([0075]), wherein an overspray of the cathode covers the overspray of the organic electronic functional layer and another part of the bonding pad pattern (fig 10, CAT overspray extends onto POE past the functional layer OL).
As to claim 16, Lee discloses the method of manufacturing the display panel according to claim 15 (paragraphs above),
wherein the depositing of the cathode covering the organic electronic functional layer and another part of the bonding pad pattern further comprises widening a distance between a sputtering target and the substrate to increase the overspray of the cathode ([0075] the distance that the sputtering target has been set is considered to be the widened distance).
As to claim 17, Lee discloses the method of manufacturing the display panel according to claim 15 (paragraphs above),
wherein the depositing of the cathode covering the organic electronic functional layer and another part of the bonding pad pattern further comprises widening a distance between a mask and the substrate to increase the overspray of the cathode ([0075] the distance that the mask has been set relative to the substrate is considered to be the widened distance).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 8-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Chen et al. (CN110047893A; provided with English translation on IDS received 12/9/2022), hereafter referred to as Chen.
As to claim 8, Lee discloses the method of manufacturing the display panel according to claim 6 (paragraphs above),
wherein the depositing of the organic electronic functional layer covering the light emitting layer and the part of the bonding pad pattern comprises depositing the organic electronic functional layer by a thermal deposition process ([0075]), wherein an overspray of the organic electronic functional layer covers the part of the bonding pad pattern (OL covering POE).
Lee does not explicitly disclose that the thermal deposition process is an evaporation process.
Nonetheless, Chen discloses wherein a thermal deposition process for an organic electronic functional layer is an evaporation process (page 9 of English translation).
It would have been obvious to one of ordinary skill in the art at the time the application was effectively filed to deposit the organic functional layer of Lee using an evaporation process as taught by Chen since this will provide uniform coverage over the surface area of the display.
As to claim 9, Lee in view of Chen disclose the method of manufacturing the display panel according to claim 8 (paragraphs above),
Chen further discloses wherein the depositing of the organic electronic functional layer covering the light emitting layer and the part of the bonding pad pattern further comprises widening a distance between an evaporation source and the substrate to reduce the overspray of the organic electronic functional layer (page 9; wherein the distance that the evaporation source is set is considered to be the widened distance relative to a placement of the evaporation source).
As to claim 10, Lee in view of Chen disclose the method of manufacturing the display panel according to claim 8 (paragraphs above),
Chen further discloses wherein the depositing of the organic electronic functional layer covering the light emitting layer and the part of the bonding pad pattern further comprises changing an evaporation angle of an evaporation source to reduce the overspray of the organic electronic functional layer (page 9).
As to claim 11, Lee discloses the method of manufacturing the display panel according to claim 6 (paragraphs above),
Lee does not disclose wherein the depositing of the cathode covering the organic electronic functional layer and another part of the bonding pad pattern comprises depositing the cathode by evaporation, wherein an overspray of the cathode covers the overspray of the organic electronic functional layer and another part of the bonding pad pattern.
Nonetheless, Chen discloses depositing the cathode covering the organic electronic functional layer and another part of the bonding pad pattern comprises depositing the cathode by evaporation, wherein an overspray of the cathode covers the overspray of the organic electronic functional layer and another part of the bonding pad pattern (English translation page 9).
It would have been obvious to one of ordinary skill in the art at the time the application was effectively filed to deposit the cathode of Lee using the evaporation method as taught by Chen since this will provide good coverage of the electrode material.
As to claim 12, Lee in view of Chen disclose the method of manufacturing the display panel according to claim 11 (paragraphs above),
Chen further discloses wherein the depositing of the cathode covering the organic electronic functional layer and another part of the bonding pad pattern further comprises changing an evaporation angle of an evaporation source to increase the overspray of the cathode (page 9).
As to claim 13, Lee in view of Chen disclose the method of manufacturing the display panel according to claim 11 (paragraphs above),
Chen further discloses wherein the depositing of the cathode covering the organic electronic functional layer and another part of the bonding pad pattern further comprises widening a distance between an evaporation source and the substrate to increase the overspray of the cathode (page 9; wherein the distance that the evaporation source is set is considered to be the widened distance relative to a placement of the evaporation source).
As to claim 14, Lee in view of Chen disclose the method of manufacturing the display panel according to claim 11 (paragraphs above),
Chen further discloses wherein the depositing of the cathode covering the organic electronic functional layer and another part of the bonding pad pattern further comprises widening a distance between a mask and the substrate to increase the overspray of the cathode (page 9; wherein the distance that the mask is set relative to the substrate is considered to be the widened distance relative to a placement of the evaporation source).
Claim(s) 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Jeong et al. (KR20190126493A, including English translation), hereafter referred to as Jeong.
As to claim 18, Lee discloses a method of manufacturing the display panel of claim 6 (paragraphs above), however, does not disclose the machine.
Nonetheless, Jeong discloses a buffer chamber configured to transmit and receive the substrate (fig 2, buffer chamber taught in page 3 of English translation);
a mask aligning chamber (fig 2, 120) configured to cover the mask over a surface of the substrate and align the mask with the substrate (page 3);
an evaporation and sputtering chamber (fig 2, center evaporation chamber, page 3) configured to perform the depositing of the organic electronic functional layer covering the light emitting layer and the part of the bonding pad pattern and the depositing of the cathode covering the organic electronic functional layer and a remaining part (part of POE covered by CAT that is not covered by ETL/EIL of the OL) of the bonding pad pattern on the substrate (page 3); and
a mask separation chamber (fig 2, 130) configured to remove the mask from the substrate (page 3).
It would have been obvious to one of ordinary skill in the art at the time the application was effectively filed to perform the deposition processes of the manufacturing the display panel of Lee using the in-line processing system taught by Jeong since this will shorten processing time.
As to claim 19, Lee in view of Jeong disclose the machine of manufacturing the display panel according to claim 18 (paragraphs above),
Jeong further discloses wherein the machine of manufacturing the display panel further comprises a mask returning chamber (109) and another two buffer chambers disposed between the mask returning chamber and the mask aligning chamber (120) and between the mask returning chamber and the mask separation chamber (130) respectively, and the two buffer chamber cooperating with the mask returning chamber are configured to select and transmit a suitable mask to the mask aligning chamber to aligning the mask (page 3).
As to claim 20, Lee in view of Jeong disclose the machine of manufacturing the display panel according to claim 18 (paragraphs above),
Jeong further discloses still another buffer chamber (input buffer chamber) disposed beside the mask aligning chamber (120) to receive and accommodate the substrate provided with an inkjet printing hole injection layer, an inkjet printing hole transport layer, and an inkjet printing light emitting layer from outside of the machine of manufacturing the display panel (pre-treatment) and to transmit the substrate to the mask aligning chamber to align with the mask (page 3).
Response to Arguments
Applicant's arguments filed 12/31/2025 have been fully considered but they are not persuasive.
Applicant argued that Lee does not disclose or teach the amended limitations of claim 1. Applicant did not give an indication as to the reason Lee does not disclose or teach the amended limitation other than point to what Lee does teach and then concluding that the limitations of claim 1 are not taught. Specifically, Applicant points to figure 10 of Lee and shows that many different elements and features are provided in contact with the bond pad POE, however, Applicant does not give an indication as to how the limitation in the claim is different from what is taught in figure 10 of the Lee reference.
Examiner disagrees because figure 10 of Lee clearly anticipates the limitation as recited in claim 1.
Applicant argued that it would not have been obvious to modify the teaching of Lee to arrive at the amended claim limitation.
This argument is moot because the teachings of the Lee reference are not modified to teach the amended claim limitation.
Applicant argued that Chen and Jeong do not remedy the deficiencies of Lee as set forth in the response.
Examiner disagrees because neither Chen nor Jeong are necessary to teach the limitation as argued by the Applicant.
Pertinent Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 2019/0207168A1.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAUN M CAMPBELL whose telephone number is (571)270-3830. The examiner can normally be reached on MWFS: 7:30-6pm Thurs 1-2pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Purvis, Sue can be reached at (571)272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SHAUN M CAMPBELL/Primary Examiner, Art Unit 2893 1/14/2026