Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) presented have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 5-7, 11-12 and 15-17 are rejected under 35 U.S.C. 103 as being unpatentable over Hu [US PGPUB 20240047628] in view of Watanabe [US PGPUB 20220163857].
Regarding claim 1, Hu teaches a double-surface display panel, comprising:
a substrate (16, Para 77; wherein the layer is structurally capable of being referred to as a substrate because the layer provides a surface for attaching display devices 1, Fig. 4), wherein the substrate comprises a first side (Fig. 4; side in contact with upper display device 1) and a second side (Fig. 4; side in contact with lower display device 1) opposite to each other (Fig. 4);
a plurality of first micro light-emitting diode (micro LED) units (LED 131s in upper display device 1, Para 66) distributed in an array manner (Fig. 4), wherein the first micro LED units are disposed on the first side or the second side (Fig. 4);
a plurality of second micro light-emitting diode (micro LED) units (LED 131s in lower display device 1, Para 66) distributed in an array manner (Fig. 4), wherein the second micro LED units are disposed on the first side or the second side (Fig. 4), and a light-emitting direction of the second micro LED units is opposite to a light-emitting direction of the first micro LED units (in view of the light-shielding layers 121 on the back surface of the LEDs, Para 70, Fig. 4);
a first light-shielding layer (121s in the upper display device, Para 70), wherein the first light-shielding layer is disposed on a light-emitting side of the first micro LED units (Fig. 4), and an orthographic projection of the first light-shielding layer on the substrate covers both an orthographic projection of the second micro LED units on the substrate (Fig. 4) and an orthographic projection of gaps between the second micro LED units and adjacent ones of the first micro LED units on the substrate (Fig. 4; i.e., adjacent along the orthographic projection); and
a second light-shielding layer (121s in the lower display device, Para 70), wherein the second light-shielding layer is disposed on a light-emitting side of the second micro LED units (Fig. 4), and an orthographic projection of the second light-shielding layer on the substrate covers both an orthographic projection of the first micro LED units on the substrate (Fig. 4)and an orthographic projection of gaps between the first micro LED units and adjacent ones of the second micro LED units on the substrate (Fig. 4), so that overlapping regions are formed between the orthographic projection of the first light-shielding layer and the orthographic projection of the second light-shielding layer (Fig. 4).
Hu does not specifically disclose that the light-shielding layer is a black matrix.
Referring to the invention of Watanabe, Watanabe discloses that a light-shielding layer in display devices are also referred to as a black matrix.
In view of such teaching by Watanabe, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the invention of Hu comprise the teachings of Watanabe at least based on the rationale of relying on teachings, suggestions, or motivations in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention (MPEP 2143.I.G).
Regarding claim 2, Hu teaches a double-surface display panel wherein the double-surface display panel comprises a pixel driving circuit layer, wherein the pixel driving circuit layer is disposed between the first micro LED units and the substrate, or the pixel driving circuit layer is disposed between the second micro LED units and the substrate (Para 64 – thin film transistor units include in substrate 12 may be connected to the light-emitting device layers 13 to control the light-emitting device layers 13).
Regarding claim 5, Hu teaches a double-surface display panel wherein the first micro LED units are disposed on the first side, and the second micro LED units are disposed on the second side (Fig. 4), the pixel driving circuit layer comprises a first pixel driving circuit disposed between the first micro LED units and the substrate, and a second pixel driving circuit disposed between the second micro LED units and the substrate (Para 64 – thin film transistor units include in substrate 12 may be connected to the light-emitting device layers 13 to control the light-emitting device layers 13).
Regarding claim 6, Hu teaches a double-surface display panel wherein the double-surface display panel comprises a light-shielding layer (i.e., combination of the black matrix in the upper and lower substrate 12, Fig. 4), and the light-shielding layer is disposed between the first micro LED units and the second micro LED units (Fig. 4).
Regarding claim 7, Hu teaches a double-surface display panel wherein an orthographic projection of the light-shielding layer on the substrate covers the orthographic projection of the first micro LED units on the substrate and the orthographic projection of the second micro LED units on the substrate (Fig. 4).
Regarding claim 11, Hu teaches a double-surface spliced display screen, comprising a plurality of double-surface display panels (1, Para 52, Fig. 4) spliced to each other (Para 77, Fig. 4), wherein each of the double-surface display panels comprises:
a substrate (16, Para 77; wherein the layer is structurally capable of being referred to as a substrate because the layer provides a surface for attaching display devices 1, Fig. 4), wherein the substrate comprises a first side (Fig. 4; side in contact with upper display device 1) and a second side (Fig. 4; side in contact with lower display device 1) opposite to each other (Fig. 4);
a plurality of first micro light-emitting diode (micro LED) units (LED 131s in upper display device 1, Para 66) distributed in an array manner (Fig. 4), wherein the first micro LED units are disposed on the first side or the second side (Fig. 4);
a plurality of second micro light-emitting diode (micro LED) units (LED 131s in lower display device 1, Para 66) distributed in an array manner (Fig. 4), wherein the second micro LED units are disposed on the first side or the second side (Fig. 4), and a light-emitting direction of the second micro LED units is opposite to a light-emitting direction of the first micro LED units (in view of the light-shielding layers 121 on the back surface of the LEDs, Para 70, Fig. 4);
a first light-shielding layer (121s in the upper display device, Para 70), wherein the first light-shielding layer is disposed on a light-emitting side of the first micro LED units (Fig. 4), and an orthographic projection of the first light-shielding layer on the substrate covers both an orthographic projection of the second micro LED units on the substrate (Fig. 4) and an orthographic projection of gaps between the second micro LED units and adjacent ones of the first micro LED units on the substrate (Fig. 4; i.e., adjacent along the orthographic projection); and
a second light-shielding layer (121s in the lower display device, Para 70), wherein the second light-shielding layer is disposed on a light-emitting side of the second micro LED units (Fig. 4), and an orthographic projection of the second light-shielding layer on the substrate covers both an orthographic projection of the first micro LED units on the substrate (Fig. 4)and an orthographic projection of gaps between the first micro LED units and adjacent ones of the second micro LED units on the substrate (Fig. 4), so that overlapping regions are formed between the orthographic projection of the first light-shielding layer and the orthographic projection of the second light-shielding layer (Fig. 4).
Hu does not specifically disclose that the light-shielding layer is a black matrix.
Referring to the invention of Watanabe, Watanabe discloses that a light-shielding layer in display devices are also referred to as a black matrix.
In view of such teaching by Watanabe, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the invention of Hu comprise the teachings of Watanabe at least based on the rationale of relying on teachings, suggestions, or motivations in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention (MPEP 2143.I.G).
Regarding claim 12, Hu teaches a double-surface spliced display screen wherein the double-surface display panel comprises a pixel driving circuit layer, wherein the pixel driving circuit layer is disposed between the first micro LED units and the substrate, or the pixel driving circuit layer is disposed between the second micro LED units and the substrate (Para 64 – thin film transistor units include in substrate 12 may be connected to the light-emitting device layers 13 to control the light-emitting device layers 13).
Regarding claim 15, Hu teaches a double-surface spliced display screen wherein the first micro LED units are disposed on the first side, and the second micro LED units are disposed on the second side (Fig. 4), the pixel driving circuit layer comprises a first pixel driving circuit disposed between the first micro LED units and the substrate, and a second pixel driving circuit disposed between the second micro LED units and the substrate (Para 64 – thin film transistor units include in substrate 12 may be connected to the light-emitting device layers 13 to control the light-emitting device layers 13).
Regarding claim 16, Hu teaches a double-surface spliced display screen wherein the double-surface display panel comprises a light-shielding layer (i.e., combination of the black matrix in the upper and lower substrate 12, Fig. 4), and the light-shielding layer is disposed between the first micro LED units and the second micro LED units (Fig. 4).
Regarding claim 17, Hu teaches a double-surface spliced display screen wherein an orthographic projection of the light-shielding layer on the substrate covers the orthographic projection of the first micro LED units on the substrate and the orthographic projection of the second micro LED units on the substrate (Fig. 4).
Claims 8-10 and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Hu in view of Watanabe in view Ma et al. [CN113555379] and Kim et al. [US PGPUB 20130021768] (hereinafter Ma and Kim).
Regarding claim 8, the modified invention of Hu teaches the limitation of claim 1 upon which claim 8 depends.
The modified invention does not specifically disclose a double-surface display panel wherein at least one end portion of the double-surface display panel is connected to at least one chip on flex (COF) substrate, and a driver chip is bonding connected to the COF substrate
Referring to the invention Ma, Ma teaches a double-surface display panel wherein at least one end portion of the double-surface display panel is connected to connection layer 410 (Para 46, Fig.1).
In view of such teaching by Ma, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the modified invention of Hu comprise the teachings of Ma in order to transmit electrical signals to synchronize the pictures displayed on both sides of the display panel (as disclosed by Ma).
Referring to Kim invention, Kim teaches connecting components on one side of a substrate to components on an opposite side of a substrate in a display panel by using a chip on flex (COF) substrate (structure of Fig. 3/4), and a driver chip (20, Para 51) is bonding connected to the COF substrate (Fig. 3/4).
In view of such teaching by Kim, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the modified invention of Hu comprise the teachings of Kim in order to supply gate and/or data signals in the device (Kim, Para 51).
Regarding claim 9, the modified invention of Hu specifically in view of Kim teaches a double-surface display panel wherein the COF substrate extends along a direction parallel to the double-surface display panel, an end of the COF substrate is bonding connected to the double-surface display panel, and another end of the COF substrate is bonding connected to a control circuit board (Fig. 9, Para 51).
Regarding claim 10, the modified invention of Hu specifically in view of Kim teaches a double-surface display panel wherein the driver chip is a source driver chip or a gate driver chip (Para 51).
Regarding claim 18, the modified invention of Hu teaches the limitation of claim 11 upon which claim 18 depends.
The modified invention does not specifically disclose a double-surface spliced display screen wherein at least one end portion of the double-surface display panel is connected to at least one chip on flex (COF) substrate, and a driver chip is bonding connected to the COF substrate
Referring to the invention Ma, Ma teaches a double-surface display panel wherein at least one end portion of the double-surface display panel is connected to connection layer 410 (Para 46, Fig.1).
In view of such teaching by Ma, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the modified invention of Hu comprise the teachings of Ma in order to transmit electrical signals to synchronize the pictures displayed on both sides of the display panel (as disclosed by Ma).
Referring to Kim invention, Kim teaches connecting components on one side of a substrate to components on an opposite side of a substrate in a display panel by using a chip on flex (COF) substrate (structure of Fig. 3/4), and a driver chip (20, Para 51) is bonding connected to the COF substrate (Fig. 3/4).
In view of such teaching by Kim, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the modified invention of Hu comprise the teachings of Kim in order to supply gate and/or data signals in the device (Kim, Para 51).
Regarding claim 19, the modified invention of Hu specifically in view of Kim teaches a double-surface spliced display screen wherein the COF substrate extends along a direction parallel to the double-surface display panel, an end of the COF substrate is bonding connected to the double-surface display panel, and another end of the COF substrate is bonding connected to a control circuit board (Fig. 9, Para 51).
Regarding claim 20, the modified invention of Hu specifically in view of Kim teaches a double-surface spliced display screen wherein the driver chip is a source driver chip or a gate driver chip (Para 51).
Allowable Subject Matter
Claims 3 and 13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/ISMAIL A MUSE/ Primary Examiner, Art Unit 2812