Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 11/19/2025 has been entered.
DETAILED ACTION
Claims 1, 2, and 5-15 are rejected under 35 USC §101.
Remarks
Applicant’s arguments, filed (10/22/2025), with respect to pending claims 1, 2, and 5-15 and have been fully considered, but is not persuasive. Please see Advisory action form 11/17/2025: where Examiner stated:
Regarding 101 Rejection: the new steps of “collecting step lists whose degree of similarity to the first step list is higher than or equal to a certain level from a group of step lists and a collected group of characteristic values,” could be characterized as mathematical calculations or mental steps performed in the human mind(including observation, evaluation and opinion). The steps of “outputting, in accordance with the result of the test, ...., and outputting, in accordance with the result of the test,” in claim 1 and step of “outputting the characteristic values the result of the comparison” in claim 6 are merely insignificant extra solution activity to obtain data.
Claim Rejections - 35 USC §101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1, 2, and 5-15 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more as addressed below.
The new 2019 Revised Patent Subject Matter Eligibility Guidance published in the Federal Register (Vol. 84 No. 4, Jan 7, 2019 pp 50-57) has been applied and the claims are deemed as being patent ineligible.
The current 35 USC 101 analysis is based on the current guidance (Federal Register vol. 79, No. 241. pp. 74618-74633). The analysis follows several steps. Step 1 determines whether the claim belongs to a valid statutory class. Step 2A prong 1 identifies whether an abstract idea is claimed. Step 2A prong 2 determines whether any abstract idea is integrated into a practical application. If the abstract idea is integrated into a practical application the claim is patent eligible under 35 USC 101. Last, step 2B determines whether the claims contain something significantly more than the abstract idea. In most cases the existence of a practical application predicates the existence of an additional element that is significantly more.
Under Step 2A Prong 1, the independent claim 1 all include abstract ideas as highlighted (using a bold font) shown below.
“1. A storage having instructions stored therein which, when processed by arithmetic device, cause the arithmetic device to perform operations for semiconductor element characteristic value estimation system comprising:
an input portion;
a first step list, a second step list, and a characteristic value of a semiconductor element,
storing a group of step lists and a group of characteristic values of semiconductor elements,
performing comparison between two step lists selected from the first step list and the group of step lists and obtaining a result of the comparison,
collecting step lists whose degree of similarity to the first step list is higher than or equal to a certain level from a group of step lists and a collected group of characteristic values,
performing a test using two or more characteristic values of semiconductor elements selected from the characteristic value of the semiconductor element and the collected group of characteristic values of the semiconductor elements and obtaining a result of the test;
performing regression analysis of parameters for a step and two or more characteristic values of semiconductor elements selected from the characteristic value of the semiconductor element and the group of characteristic values of the semiconductor elements and obtaining a result of the regression analysis;
estimating a characteristic value of a semiconductor element from the second step list on the basis of the result of the regression analysis;
outputting, in accordance with the result of the test, notifying the check whether the first list has been implemented correctly to a display device, and
outputting, in accordance with the result of the test, the characteristic value of the semiconductor element and the result of the comparison and the result of the test to a display device.
“6. (Currently Amended) A semiconductor element characteristic value estimation method comprising:
a first step of inputting a first step list included in a first lot and a characteristic value of a first semiconductor element manufactured in accordance with the first step list;
a second step of collecting a second step list whose degree of similarity to the first step list is higher than or equal to a certain level from a group of step lists;
a third step of performing a test using the characteristic value of the first semiconductor element and a characteristic value of a second semiconductor element manufactured in accordance with the second step list and, after displaying notifying to check whether the first list has been implemented correctly based on the result of the test to a display device, ending the process;
a fourth step of performing, among a first plurality of semiconductor elements manufactured in accordance with a first plurality of step lists included in the first lot, analysis of variance on characteristic values of the first plurality of semiconductor elements and comparison of the first plurality of step lists and recording whether a step which is different among the first plurality of step lists influences the characteristic values of the first plurality of semiconductor elements;
a fifth step of collecting a third step list whose degree of similarity to each of the first plurality of step lists is higher than or equal to a certain level from the group of step lists;
a sixth step of performing regression analysis of parameters for a step influencing the characteristic values of the first plurality of semiconductor elements and a characteristic value of a third semiconductor element manufactured in accordance with the third step list, and obtaining a result of the regression analysis;
a seventh step of estimating, from a second plurality of step lists included in a second lot, characteristic values of a second plurality of semiconductor elements manufactured in accordance with the second plurality of step lists on the basis of the result of the regression analysis before the second plurality of semiconductor elements are manufactured; and
an eighth step of outputting the characteristic values and the result of the comparison,
wherein the semiconductor element characteristic value estimation method is stored in a storage and is executed by an arithmetic device.”
The highlighted steps is considered to be equivalent of a mathematical concepts and mathematical steps.
Under step 2A prong 2,
The claims 1 and 6 just comprising the field of use (semiconductor) and claims do not direct to any practical application.
All claim 1 comprises an abstract idea, except the steps/element of “arithmetic device” and “display device” which are merely a generic pieces of the computer. The general computer does not make the claims significantly more than the abstract idea. All of these additional elements are generic computer and generic components of the computer, which are in light of Alice, as not being significantly more.
There is no indication that the combination of elements/units improves the functioning of a computer or improves any other technology or technical field.
The new steps of “collecting step lists whose degree of similarity to the first step list is higher than or equal to a certain level from a group of step lists and a collected group of characteristic values,” could be characterized as mathematical calculations or mental steps performed in the human mind(including observation, evaluation and opinion).
The steps of “outputting, in accordance with the result of the test, notifying the check whether the first list has been implemented correctly to a display device,” in claim 1 and step of “displaying notifying to check whether the first list has been implemented correctly based on the result of the test to a display device” and “outputting the characteristic values and the result of the comparison…” in claim 6 is considered extra solution activity and not significantly more than the judicial exception. As recited in MPEP section 2106.05(g), displaying analysis/results is considered extra solution activity in light of Electric Pawer Group, LLO y. Alstom 3.A, 830 F.3d 1350, 1354-55, 119 USPOQed 1739, 1742 (Fed. Cir. 2076).
The steps of “an eighth step of outputting the characteristic values, the result of the comparison, and the result of the test to a display devise” and “notifying to check whether the first list has been implemented correctly based on the result of the test” are merely insignificant extra solution activity to obtain data. The simply outputting calculation results of the test by displaying.
The steps of “outputting, in accordance with the result of the test, the characteristic value of the semiconductor element and the result of the comparison and the result of the test to a display device” in claim 1 and step of “outputting the characteristic values and the result of the comparison…” in claim 6 are merely insignificant extra solution activity to obtain data.
The claims 1 and 6, merely providing the results of the test in output form and displaying results of the list and notifying if list implemented correctly on display device, is merely a presentation of the output information and outputting result can be considered to be extra-solution activity.
The notification steps just insignificant additional steps, because is not directed to the technical improvement of the estimated value.
The Claim 1 comprises other additional steps as the “storing a group of step lists and a group characteristic value” and “stored in a storage and is executed by an arithmetic device” which is not significantly more since it is claimed at a high level of generality. Storing and retrieving information in memory is not significantly more as found in VersataDev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93.
In claim 6 the steps of “a first step of inputting a first step list included in a first lot and a characteristic value of a first semiconductor element manufactured in accordance with the first step list, - the receiving/inputting list of data is merely insignificant extra solution activity to obtain data.
Under step 2B:
The Claim 1 comprises other additional steps as the “storing a group of step lists and a group characteristic value” and “stored in a storage and is executed by an arithmetic device” which is not significantly more since it is claimed at a high level of generality. Storing and retrieving information in memory is not significantly more as found in VersataDev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93.
The Claims 1 and 6 comprising just outputting the characteristic values to a display device, which is considered extra solution activity and not significantly more than the judicial exception. As recited in MPEP section 2106.05(g), displaying analysis/results is considered extra solution activity in light of Electric Pawer Group, LLO y. Alstom 3.A, 830 F.3d 1350, 1354-55, 119 USPOQed 1739, 1742 (Fed. Cir. 2076).
The “display device” and ”arithmetic device” are merely a generic pieces of the computer. The general computer does not make the claims significantly more than the abstract idea. All of these additional elements are generic computer and generic components of the computer, which are in light of Alice, as not being significantly more.
There is no indication that the combination of elements/units improves the functioning of a computer or improves any other technology or technical field.
The new steps of “collecting step lists whose degree of similarity to the first step list is higher than or equal to a certain level from a group of step lists and a collected group of characteristic values,” could be characterized as mathematical calculations or mental steps performed in the human mind(including observation, evaluation and opinion). The steps of “outputting, in accordance with the result of the test, ...., and outputting, in accordance with the result of the test,” in claim 1 and step of “outputting the characteristic values the result of the comparison” in claim 6 are merely insignificant extra solution activity to obtain data.
In claim 6 the steps of “a first step of inputting a first step list included in a first lot and a characteristic value of a first semiconductor element manufactured in accordance with the first step list, - the receiving/inputting list of data is merely insignificant extra solution activity to obtain data.
The depended claims 2, and 5 are merely extend the details of the abstract idea of mathematical concepts.
The claim 7 directed to the data output, which is insignificant additional steps.
The claims 8, and 9 further semiconductor comprising display device in a form a table, which is insignificant additional steps.
The claim 10 and 13 comprising “notifying information…regression analysis” just extra solution data activity.
The claims 11, 12, 14 and 15 additionally describes the data information.
Therefore claims 2, 5, and 7-15 are similarly rejected under 35 U.S.C. 101.
Examiner note regarding the prior art of the record:
Kotani (JP2012212919A), hereinafter Kotani describes a device for managing substrate processing, wherein the device associates recipe data and processing results data and accumulates the associated data in a file, and from a plurality of processing results data, subjects the relationship between recipe data and processing results data to regression analysis.
Yamada (JP2012004181), hereinafter Yamada describes a characteristic prediction device that learns a prediction model by calibrating state variables in the prediction model, the state variables expressing a relationship between operating data and
characteristic values, on the basis of characteristic values of a product manufactured by a processing device and error information pertaining to the characteristic values. Mitsushita et al., (US Pub.20070225853A1), hereinafter Mitsushita describes a semiconductor manufacturing device that stores, in a database, a QC value data group and an EES parameter group for a plurality of lots processed by the semiconductor manufacturing device in the past, and creates an equation for predicting QC value data using PLS regression on the basis of the EES parameter group and the QC value data group.
However, In Claims 1 and 6, the closest prior arts either singularity or in combination, fail to anticipate or render obvious in particular, “performing comparison two process lists (second step of collecting a second process list for which the similarity level is a certain level or higher)”, “a performing a test of conducting an examination using two or more characteristic values of semiconductor elements (third step of conducting an examination in which characteristic values are used) and obtaining a result of the test”, or “ performing regression analysis with the group of characteristic values of the semiconductor elements (sixth step of implementing regression analysis)”.
Claims 2, 5 and 7-15 are not rejected under 102/103 Rejection due to their dependency on claims 1 and 6 correspondently.
Conclusion
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/KALERIA KNOX/
Examiner, Art Unit 2857
/MICHAEL J DALBO/Primary Examiner, Art Unit 2857