DETAILED ACTION
This action is made FINAL in response to the amendments filed on 11/25/2025.
Claim Objections
iClaims 2 – 15 and 17 – 20 are objected to because of the following informalities:
Line 1 of every dependent claim “The media” should be changed to -- The one or more non-transitory computer-readable media --.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1 – 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
As to claims 1 and 16, the limitations “for a same portion of the pattern” and “predictions of that same portion” are not understood by the examiner and there is insufficient antecedent basis for these limitations in the claim. The applicant never defines what the initial portion of the pattern is its not understood how they can claim the “same portion.” The applicant will examine the claims as if the claims read “for the pattern” and “predictions of the portion.”
Claims 2 - 15 and 17 – 20 depend on independent claims 1 or 16, respectively, therefore the claims are also rejected.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1 – 20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
As to claim 1,
Step 2A, Prong One
The claim recites in part:
predict, using the machine learning prediction model, multi-dimensional output substrate geometry based on the input information, the prediction comprising determination of an edge placement error (EPE) metric associated with one or more features of the pattern based on the input information and/or the output substrate geometry, and the multidimensional substrate geometry indicating, for a same portion of the pattern, predictions of the same portion at two more different locations across a major surface of the substrate.
Under the broadest reasonable interpretation, these limitations are process steps that cover mental processes including an observation, evaluation, judgment or opinion that could be performed in the human mind or with the aid of pencil and paper. If a claim, under its broadest reasonable interpretation, covers a mental process but for the recitation of generic computer components, then it falls within the “Mental Process” grouping of abstract ideas. Accordingly, at Step 2A, Prong One, the claim is directed to an abstract idea.
Step 2A, Prong Two
The judicial exception is not integrated into a practical application. In particular, the claim recites the additional elements of:
receive input information including geometry information and/or process information for a pattern
which amounts to extra-solution activity of gathering data for use in the claimed process. As described in MPEP 2106.05(g), limitations that amount to merely adding insignificant extra-solution activity to a judicial exception do not amount to significantly more than the exception itself, and cannot integrate a judicial exception into a practical application.
The claim further recites non-transitory computer-readable media and processors which are recited at a high-level of generality and amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
In addition, the recitation of edge placement error (EPE) metric amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)). As such, the claim does not integrate the judicial exception into a practical application.
Accordingly, at Step 2A, Prong Two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception. As discussed above, the additional elements of:
receive input information including geometry information and/or process information for a pattern
are recited at a high level of generality and amounts to extra-solution activity of receiving data i.e. pre-solution activity of gathering data for use in the claimed process. The courts have found limitations directed to obtaining information electronically, recited at a high level of generality, to be well-understood, routine, and conventional (see MPEP 2106.05(d)(II), “receiving or transmitting data over a network”, "electronic record keeping," and "storing and retrieving information in memory").
The non-transitory computer-readable media and processors are recited at a high-level of generality and amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
In addition, the recitation of edge placement error (EPE) metric amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)). As such, the claim does not integrate the judicial exception into a practical application.
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
As to claim 2, the limitations “wherein the EPE metric is symmetric or asymmetric for the one or more features of the pattern” amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)).
As to claim 3,
Step 2A, Prong One
The claim does not recite an abstract idea or any other judicial exception and therefore passes Step 2A, Prong of the Alice/Mayo analysis.
Step 2A, Prong Two
The judicial exception is not integrated into a practical application. In particular, the claim recites the additional elements of:
wherein the machine learning prediction model is trained using asymmetrically distributed training data such that weights and/or parameters of the trained machine learning prediction model facilitate determination of the symmetric or asymmetric EPE metric
which is recited at a high-level of generality with no detail of the training process and amounts to no more than adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea (See MPEP 2106.05(f))
The recitation of asymmetrically distributed training data amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)). As such, the claim does not integrate the judicial exception into a practical application.
Accordingly, at Step 2A, Prong Two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception. The limitations:
wherein the machine learning prediction model is trained using asymmetrically distributed training data such that weights and/or parameters of the trained machine learning prediction model facilitate determination of the symmetric or asymmetric EPE metric
which is recited at a high-level of generality with no detail of the training process and amounts to no more than adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea (See MPEP 2106.05(f))
The recitation of asymmetrically distributed training data amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)). As such, the claim does not integrate the judicial exception into a practical application.
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception
As to claim 4, the limitations “wherein the asymmetrically distributed training data comprises asymmetrically distributed EPE metrics determined from multi-dimensional probability images associated with asymmetrically distributed critical dimension (CD) values” amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)).
As to claim 5, the limitations “wherein the multi-dimensional output substrate geometry indicates variability in shapes of features of the pattern” amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)).
As to claim 6,
Step 2A, Prong One
The claim recites in part:
wherein the multi-dimensional output substrate geometry indicates a probability that a given geometry occupies a given location on a substrate
Under the broadest reasonable interpretation, these limitations are process steps that cover a mathematical relationship, mathematical formula, or algorithm, which is identified as an abstract idea. Specifically, the recited tokenizing recites a data processing step involving organization and manipulation of data.
Accordingly, at Step 2A, Prong One, the claim is directed to an abstract idea.
Step 2A, Prong Two
Further the claim does not include additional elements that integrate this abstract idea into a practical application. “Indicating a probability” is performed using generic computer components performing their typical functions and does not provide a meaningful technological improvement.
Accordingly, at Step 2A, Prong Two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B
Nothing in the claim adds “significantly more” beyond generic computing.
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
As to claim 7,
Step 2A, Prong One
The claim recites in part:
wherein the multi-dimensional output substrate geometry comprises a representation of pattern probability in a plurality of dimensions
Under the broadest reasonable interpretation, these limitations are process steps that cover a mathematical relationship, mathematical formula, or algorithm, which is identified as an abstract idea. Specifically, the recited tokenizing recites a data processing step involving organization and manipulation of data.
Accordingly, at Step 2A, Prong One, the claim is directed to an abstract idea.
Step 2A, Prong Two
Further the claim does not include additional elements that integrate this abstract idea into a practical application. “Indicating a probability” is performed using generic computer components performing their typical functions and does not provide a meaningful technological improvement.
Accordingly, at Step 2A, Prong Two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B
Nothing in the claim adds “significantly more” beyond generic computing.
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
As to claim 8,
Step 2A, Prong One
The claim recites in part:
wherein the instructions are further configured to cause the one or more processors to predict, with the machine learning prediction model, one-or-both-of (1) a symmetric or asymmetric stochastic edge placement error band and/or (2) a stochastic failure rate, based on the mulli-dimensional output substrate geometry
Under the broadest reasonable interpretation, these limitations are process steps that cover a mathematical relationship, mathematical formula, or algorithm, which is identified as an abstract idea. Specifically, the recited tokenizing recites a data processing step involving organization and manipulation of data.
Accordingly, at Step 2A, Prong One, the claim is directed to an abstract idea.
Step 2A, Prong Two
Further the claim does not include additional elements that integrate this abstract idea into a practical application. “Predicting” is performed using generic computer components performing their typical functions and does not provide a meaningful technological improvement.
The recitation of stochastic edge placement error band and stochastic failure rate amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)). As such, the claim does not integrate the judicial exception into a practical application.
Accordingly, at Step 2A, Prong Two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B
Nothing in the claim adds “significantly more” beyond generic computing.
The recitation of stochastic edge placement error band and stochastic failure rate amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)). As such, the claim does not integrate the judicial exception into a practical application.
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
As to claim 9,
Step 2A, Prong One
The claim does not recite an abstract idea or any other judicial exception and therefore passes Step 2A, Prong of the Alice/Mayo analysis.
Step 2A, Prong Two
The judicial exception is not integrated into a practical application. In particular, the claim recites the additional elements of:
wherein the instructions are further configured to cause the one or more processors io tune the machine learning prediction model such that the multi-dimensional output substrate geometry matches a measured stochastic edge placement error band or measured failure rate, or matches a mean contour prediction from an optical proximity correction model or a lithography manufacturability check model
which is recited at a high-level of generality with no detail of the training process and amounts to no more than adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea (See MPEP 2106.05(f))
The recitation of optical proximity correction model and lithography manufacturability check model amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)). As such, the claim does not integrate the judicial exception into a practical application.
Accordingly, at Step 2A, Prong Two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception. The limitations:
wherein the instructions are further configured to cause the one or more processors io tune the machine learning prediction model such that the multi-dimensional output substrate geometry matches a measured stochastic edge placement error band or measured failure rate, or matches a mean contour prediction from an optical proximity correction model or a lithography manufacturability check model
which is recited at a high-level of generality with no detail of the training process and amounts to no more than adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea (See MPEP 2106.05(f))
The recitation of lithography manufacturability check model amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)). As such, the claim does not integrate the judicial exception into a practical application.
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception
As to claim 10,
Step 2A, Prong One
The claim does not recite an abstract idea or any other judicial exception and therefore passes Step 2A, Prong of the Alice/Mayo analysis.
Step 2A, Prong Two
The judicial exception is not integrated into a practical application. In particular, the claim recites the additional elements of:
wherein the multi-dimensional output substrate geometry comprises a pattern probability image, and wherein the instructions are further configured to cause the one or more processors to use the pattern probability image for a lithography manufacturability check and/or pattern fidelity metrology in a semiconductor device manufacturing process
which is recited at a high-level of generality with no detail of the training process and amounts to no more than adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea (See MPEP 2106.05(f))
The claim further recites semiconductor device which are recited at a high-level of generality and amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
The recitation of lithography manufacturability check and pattern fidelity metrology amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)). As such, the claim does not integrate the judicial exception into a practical application.
Accordingly, at Step 2A, Prong Two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception. The limitations:
wherein the multi-dimensional output substrate geometry comprises a pattern probability image, and wherein the instructions are further configured to cause the one or more processors to use the pattern probability image for a lithography manufacturability check and/or pattern fidelity metrology in a semiconductor device manufacturing process
which is recited at a high-level of generality with no detail of the training process and amounts to no more than adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea (See MPEP 2106.05(f))
The recitation of semiconductor device which are recited at a high-level of generality and amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
The recitation of lithography manufacturability check and pattern fidelity metrology amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)). As such, the claim does not integrate the judicial exception into a practical application.
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception
As to claim 11, the limitations “wherein the input information comprises one or more selected from: a simulated aerial image, a simulated resist image, target substrate dimensions, or data from a lithography apparatus scanner associated with semiconductor device manufacturing, for a semiconductor device” amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)).
As to claim 12, the limitations “wherein the input information comprises a plurality of aerial images, and individual aerial images of the plurality of aerial images correspond to different heights in resist layers associated with a patterning process” amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)).
As to claim 13,
Step 2A, Prong One
The claim does not recite an abstract idea or any other judicial exception and therefore passes Step 2A, Prong of the Alice/Mayo analysis.
Step 2A, Prong Two
The judicial exception is not integrated into a practical application. In particular, the claim recites the additional elements of:
wherein the instructions are further configured to cause the one or more processors to train the machine learning prediction model with training information comprising one or more selected from: aerial images, target pattern geometry, or patterning process parameters, and corresponding physical substrate measurements and/or predictions from a different non-machine learning prediction model
which is recited at a high-level of generality with no detail of the training process and amounts to no more than adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea (See MPEP 2106.05(f))
The recitation of aerial images, target pattern geometry, or patterning process parameters, and corresponding physical substrate measurements and predictions from a different non-machine learning prediction model amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)). As such, the claim does not integrate the judicial exception into a practical application.
Accordingly, at Step 2A, Prong Two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception. The limitations:
wherein the instructions are further configured to cause the one or more processors to train the machine learning prediction model with training information comprising one or more selected from: aerial images, target pattern geometry, or patterning process parameters, and corresponding physical substrate measurements and/or predictions from a different non-machine learning prediction model
which is recited at a high-level of generality with no detail of the training process and amounts to no more than adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea (See MPEP 2106.05(f))
The recitation of aerial images, target pattern geometry, or patterning process parameters, and corresponding physical substrate measurements and predictions from a different non-machine learning prediction model amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)). As such, the claim does not integrate the judicial exception into a practical application.
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception
As to claim 14,
Step 2A, Prong One
The claim recites in part:
wherein the instructions are further configured to cause the one or more processors to determine an adjustment for a semiconductor device manufacturing apparatus based on the predicted multi-dimensional output substrate geometry
Under the broadest reasonable interpretation, these limitations are process steps that cover a mathematical relationship, mathematical formula, or algorithm, which is identified as an abstract idea. Specifically, the recited tokenizing recites a data processing step involving organization and manipulation of data.
Accordingly, at Step 2A, Prong One, the claim is directed to an abstract idea.
Step 2A, Prong Two
Further the claim does not include additional elements that integrate this abstract idea into a practical application. “Determining” is performed using generic computer components performing their typical functions and does not provide a meaningful technological improvement.
Accordingly, at Step 2A, Prong Two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B
Nothing in the claim adds “significantly more” beyond generic computing.
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
As to claim 15,
Step 2A, Prong One
The claim does not recite an abstract idea or any other judicial exception and therefore passes Step 2A, Prong of the Alice/Mayo analysis.
Step 2A, Prong Two
The judicial exception is not integrated into a practical application. In particular, the claim recites the additional elements of:
wherein the instructions are further configured to cause the one or more processors to calibrate the machine learning prediction model based on one or both of after development inspection dimensions and after etch inspection dimensions associated with a semiconductor device manufacturing process
which is recited at a high-level of generality with no detail of the training process and amounts to no more than adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea (See MPEP 2106.05(f))
Accordingly, at Step 2A, Prong Two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception. The limitations:
wherein the instructions are further configured to cause the one or more processors to calibrate the machine learning prediction model based on one or both of after development inspection dimensions and after etch inspection dimensions associated with a semiconductor device manufacturing process
which is recited at a high-level of generality with no detail of the training process and amounts to no more than adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea (See MPEP 2106.05(f))
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception
As to claim 16,
Step 2A, Prong One
The claim recites in part:
predict, using the machine learning prediction model, output device geometry based on the input information, the output device geometry comprising a representation of a plurality of different probabilities, each probability associated with a different predicted location, across a major surface of the device, of a same portion of a pattern, the prediction comprising determination of an edge placement error (EPE) metric associated with one or more features of a pattern based on the input information and/or the output device geometry.
Under the broadest reasonable interpretation, these limitations are process steps that cover mental processes including an observation, evaluation, judgment or opinion that could be performed in the human mind or with the aid of pencil and paper. If a claim, under its broadest reasonable interpretation, covers a mental process but for the recitation of generic computer components, then it falls within the “Mental Process” grouping of abstract ideas. Accordingly, at Step 2A, Prong One, the claim is directed to an abstract idea.
Step 2A, Prong Two
The judicial exception is not integrated into a practical application. In particular, the claim recites the additional elements of:
receive input information including geometry information and/or patterning
process information for a device manufacturing process;
which amounts to extra-solution activity of gathering data for use in the claimed process. As described in MPEP 2106.05(g), limitations that amount to merely adding insignificant extra-solution activity to a judicial exception do not amount to significantly more than the exception itself, and cannot integrate a judicial exception into a practical application.
The claim further recites non-transitory computer-readable media and processors which are recited at a high-level of generality and amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
In addition, the recitation of edge placement error (EPE) metric amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)). As such, the claim does not integrate the judicial exception into a practical application.
Accordingly, at Step 2A, Prong Two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception. As discussed above, the additional elements of:
receive input information including geometry information and/or patterning
process information for a device manufacturing process;
are recited at a high level of generality and amounts to extra-solution activity of receiving data i.e. pre-solution activity of gathering data for use in the claimed process. The courts have found limitations directed to obtaining information electronically, recited at a high level of generality, to be well-understood, routine, and conventional (see MPEP 2106.05(d)(II), “receiving or transmitting data over a network”, "electronic record keeping," and "storing and retrieving information in memory").
The non-transitory computer-readable media and processors are recited at a high-level of generality and amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
In addition, the recitation of edge placement error (EPE) metric amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)). As such, the claim does not integrate the judicial exception into a practical application.
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
As to claim 17,
Step 2A, Prong One
The claim does not recite an abstract idea or any other judicial exception and therefore passes Step 2A, Prong of the Alice/Mayo analysis.
Step 2A, Prong Two
The judicial exception is not integrated into a practical application. In particular, the claim recites the additional elements of:
receive new input information determined based on an adjustment to the device manufacturing process, the adjustment determined based on the output device geometry
which amounts to extra-solution activity of gathering data for use in the claimed process. As described in MPEP 2106.05(g), limitations that amount to merely adding insignificant extra-solution activity to a judicial exception do not amount to significantly more than the exception itself, and cannot integrate a judicial exception into a practical application.
The claim further recites:
predict, using the machine learning model, updated output device geometry based on the new input information, including determination of an updated EPE metric based on the new input information and/or the updated output device geometry.
these elements are recited at a high-level of generality and amounts to no more than adding the words “apply it” to the judicial exception. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea (See MPEP 2106.05(f)). These limitations also amount to extra solution activity because it is a mere nominal or tangential addition to the claim, amounting to mere data output (see MPEP 2106.05(g)).
Accordingly, at Step 2A, Prong Two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception. As discussed above, the additional elements of:
receive new input information determined based on an adjustment to the device manufacturing process, the adjustment determined based on the output device geometry
are recited at a high level of generality and amounts to extra-solution activity of receiving data i.e. pre-solution activity of gathering data for use in the claimed process. The courts have found limitations directed to obtaining information electronically, recited at a high level of generality, to be well-understood, routine, and conventional (see MPEP 2106.05(d)(II), “receiving or transmitting data over a network”, "electronic record keeping," and "storing and retrieving information in memory").
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception. The limitations:
predict, using the machine learning model, updated output device geometry based on the new input information, including determination of an updated EPE metric based on the new input information and/or the updated output device geometry.
are recited at a high-level of generality and amounts to no more than adding the words “apply it” to the judicial exception. These limitations also amount to extra solution activity because it is a mere nominal or tangential addition to the claim, amounting to mere data output (see MPEP 2106.05(g)). The courts have similarly found limitations directed to displaying a result, recited at a high level of generality, to be well-understood, routine, and conventional. See (MPEP 2106.05(d)(II), "presenting offers and gathering statistics.", “determining an estimated outcome and setting a price”).
The recitation of question-answer pair, language model, and similarity score amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)).
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
As to claim 18, the limitations “wherein the representation of pattern probability comprises a pattern probability image that comprises predicted two-dimensional substrate geometry for one or more features of the pattern” amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)).
As to claim 19, the limitations “wherein the representation of pattern probability comprises predicted two-dimensional geometry of one or more vias in a semiconductor device” amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)).
As to claim 20,
Step 2A, Prong One
The claim recites in part:
wherein the instructions are further configured to cause the one or more processors to predict, with the machine learning prediction model, (1) a symmetric or asymmetric stochastic edge placement error band and/or (2) a stochastic failure rate, based on a pattern probability image
Under the broadest reasonable interpretation, these limitations are process steps that cover a mathematical relationship, mathematical formula, or algorithm, which is identified as an abstract idea. Specifically, the recited tokenizing recites a data processing step involving organization and manipulation of data.
Accordingly, at Step 2A, Prong One, the claim is directed to an abstract idea.
Step 2A, Prong Two
Further the claim does not include additional elements that integrate this abstract idea into a practical application. “Predicting” is performed using generic computer components performing their typical functions and does not provide a meaningful technological improvement.
The recitation of stochastic edge placement error band and stochastic failure rate amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)). As such, the claim does not integrate the judicial exception into a practical application.
Accordingly, at Step 2A, Prong Two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B
Nothing in the claim adds “significantly more” beyond generic computing.
The recitation of stochastic edge placement error band and stochastic failure rate amounts to generally linking the use of the judicial exception to a particular environment of field of use (See MPEP 2106.05(h)). As such, the claim does not integrate the judicial exception into a practical application.
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1 - 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sriraman et al (US 2017/0363950) in view of Staals et al (US 8,947,632)
As to claim 1, Sriraman et al teaches one or more non-transitory, computer-readable media storing a machine learning prediction model and instructions that, when executed by one or more processors (paragraph [0234]…the instructions may be provided on machine-readable, non-transitory media which may be coupled to and/or read by the system controller. The instructions may be executed on processor 1052—the system control instructions, in some embodiments, loaded into memory device 1056 from mass storage device 1054), are configured to cause the one or more processors to at least:
receive input information including geometry information and/or process information for a pattern (paragraph [0008]…receiving an initial design layout, and instructions for identifying a feature in the initial design layout, the feature's pattern corresponding to a feature that would be etched into a material stack on a semiconductor substrate's surface via a plasma-based etch process); and
predict (paragraph [0114]…the mesh of values which are output by the etch profile model provide an estimation of where, in physical space, the edge of the feature profile is located at different vertical elevations), using the machine learning prediction model (paragraph [0114]…etch profile model), multi-dimensional output substrate geometry based on the input information (paragraph [0114]…from this information (from these values at the mesh points) one can compute a feature width at different elevations, or in another view, a horizontal coordinate of the edge (relative to some baseline) for each elevation. This is illustrated in FIG. 2. This set of coordinates may then be viewed as a point in multi-dimensional space representing the particular feature profile), the prediction comprising determination of an edge placement error (EPE) metric associated with one or more features of the pattern based on the input information and/or the output substrate geometry (paragraph [0126]… estimating edge placement error (EPE) is typically quite important in lithographic work, and an accurate calculation of profile shape provides that information) and the multidimensional substrate geometry indicating, for a same portion of the pattern, predictions of the same portion at two more different locations across a major surface of the substrate. (Paragraph [0065]…The models launch pseudo-particles with energy and angular distributions produced by a plasma model or experimental diagnostics for arbitrary radial locations on the wafer. The pseudo-particles are statistically weighted to represent the fluxes of radicals and ions to the surface. The models address various surface reaction mechanisms resulting in etching, sputtering, mixing, and deposition on the surface to predict profile evolution).
Sriraman et al fails to explicitly show/teach the multidimensional substrate geometry indicating, for a same portion of the pattern, predictions of the same portion at two more different locations across a major surface of the substrate.
However, Staals et al teaches a multidimensional substrate geometry indicating, for a same portion of the pattern, predictions of the same portion at two more different locations across a major surface of the substrate (column 10, lines 5 – 30 teaches… a lithographic apparatus comprising: a patterning subsystem for transferring a pattern from a patterning device onto a substrate, the patterning subsystem being controlled in accordance with measurements of level variations across a surface of the substrate; a level sensor for projecting a patterned level sensing beam of radiation to reflect from a location on the substrate surface and for detecting the reflected sensing beam to record a height of the surface level at said location, wherein said level sensor incorporates at least one moving optical element and whereby said level sensor is arranged for optically scanning the substrate surface by the level sensing beam in at least one dimension to obtain measurements of the height of the surface level at different locations without corresponding mechanical movement between the level sensor and the substrate; and a focus control arrangement for maintaining focus of said patterned beam on said substrate during said level sensing beam scan as an indication of focus error; wherein said focus control arrangement is responsive to height variations measured during at least one previous sensing beam scan as a predictor of focus error in a current level sensing scan of the level sensing beam of radiation ).
Therefore, it would have been obvious for one having ordinary skill in the art, at the time the invention was made for Sriraman et al’s multidimensional substrate geometry indicating, for a same portion of the pattern, predictions of the same portion at two more different locations across a major surface of the substrate, as in Staals et al, for the purpose of measuring level variations across a surface of substrate.
As to claim 2, Sriraman et al teaches the media, wherein the EPE metric (paragraph [0126]… edge placement error (EPE)) is symmetric or asymmetric (paragraph [0166]… While the labyrinth seal 948 is shown as symmetrical about the RF bias housing arm 934, in other embodiments the labyrinth seal 948 may be asymmetrical about the RF bias arm 934) for the one or more features of the pattern.
As to claim 3, Sriraman et al teaches the media, wherein the machine learning prediction model (paragraph [0114]…etch profile model) is trained using asymmetrically distributed training data such that weights and/or parameters of the trained machine learning prediction model (paragraph [0101]…half or some other fraction of these etch profiles (and associated parameter sets) are used for training, as illustrated in the above flow charts, and the remaining etch profiles are used for validation. The training etch profiles generate tuned model parameters, which are used in the etch profile model and validated by applying the tuned model to predict etch profiles for the validation set. If the error between experimental and theoretical etch profiles for the validation set is statistically higher than the error found at convergence using the training set, a different training set is used to tune the model as before) facilitate determination of the symmetric or asymmetric EPE metric (paragraph [0166]… While the labyrinth seal 948 is shown as symmetrical about the RF bias housing arm 934, in other embodiments the labyrinth seal 948 may be asymmetrical about the RF bias arm 934).
As to claim 4, Sriraman et al teaches the media, wherein the asymmetrically distributed training data comprises asymmetrically distributed EPE metrics determined from multi-dimensional probability images associated with asymmetrically distributed critical dimension (CD) values (paragraph [0054]…such a width is referred to as a “critical dimension” (labeled “CD” in FIG. 2) and that the elevation from the base of the feature may be referred to as the height or the z-coordinate (labeled as percentages in FIG. 2) of the so-referred-to critical dimension. As mentioned, the etch profile may be represented in other geometric references such as by a group of vectors from a common origin or a stack of shapes such as trapezoids or triangles or a group of characteristic shape parameters that define a typical etch profile such as bow, straight or tapered sidewall, rounded bottom, facet etc).
As to claim 5, Sriraman et al teaches the media, wherein the multi-dimensional output substrate geometry indicates variability in shapes of features of the pattern (paragraph [0114]…this set of coordinates may then be viewed as a point in multi-dimensional space representing the particular feature profile. This vector space may be an orthogonal space, or it may be a non-orthogonal space, however a linear transformation may be made of this representation to an orthogonal space. If so, then the transformed point's coordinates are distances in relation to a set of orthogonal axes in that space. In any event, when “profile coordinates” are referred to in this document, this refers generally to any appropriate (approximate) mathematical representation of the profile shape).
As to claim 6, Sriraman et al teaches the media, wherein the multi-dimensional output substrate geometry indicates a probability that a given geometry occupies a given location on a substrate (paragraph [0114]…this set of coordinates may then be viewed as a point in multi-dimensional space representing the particular feature profile. This vector space may be an orthogonal space, or it may be a non-orthogonal space, however a linear transformation may be made of this representation to an orthogonal space. If so, then the transformed point's coordinates are distances in relation to a set of orthogonal axes in that space. In any event, when “profile coordinates” are referred to in this document, this refers generally to any appropriate (approximate) mathematical representation of the profile shape).
As to claim 7, Sriraman et al teaches the media, wherein the multi-dimensional output substrate geometry comprises a representation of pattern probability in a plurality of dimensions (paragraph [0181]…in the current state-of-the-art method for generating a photomask for a patterned etch process, remediation of pattern proximity defects (i.e., “pattern proximity correction”) is addressed by either an empirical rules-based correction strategy or an empirical model-based correction strategy).
As to claim 8, Sriraman et al teaches the media, wherein the instructions are further configured to cause the one or more processors to predict, with the machine learning prediction model (paragraph [0114]…etch profile model), one-or-both-of (1) a symmetric or asymmetric stochastic edge placement error band (paragraph [0166]… While the labyrinth seal 948 is shown as symmetrical about the RF bias housing arm 934, in other embodiments the labyrinth seal 948 may be asymmetrical about the RF bias arm 934). and/or (2) a stochastic failure rate, based on the mulli-dimensional output substrate geometry (paragraph [0054]…an etch profile (EP) refers to any set of values for a set of one or more geometric coordinates which may be used to characterize the shape of an etched feature on a semiconductor substrate. In a simple case, an etch profile can be approximated as the width of a feature determined halfway to the base of the feature (the midpoint between the feature's base (or bottom) and it's top opening on the surface of the substrate) as viewed through a 2-dimensional vertical cross-sectional slice through the feature).
As to claim 9, Sriraman et al teaches the media, wherein the instructions are further configured to cause the one or more processors io tune the machine learning prediction model (paragraph [0058]…these model parameters are tuned or adjusted during the optimization techniques described herein. In some embodiments, some of the reaction parameters are model parameters to be optimized, while others are used as independent input variables) such that the multi-dimensional output substrate geometry matches a measured stochastic edge placement error band or measured failure rate, or matches a mean contour prediction from an optical proximity correction model or a lithography manufacturability check model (paragraph [0126]…Lithographic operations and mask development may also benefit greatly from accurate etch profile modeling because estimating edge placement error (EPE) is typically quite important in lithographic work, and an accurate calculation of profile shape provides that information. In some embodiments, through rigorous physics-based EPE estimation, an optimized EPM may be used to generate a pattern proximity-corrected (PPC) design layout for photoresist in a much shorter timeframe than typically attends the semi-empirical trial and error process for pattern proximity-correction (PPC) now in widespread use. Details are provided below).
As to claim 10, Sriraman et al teaches the media, wherein the multi-dimensional output substrate geometry comprises a pattern probability image, and wherein the instructions are further configured to cause the one or more processors to use the pattern probability image for a lithography manufacturability check (paragraph [0126]…Lithographic operations and mask development may also benefit greatly from accurate etch profile modeling because estimating edge placement error (EPE) is typically quite important in lithographic work, and an accurate calculation of profile shape provides that information. In some embodiments, through rigorous physics-based EPE estimation, an optimized EPM may be used to generate a pattern proximity-corrected (PPC) design layout for photoresist in a much shorter timeframe than typically attends the semi-empirical trial and error process for pattern proximity-correction (PPC) now in widespread use. Details are provided below) and/or pattern fidelity metrology in a semiconductor device manufacturing process (paragraph [0249]…the various apparatuses and methods described above may be used in conjunction with lithographic patterning tools and/or processes, for example, for the fabrication or manufacture of semiconductor devices, displays, LEDs, photovoltaic panels and the like).
As to claim 11, Sriraman et al teaches the media, wherein the input information comprises one or more selected from: a simulated aerial image, a simulated resist image, target substrate dimensions (paragraph [0187]…a target calibration pattern/layout), or data from a lithography apparatus scanner associated with semiconductor device manufacturing (paragraph [0126]…Lithographic operations and mask development may also benefit greatly from accurate etch profile modeling because estimating edge placement error (EPE) is typically quite important in lithographic work, and an accurate calculation of profile shape provides that information), for a semiconductor device (paragraph [0064]…operate to simulate a wafer feature's topographical evolution over time in the context of semiconductor wafer fabrication).
As to claim 12, Sriraman et al teaches the media, wherein the input information comprises a plurality of aerial images, and individual aerial images of the plurality of aerial images correspond to different heights in resist layers associated with a patterning process (paragraph [0106]…a specific example illustrating the foregoing individual layer-by-layer optimization procedure, consider the case of modeling the etching of a layer underneath an etch mask, where both the etch mask layer and the layer beneath it are etched to some extent. This thus constitutes a 2-layer etch model where the parameters for each of the two layers may be individually optimized prior to full simultaneous optimization of the model parameters corresponding to both layers).
As to claim 13, Sriraman et al teaches the media, wherein the instructions are further configured to cause the one or more processors to train the machine learning prediction model with training information comprising one or more selected from: aerial images, target pattern geometry, or patterning process parameters, and corresponding physical substrate measurements and/or predictions from a different non-machine learning prediction model (paragraph [0006]…a trained machine learning model (MLM) which during operation may compare one or more quantities characteristic of IFPF to those in the LUT, and interpolate between values in the LUT. In certain such embodiments, the MLM was trained on a dataset generated by running the computerized EPM, at least a subset of which was used to construct the LUT).
As to claim 14, Sriraman et al teaches the media, wherein the instructions are further configured to cause the one or more processors to determine an adjustment for a semiconductor device manufacturing apparatus based on the predicted multi-dimensional output substrate geometry (paragraph [0253]… Without limitation, example systems may include a plasma etch chamber or module (employing inductively or capacitively coupled plasmas), a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and/or manufacturing of semiconductor wafers).
As to claim 15, Sriraman et al teaches the media, wherein the instructions are further configured to cause the one or more processors to calibrate the machine learning prediction model based on one or both of after development inspection dimensions and after each inspection dimensions associated with a semiconductor device manufacturing process (paragraph [0253]… Without limitation, example systems may include a plasma etch chamber or module (employing inductively or capacitively coupled plasmas), a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and/or manufacturing of semiconductor wafers).
Claim(s) 16- 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sriraman et al (US 2017/0363950) in view of Wei (US 7,941,768).
As to claim 16, Sriraman et al teaches one or more non-transistory, computer-readable media storing a machine learning prediction model and instructions that, when executed by one or more processors (paragraph [0234]… Machine-readable system control instructions 1058 may be provided for implementing/performing the film deposition and/or etch processes described herein. The instructions may be provided on machine-readable, non-transistory media which may be coupled to and/or read by the system controller. The instructions may be executed on processor 1052—the system control instructions, in some embodiments, loaded into memory device 1056 from mass storage device 1054), are configured to cause the one or more processors to at least:
receive input information including geometry information and/or patterning
process information for a device manufacturing process (paragraph [0008]…receiving an initial design layout, and instructions for identifying a feature in the initial design layout, the feature's pattern corresponding to a feature that would be etched into a material stack on a semiconductor substrate's surface via a plasma-based etch process); and
predict (paragraph [0114]…the mesh of values which are output by the etch profile model provide an estimation of where, in physical space, the edge of the feature profile is located at different vertical elevations), using the machine learning prediction model (paragraph [0114]…etch profile model), output device geometry based on the input information (paragraph [0114]…from this information (from these values at the mesh points) one can compute a feature width at different elevations, or in another view, a horizontal coordinate of the edge (relative to some baseline) for each elevation. This is illustrated in FIG. 2. This set of coordinates may then be viewed as a point in multi-dimensional space representing the particular feature profile), the prediction comprising determination of an edge placement error (EPE) metric associated with one or more features of a pattern based on the input information and/or the output device geometry (paragraph [0126]… estimating edge placement error (EPE) is typically quite important in lithographic work, and an accurate calculation of profile shape provides that information)
Sriraman et al fails to explicitly show/teach the output device geometry comprising a representation of a plurality of different probabilities, each probability associated with a different predicted location, across a major surface of the device, of a same portion of a pattern.
However, Wei teaches output device geometry comprising a representation of a plurality of different probabilities, each probability associated with a different predicted location, across a major surface of the device, of a same portion of a pattern (column 9, lines 15 – 60… he design intent and mask layout of step 904 preferably will be used to produce the intended wafer patterns. In step 908, a pre-calibrated variational process model is input into the photolithography simulator 910. In step 906, the user, which may be for example a fab engineer doing the lithography verification, inputs the process variable values for a multiple process conditions. The multiple process conditions can be input as a list of process variations and ranges of such process variations (for process-window-constrained verification), and probability distribution of such process variations (for yield-constrained verification). In step 916, design constraints such as a set of design rules that specify constraints on the wafer patterns are also input into photolithography simulator 910. In step 912, the manufacturability of the design intent is simulated at the plurality of process conditions. Computer simulations are carried out using the pre-calibrated process model to predict the varying wafer patterns as would be printed under different process conditions. In step 914, the simulated wafer patterns are checked against the design constraints. In step 920, the results of the check at step 914 are reported as a simple yes/no for the given mask design. Alternatively, in step 922, marks of yes/no that constraint violations are passed are given over the given ranges of process variations, namely, over the whole hyperspace of process variations, with the process conditions marked by "yes" constitute a process window (for process-window-constrained verification). Alternatively, selected process conditions may be displayed to signify the boundary of yield as a curve, surface, or hyper-surface, which encloses the process window in a hyperspace of process variations. For example, in step 922, the process window is preferably displayed to the user showing where on the process variable space the design has passed, and where it has failed some of the constraints. According to a further embodiment, in step 928, the locations on the chip where constraint violations occurred in conjunction with process conditions that induce constraint violations are displayed to the user. According to yet a further embodiment, in step 926, the intended and simulated wafer patterns responsible for the constraint violations are displayed to the user. According to yet a further embodiment, in step 924, the report may be an estimated yield percentage or a yes/no that a target yield value is reached).
Therefore, it would have been obvious for one having ordinary skill in the art, at the time the invention was made for Sriraman et al’s output device geometry comprising a representation of a plurality of different probabilities, each probability associated with a different predicted location, across a major surface of the device, of a same portion of a pattern, as in Weis et al, for the purpose of improved design and manufacture of ICs through computer simulation of photolithographic processes.
As to claim 17, Sriraman et al teaches the media, wherein the instructions are further configured to cause the one or more processors to:
receive new input information determined based on an adjustment to the device manufacturing process, the adjustment determined based on the output device geometry (paragraph [0008]…receiving an initial design layout, and instructions for identifying a feature in the initial design layout, the feature's pattern corresponding to a feature that would be etched into a material stack on a semiconductor substrate's surface via a plasma-based etch process); and
predict (paragraph [0114]…the mesh of values which are output by the etch profile model provide an estimation of where, in physical space, the edge of the feature profile is located at different vertical elevations), using the machine learning model (paragraph [0114]…etch profile model), updated output device geometry (paragraph [0086]… once the parameter set is updated, the method runs a new etch experiment (block 476) using the parameters of the current parameter set. Next, the method generates and saves an experimental etch profile (block 478) measured on the work piece after the etch experiment runs with the current parameter set. The “generate and save etch profile” operation provides the etch profile in a reduced dimensional space, as explained above, such as a principal components representation of the etch profile) based on the new input information, including determination of an updated EPE metric based on the new input information and/or the updated output device geometry (paragraph [0126]… estimating edge placement error (EPE) is typically quite important in lithographic work, and an accurate calculation of profile shape provides that information)..
As to claim 18, Sriraman et al teaches the media, wherein the representation of pattern probability comprises a pattern probability image that comprises predicted two-dimensional substrate geometry for one or more features of the pattern (paragraph [0114]…this set of coordinates may then be viewed as a point in multi-dimensional space representing the particular feature profile. This vector space may be an orthogonal space, or it may be a non-orthogonal space, however a linear transformation may be made of this representation to an orthogonal space. If so, then the transformed point's coordinates are distances in relation to a set of orthogonal axes in that space. In any event, when “profile coordinates” are referred to in this document, this refers generally to any appropriate (approximate) mathematical representation of the profile shape).
As to claim 19, Sriraman et al teaches the media, wherein the representation of pattern probability comprises predicted two-dimensional geometry of one or more vias in a semiconductor device (paragraph [0114]…this set of coordinates may then be viewed as a point in multi-dimensional space representing the particular feature profile. This vector space may be an orthogonal space, or it may be a non-orthogonal space, however a linear transformation may be made of this representation to an orthogonal space. If so, then the transformed point's coordinates are distances in relation to a set of orthogonal axes in that space. In any event, when “profile coordinates” are referred to in this document, this refers generally to any appropriate (approximate) mathematical representation of the profile shape).
As to claim 20, Sriraman et al teaches the media, wherein the instructions are further configured to cause the one or more processors to predict, with the machine learning prediction model (paragraph [0114]…etch profile model), (1) a symmetric or asymmetric stochastic edge placement error band paragraph [0166]… While the labyrinth seal 948 is shown as symmetrical about the RF bias housing arm 934, in other embodiments the labyrinth seal 948 may be asymmetrical about the RF bias arm 934) and/or (2) a stochastic failure rate, based on a pattern probability image (paragraph [0054]…an etch profile (EP) refers to any set of values for a set of one or more geometric coordinates which may be used to characterize the shape of an etched feature on a semiconductor substrate. In a simple case, an etch profile can be approximated as the width of a feature determined halfway to the base of the feature (the midpoint between the feature's base (or bottom) and it's top opening on the surface of the substrate) as viewed through a 2-dimensional vertical cross-sectional slice through the feature).
Response to Arguments
Applicant's arguments filed 11/25/2025 have been fully considered but they are not persuasive.
Claim Rejections - 35 USC § 101
The 101 Rejection still has not been overcome. The claims are abstract and the steps in the claims can be completed with a mental process and/or generic computer components. Additionally, the steps in the claims do not describe an improvement of technology in any way.
The applicant argues:
Even if the claimed subject matter is directed to an abstract idea (which Applicant does not concede), Applicant submits that the claimed subject matter is directed to a "practical application." In particular, the claimed technique is directed to prediction of the manufactured physical geometry of a substrate/device that is affected by, e.g., stochastics in the substrate/device manufacturing process. It does this by using the machine learning model to identify the variation / probability of different locations at a substrate or device that a particular part of a pattern can be manufactured at different times. See, e.g., paragraphs [0130]-[0137] of the specification. The ability to identify variation arising from, e.g., stochastics in manufacturing of a substrate/device (something that surely can't be done in the mind nor merely involves a mathematical algorithm) is surely a "practical application."
Applicant submits that the present analysis of "practical application" fails to analyze the claimed subject matter as a whole. The assertions that "extra-solution activity of gathering data" and "non-transitory computer-readable media and processors amounts to no more than mere instructions to apply the exception using a generic computer component" fail to provide a "practical application" ignores the claimed subject matter as whole. The "practical application" is not merely "extra-solution activity of gathering data" and "non-transitory computer-readable media and processors amounts to no more than mere instructions to apply the exception using a generic computer component", rather the practical application is the ability to predict the manufactured physical geometry of a substrate/device that is affected by, e.g., stochastics in the substrate/device manufacturing process.
In this case, the claims are rejected with the same type of considerations - ""extra-solution activity of gathering data" and "non-transitory computer-readable media and processors amounts to no more than mere instructions to apply the exception using a generic computer component." As discussed above, when the claim language is viewed as whole (rather than dissected into parts), it is apparent that the claimed subject matter is directed to a "practical application" of predicting the manufactured physical geometry of a substrate/device that is affected by, e.g., stochastics in the substrate/device manufacturing process. See, e.g., paragraphs [0130]-[0137] of the specification.
The examiner disagrees. The arguments presented rely on limitations that are neither explicitly recited in the claims nor reasonably inferred from them. At no point in the pending claims does the applicant assert, describe, or even suggest the limitation of “machine learning model to identify the variation / probability of different locations at a substrate or device that a particular part of a pattern can be manufactured at different times. The ability to identify variation arising from, e.g., stochastics in manufacturing of a substrate/device.” Rather, the appellant appears to have introduced this language as part of the argument, but such a limitation cannot be read into the claims when it is not supported by the actual claim language. The applicant needs to add these limitations to the claim.
The claims (and applicant’s arguments) are still directed to an abstract idea (organizing, analyzing, processing information) which falls within the judicial exception indetified by the courts, and the additional elements recited in the claims merely emply generic computer components performing their convention functions. The claims do not integrate the abstract idea into a practical application and do not recite an improvement to computer functionality itself, but instead use a computer as a tool to execute the abstract idea, and further, the claim limitations, whether considered individually or in combination, do not amount to significantly more than the abstract idea, as the are well-understood , routine and conventional,
Claim Rejections - 35 USC § 102
The newly added limitations overcame the 102 rejection and the 102 rejection has been withdrawn.
As to claim 1, Staals et al teaches a multidimensional substrate geometry indicating, for a same portion of the pattern, predictions of the same portion at two more different locations across a major surface of the substrate (column 10, lines 5 – 30 teaches… a lithographic apparatus comprising: a patterning subsystem for transferring a pattern from a patterning device onto a substrate, the patterning subsystem being controlled in accordance with measurements of level variations across a surface of the substrate; a level sensor for projecting a patterned level sensing beam of radiation to reflect from a location on the substrate surface and for detecting the reflected sensing beam to record a height of the surface level at said location, wherein said level sensor incorporates at least one moving optical element and whereby said level sensor is arranged for optically scanning the substrate surface by the level sensing beam in at least one dimension to obtain measurements of the height of the surface level at different locations without corresponding mechanical movement between the level sensor and the substrate; and a focus control arrangement for maintaining focus of said patterned beam on said substrate during said level sensing beam scan as an indication of focus error; wherein said focus control arrangement is responsive to height variations measured during at least one previous sensing beam scan as a predictor of focus error in a current level sensing scan of the level sensing beam of radiation ).
Therefore, Sriraman et al in view of Staals et al clearly shows all the limitations as claimed.
As to claim 16, Wei teaches output device geometry comprising a representation of a plurality of different probabilities, each probability associated with a different predicted location, across a major surface of the device, of a same portion of a pattern (column 9, lines 15 – 60… he design intent and mask layout of step 904 preferably will be used to produce the intended wafer patterns. In step 908, a pre-calibrated variational process model is input into the photolithography simulator 910. In step 906, the user, which may be for example a fab engineer doing the lithography verification, inputs the process variable values for a multiple process conditions. The multiple process conditions can be input as a list of process variations and ranges of such process variations (for process-window-constrained verification), and probability distribution of such process variations (for yield-constrained verification). In step 916, design constraints such as a set of design rules that specify constraints on the wafer patterns are also input into photolithography simulator 910. In step 912, the manufacturability of the design intent is simulated at the plurality of process conditions. Computer simulations are carried out using the pre-calibrated process model to predict the varying wafer patterns as would be printed under different process conditions. In step 914, the simulated wafer patterns are checked against the design constraints. In step 920, the results of the check at step 914 are reported as a simple yes/no for the given mask design. Alternatively, in step 922, marks of yes/no that constraint violations are passed are given over the given ranges of process variations, namely, over the whole hyperspace of process variations, with the process conditions marked by "yes" constitute a process window (for process-window-constrained verification). Alternatively, selected process conditions may be displayed to signify the boundary of yield as a curve, surface, or hyper-surface, which encloses the process window in a hyperspace of process variations. For example, in step 922, the process window is preferably displayed to the user showing where on the process variable space the design has passed, and where it has failed some of the constraints. According to a further embodiment, in step 928, the locations on the chip where constraint violations occurred in conjunction with process conditions that induce constraint violations are displayed to the user. According to yet a further embodiment, in step 926, the intended and simulated wafer patterns responsible for the constraint violations are displayed to the user. According to yet a further embodiment, in step 924, the report may be an estimated yield percentage or a yes/no that a target yield value is reached).
Therefore, Sriraman et al in view of Wei et al shows all the limitations as claimed.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRANDON S COLE whose telephone number is (571)270-5075. The examiner can normally be reached Mon - Fri 7:30pm - 5pm EST (Alternate Friday's Off).
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/BRANDON S COLE/ Primary Examiner, Art Unit 2128
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