DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Applicant’s amendment dated 07/14/2026, in which claims 1, 6, 8, 12, 21, 25, 27-28 were amended, claims 10 and 23 were withdrawn, claims 4-5, 15-20, 22, 24, 26 were cancelled, claims 30-32 were added, has been entered.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the feature of “wherein the gate stack via opening extends through the third dielectric layer, through the second dielectric layer, and into the first dielectric layer” of claim 8 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The specification is objected to as failing to provide proper antecedent basis for the claimed subject matter. See 37 CFR 1.75(d)(1) and MPEP § 608.01(o). Correction of the following is required: claim 8 recites the limitation “wherein the gate stack via opening extends through the third dielectric layer, through the second dielectric layer, and into the first dielectric layer”. However, the specification does not describe any gate stack via opening extends into the first dielectric layer around the gate stack.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 8-9, 11-14, 30-32 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for pre-AIA the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claim 8, claim 8 recites the limitation “wherein the gate stack via opening extends through the third dielectric layer, through the second dielectric layer, and into the first dielectric layer”. However, the specification does not describe any gate stack via opening extends into the first dielectric layer around the gate stack. Further, there is no description of any such steps whether conventional or inventive that demonstrates possession thereof or therefor. Accordingly, claim 8 and all claims depending therefrom were not in possession of Applicant at the time of filing.
Claims 9, 11-14, 30-32 depending from the rejected claims noted above are rejected at least on the same basis as the claim(s) from which the dependent claims depend.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-3, 6 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, claim 1 recites “wherein the performing the bottom-up deposition process comprises adjusting an incubation time delay of the bottom-up deposition process by adjusting a mixing ratio between the diatomic oxygen and the diatomic hydrogen in the gas mixture used to form the plasma”. However, previous limitation of claim 1 recites “performing a post etching treatment, wherein the post etching treatment comprises forming a plasma from a gas mixture that includes a first gas and a second gas, wherein the first gas comprises diatomic oxygen, and the second gas comprises diatomic hydrogen… after the performing the post etching treatment, performing a bottom-up deposition process.” It is unclear how “the performing the bottom-up deposition process comprises … adjusting a mixing ratio between the diatomic oxygen and the diatomic hydrogen in the gas mixture” when the bottom-up deposition process is performed after the gas mixture is mixed and used in the previous post etching treatment.
For the purpose of this Action, the limitation of “wherein the performing the bottom-up deposition process comprises adjusting an incubation time delay of the bottom-up deposition process by adjusting a mixing ratio between the diatomic oxygen and the diatomic hydrogen in the gas mixture used to form the plasma” will be examined and interpreted as --wherein an incubation time delay of the bottom-up deposition process resulting from a mixing ratio between the diatomic oxygen and the diatomic hydrogen in the gas mixture used to form the plasma--.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 6 are rejected under 35 U.S.C. 103 as being unpatentable over Tsai et al. (US Pub. 20200365698) in view of Huang et al. (US Pub. 20200243385), Chandrashekar et al. (US Pub. 20130302980), and Mebarki et al. (US Pub. 20210287898).
Regarding claims 1 and 3, Tsai et al. discloses in Fig. 2-3, Fig. 10-11 a method of manufacturing a semiconductor device, the method comprising:
forming a gate contact layer [301] over a gate electrode [a first conductive layer, a first metal material, a work function layer, and a first barrier layer a fill material of gate stack 603], the gate electrode [a first conductive layer, a first metal material, a work function layer, and a first barrier layer a fill material of gate stack 603] over a channel region of a semiconductor material [107], wherein the gate contact layer [301] comprises tungsten and has a first planar surface facing a substrate, the first planar surface extending from a first side of the gate contact layer [301] to a second side of the gate contact layer [301] opposite the first side, the first side of the gate contact layer [301] and the second side of the gate contact layer [301] being outermost sides of the gate contact layer [301][Figs. 2-3, paragraph [0037]-[0048]];
forming an etch stop layer [1101] over the gate contact layer [301][Fig.11, paragraph [0069]];
forming a dielectric layer [1103] over the etch stop layer [1101], the dielectric layer [1103] having a second planar surface facing the substrate, the second planar surface extending from a first side of the dielectric layer [1103] to a second side of the dielectric layer opposite the first side of the dielectric layer [1103], the first side of the dielectric layer and the second side of the dielectric layer [1103] being outermost sides of the dielectric layer [1103][Fig. 11, paragraph [0070]][before forming the via contacts, the planarized dielectric layer [1103] must have a second planar surface/bottom surface extending from a outermost side of the dielectric layer [1103] to another outermost side of the dielectric layer];
performing an etching process to form a first opening [opening for gate via contact 1105], wherein the first opening [opening for gate via contact 1105] extends through the dielectric layer [1103] and the etch stop layer [1101] to expose the gate contact layer [301], the performing the etching process producing etch by-products in the first opening [Fig. 11, paragraph [0071]][Tsai discloses the claimed etching process. Tsai further discloses “the openings may be formed using any combination of acceptable photolithography and suitable etching techniques such as dry etching process (e.g., plasma etch, reactive ion etch (RIE), physical etching (e.g., ion beam etch (IBE))), wet etching, combinations thereof, and the like. However, any suitable etching processes may be utilized to form the contact via openings”. Thus, it appears that the etching processes disclosed by Tsai would produce etch by-products in the first opening as the claimed etching process.]
performing a deposition process to deposit a first material [material of 1105], wherein the performing the deposition process initializes a growth of the first material [material of 1105] on the gate contact layer [301][Fig. 11, paragraph [0072]].
Tsai et al. fails to disclose
wherein the gate contact layer comprises fluorine free tungsten.
Huang et al. discloses in Fig. 2J, paragraph [0023]
wherein the gate contact layer [128] comprises fluorine free tungsten.
Huang et al. further discloses in Fig. 2J,
before forming via contacts, the dielectric layer [152] having a second planar surface facing the substrate, the second planar surface extending from a first side of the dielectric layer [152] to a second side of the dielectric layer [152] opposite the first side of the dielectric layer [152], the first side of the dielectric layer [152] and the second side of the dielectric layer [152] being outermost sides of the dielectric layer [152].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Huang et al. into the method of Tsai et al. to include wherein the gate contact layer comprises fluorine free tungsten. The ordinary artisan would have been motivated to modify Tsai et al. in the above manner for the purpose of providing suitable material of gate contact layer.
Tsai et al. fails to disclose
the deposition process to deposit the first material comprises a bottom-up deposition process; and
wherein after the performing the bottom-up deposition process, the first material has a top surface between a top surface of the dielectric layer and a bottom surface of the dielectric layer.
Chandrashekar et al. discloses in Fig. 3B, Fig.4B, paragraph [0042], [0061], [0062], [0070], [0079], [0086], [0088]
the deposition process [335 or 464] to deposit the first material [tungsten] comprises a bottom-up deposition process; and
wherein after the performing the bottom-up deposition process [335 or 464], the first material [404] has a top surface between a top surface of the dielectric layer and a bottom surface of the dielectric layer.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Chandrashekar et al. into the method of Tsai et al. to include the deposition process to deposit the first material comprises a bottom-up deposition process; and wherein after the performing the bottom-up deposition process, the first material has a top surface between a top surface of the dielectric layer and a bottom surface of the dielectric layer. The ordinary artisan would have been motivated to modify Tsai et al. in the above manner for the purpose of providing a method for forming a tungsten layer with large, vertically-oriented grain growth to provide improved electrical characteristics while the formation of a seam can be avoided, providing advantages such as no trapping of CMP slurry along the seam, no trapping of gaseous impurities like HF in the seam, and minimize electron transport losses at the seam in device [paragraph [0086], [0088] of Chandrashekar et al., and paragraph [0047] of Khaderbad et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Tsai et al. fails to disclose
performing a post etching treatment, wherein the post etching treatment comprises forming a plasma from agas mixture that includes a first gas and a second gas, wherein the first gas comprises diatomic oxygen, and the second gas comprises diatomic hydrogen, wherein the plasma does not comprise nitrogen; and
after the performing the post etching treatment, performing the bottom-up deposition process to fill the first opening;
wherein an incubation time delay of the bottom-up deposition process resulting from a mixing ratio between the diatomic oxygen and the diatomic hydrogen in the gas mixture used to form the plasma;
wherein the plasma further does not comprise an inert gas.
Mebarki et al. discloses in Fig. 3, Fig. 5, paragraph [0049]-[0064], [0095]-[0100], [0111]
performing a post etching treatment [210 or 610], wherein the post etching treatment [210 or 610] comprises forming a plasma from a gas mixture that includes a first gas and a second gas, wherein the first gas comprises diatomic oxygen [O2], and the second gas comprises diatomic hydrogen [H2], wherein the plasma [H2 and O2)] does not comprise nitrogen [paragraph [0050], [0097]]; and
after the performing the post etching treatment [210 or 610], performing the bottom-up deposition process to fill the opening [paragraph [0064], [0111]];
wherein the plasma [H2 and O2] further does not comprise an inert gas [paragraph [0050], [0097]].
Mebarki et al. further discloses in paragraph [0054], [0100] that a mixing ratio between the diatomic oxygen and the diatomic hydrogen in the gas mixture used to form the plasma can be adjusted. Thus, the plasma treatment 201 or 601 of Mebarki et al. result to “wherein an incubation time delay of the bottom-up deposition process resulting from a mixing ratio between the diatomic oxygen and the diatomic hydrogen in the gas mixture used to form the plasma.”
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Mebarki et al. into the method of Tsai et al. to include performing a post etching treatment, wherein the post etching treatment comprises forming a plasma from agas mixture that includes a first gas and a second gas, wherein the first gas comprises diatomic oxygen, and the second gas comprises diatomic hydrogen, wherein the plasma does not comprise nitrogen; and after the performing the post etching treatment, performing the bottom-up deposition process to fill the first opening; wherein an incubation time delay of the bottom-up deposition process resulting from a mixing ratio between the diatomic oxygen and the diatomic hydrogen in the gas mixture used to form the plasma; wherein the plasma further does not comprise an inert gas. The ordinary artisan would have been motivated to modify Tsai et al. in the above manner for the purpose of providing a method for removing contaminants and forming a clean dielectric surface and a clean metal surface [paragraph [0012] of Mebarki et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claim 2, Tsai et al. discloses in Fig. 11, paragraph [0073] wherein the deposition process deposits tungsten. Mebarki et al. discloses in paragraph [0111] and Chandrashekar et al. discloses in paragraph [0042], [0061], [0062], [0070], [0079], [0086], [0088] wherein the bottom-up deposition process deposits tungsten.
Regarding claim 6, Mebarki et al. discloses in paragraph [0050], [0100]
wherein the gas mixture comprising 95% diatomic hydrogen and 5% diatomic oxygen [the ratio of the hydrogen flow rate to the oxygen flow rate is in a range of about 1:2 to about 20:1…the molar ratio of hydrogen gas to oxygen gas within the plasma gas is in a range of about 1:2 to about 20:1].
Further, selecting optimal value for hydrogen gas and oxygen gas in a gas mixture to achieve the intended performance is within a skill of one ordinary artisan.
In addition, Applicant has not provided any criticality of the claimed value.
The ordinary artisan would have been motivated to modify Tsai et al., Chandrashekar et al., Mebarki et al. in the manner set forth above for at least the purpose of optimization and routine experimentation to achieve desired preclean efficiency and selectivity. The claimed ranges are merely optimizations, and as such are not patentable over the prior art. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). "The normal desire of scientists or artisans to improve upon what is already generally known provides the motivation to determine where in a disclosed set of percentage ranges is the optimum combination of percentages." Peterson, 315 F.3d at 1330, 65 USPQ2d at 1382.
Claim 29 is rejected under 35 U.S.C. 103 as being unpatentable over Tsai et al. (US Pub. 20200365698) in view of Huang et al. (US Pub. 20200243385), Chandrashekar et al. (US Pub. 20130302980), and Mebarki et al. (US Pub. 20210287898) as applied to claim 1 above and further in view of Yu et al. (US Pub. 20200105937).
Regarding claim 29, Tsai et al. fails to disclose
wherein the performing the etching process comprises:
performing a first etching step to etch through the dielectric layer using an etchant comprising CHF3 and H2; and
performing a second etching step to etch through the etch stop layer using an etchant comprising CF4 and H2.
Yu et al. discloses in Fig. 15A-15B, paragraph [0038]
wherein the performing the etching process comprises:
performing a first etching step to etch through the dielectric layer [250] using an etchant comprising CHF3 and H2 [“in a first step, the ILD layer 250 may be removed by a dry etching process employing an etchant that includes a fluorine-containing gas (e.g., …CHF3), H2, O2, or combinations thereof”]; and
performing a second etching step to etch through the etch stop layer [242] using an etchant comprising CF4 and H2 [“in a second step, portions of the dielectric layer 242 disposed over the dielectric layer 232 are selectively removed by another dry etching process employing an etchant that includes a fluorine-containing gas (e.g., CF4…), H2, O2, or combinations thereof.”].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Yu et al. into the method of Tsai et al. to include wherein the performing the etching process comprises: performing a first etching step to etch through the dielectric layer using an etchant comprising CHF3 and H2; and performing a second etching step to etch through the etch stop layer using an etchant comprising CF4 and H2. The ordinary artisan would have been motivated to modify Tsai et al. in the above manner for the purpose of providing suitable etching process to selectively remove ILD layer and etch stop layer [paragraph [0038] of YU et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Allowable Subject Matter
Claims 21, 25, 27-28 are allowed.
The following is an examiner’s statement of reasons for allowance: Applicant’s amendment to the claims and arguments were persuasive. Prior art of record does not fairly disclose or make obvious the claimed method as a whole. Specifically, the closest prior art (which has been made of record) fail to disclose (by themselves or in combination) the limitations of forming a barrier layer over the third dielectric layer and the gate contact material: forming a conductive material over the barrier layer: and after forming the conductive material, removing the conductive material, the barrier layer, the third dielectric layer, and a portion of the gate contact material embedded in the third dielectric layer, wherein after the removing, a remaining portion of the gate contact material is embedded in the second dielectric layer, the etch stop layer, and the first dielectric layer and forms a gate contact” of claim 21 in combination with the additionally claimed features, as are claimed by the Applicant. Thus, the Applicant’s claims are determined to be novel and non-obvious.
Claims 25, 27-28 are allowable based on their dependence on claim 21, respectively.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Response to Arguments
Applicant’s arguments with respect to claims 1-3, 6-9, 11-14, 21-22, 24-28 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Overall, Applicant’s arguments are not persuasive. The claims stand rejected and the Action is made FINAL.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SOPHIA T NGUYEN whose telephone number is (571)272-1686. The examiner can normally be reached 9:00am -5:00 pm, Monday-Friday.
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/SOPHIA T NGUYEN/Primary Examiner, Art Unit 2893
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