Prosecution Insights
Last updated: October 12, 2026

Taiwan Semiconductor Manufacturing Company, Ltd.

Technology area: Semiconductors, Circuits & Optics

1,571 pending office actions • 118 art units • 609 examiners • 1 of 1,571 (0%) have an AI response strategy ready • 3,095 patents granted in the last 365 days

Analysis

Taiwan Semiconductor Manufacturing Company, Ltd. maintains a portfolio with 1644 pending office actions, focused in the Semiconductors, Circuits & Optics technology area. This volume is distributed across 622 distinct examiners. The workload spans 103 distinct art units, which reflects the technical reach within the semiconductor sector.

KIM, TONG-HO is identified as the busiest examiner for the company, managing 23 pending office actions. These 23 actions are part of the 1644 total pending actions. The portfolio is distributed across the 622 distinct examiners, with many examiners handling multiple cases.

For practitioners, the presence of 103 distinct art units suggests that prosecution strategies must be tailored to the various examining groups. The 1644 pending office actions are assigned to 622 distinct examiners. KIM, TONG-HO handles 23 pending office actions, which is the busiest examiner workload in this portfolio.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Portfolio Summary

1,571
Total Pending OAs
1,211
Non-Final OAs
323
Final Rejections
37
Advisory / Quayle

Response Deadline Pressure

Based on the USPTO statutory response window for each pending office action. 265 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.

112
Overdue
13
Due this week
85
Due this month
33
Due in next 60 days
22
Due later

Deadline Fire Line

Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 265 of the docket's apps have a known mailing date.

-30dToday30d60d90d120d
Overdue (112)Due ≤ 7 days (13)Due ≤ 30 days (85)Due ≤ 60 days (33)Due later (22)

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

765
Hard (49%)
641
Medium (41%)
150
Easy (10%)
15
Unknown (1%)

Rejection Statute Mix

BucketCases
§101 only1 (0%)
§101 + other12 (1%)
§103 only451 (29%)
§102 only119 (8%)
§112 only54 (3%)
Double-patenting only96 (6%)
Double-patenting + other71 (5%)
Multi-statute (no §101)752 (48%)
No statute on record15 (1%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

114
Life Sciences
7% of docket
30
Information Tech
2% of docket
5
Communications
0% of docket
1,368
Semiconductors
87% of docket
45
Mechanical / Eng
3% of docket
9
Business / Other
1% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

15,710 h
Manual time on pending OAs
3,142 h
Time saved (low, 20%)
5,498 h
Time saved (mid, 35%)
137.5 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
KOO, LAMONT B 22 80.6% +5.2%
KIM, TONG-HO 20 95.2% +0.7%
DINKE, BITEW A 14 72.9% +12.4%
VALENZUELA, PATRICIA D 14 90.3% +2.0%
BOWEN, ADAM S 14 96.5% +2.4%
WILCZEWSKI, MARY A 13 84.8% +10.2%
PARKER, JOHN M 12 92.1% +0.9%
WARD, DAVID WILLIAM 11 63.3% +35.8%
BELOUSOV, ALEXANDER 11 76.6% +16.3%
SEHAR, FAKEHA 11 82.7% +19.3%

Quick Wins (61)

Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 8 ordered by deadline are shown.

App #TitleExaminerDue in
17663108 PASSIVATION FOR A DEEP TRENCH ISOLATION STRUCTURE IN A PIXEL SENSOR SEHAR, FAKEHA 78d overdue
18219259 Surface Profile Control Of Passivation Layers In Integrated Circuit Chips VALENZUELA, PATRICIA D 56d overdue
18502297 SEMICONDUCTOR DEVICE STRUCTURE WITH CONDUCTIVE VIA STRUCTURE KOO, LAMONT B 50d overdue
18358662 SEMICONDUCTOR PACKAGE REDISTRIBUTION STRUCTURE AND FABRICATION METHOD THEREOF VALENZUELA, PATRICIA D 46d overdue
17818785 Semiconductor Device and Method KOO, LAMONT B 46d overdue
18349325 THROUGH VIA STRUCTURE AND METHOD OF FABRICATION THEREOF VALENZUELA, PATRICIA D 42d overdue
18505632 GATE ISOLATION FEATURES KOO, LAMONT B 10d overdue
18361569 BENT FIN DEVICES KOO, LAMONT B 10d overdue

Hard Cases (765)

Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 8 ordered by deadline are shown.

App #TitleExaminerDue in
18232719 METHOD OF FORMING BIOLOGICAL FIELD EFFECT TRANSISTORS INTEGRATED WITH HEATERS BAUMAN, SCOTT E 146d overdue
18596404 3D IC POWER GRID REAMES, MATTHEW L 119d overdue
17875206 HARDENED INTERLAYER DIELECTRIC LAYER CRITE, ANTONIO B 100d overdue
18498369 INTEGRATED CIRCUIT, SYSTEM AND METHOD OF FORMING THE SAME WELLS, JAMES STEVEN 77d overdue
18366073 Gate Structure of Semiconductor Device and Method of Forming Same KOO, LAMONT B 66d overdue
17220269 INTEGRATED CIRCUIT STRUCTURE LIN, ARIC 58d overdue
18323179 DIODE-CONTAINING COMPONENT AND METHOD FOR MANUFACTURING THE SAME BERRY, PAUL ANTHONY 53d overdue
18153978 CHILLER SYSTEM WITH INTELLIGENT CONTROL AHMED, ISTIAQUE 46d overdue

Interview Candidates (60)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 8 ordered by deadline are shown.

App #TitleExaminerDue in
17663108 PASSIVATION FOR A DEEP TRENCH ISOLATION STRUCTURE IN A PIXEL SENSOR SEHAR, FAKEHA 78d overdue
17383299 INTERCONNECTION STRUCTURE WITH SIDEWALL PROTECTION LAYER WILCZEWSKI, MARY A 31d overdue
18475965 STACKED MULTI-GATE DEVICE WITH AN INSULATING LAYER BETWEEN TOP AND BOTTOM SOURCE/DRAIN FEATURES DINKE, BITEW A 28d overdue
17840362 Molding Structures for Integrated Circuit Packages and Methods of Forming the Same WARD, DAVID WILLIAM 10d overdue
17726705 Metal Interconnects And Method Of Forming The Same WARD, DAVID WILLIAM 8d overdue
18329396 INTERFACE TRAP CHARGE DENSITY REDUCTION WILCZEWSKI, MARY A 13d
18346544 MULTIPLE WAVELENGTH BAND LIGHT SENSOR DEVICE BELOUSOV, ALEXANDER 14d
17708348 SUBSTRATE TRENCH FOR CONTROLLING UNDERFILL FILLET AREA AND METHODS OF FORMING THE SAME DINKE, BITEW A 14d

Top Art Units

Art UnitApps
2898 137
2818 133
2893 130
2812 129
2817 97
2899 91
2897 83
2813 57
2811 56
2874 54

Pending Office Actions

App #TitleExaminerArt UnitStatutesStatusDue inAIFiled
19290528 SEMICONDUCTOR PROCESSING TOOL AND METHODS OF OPERATION SAAD, ERIN BARRY 1735 §103§112 Non-Final OA — Pending Aug 05, 2025
19286970 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME RAMIREZ, ALEXANDRE XAVIER 2812 §102§103§112 Non-Final OA — Pending Jul 31, 2025
19283746 INTEGRATED CIRCUIT AND METHOD OF FORMING THE SAME PARTHASARATHY, ROHIT 2899 §103 Non-Final OA — Pending Jul 29, 2025
19259508 FLIP-FLOP CIRCUIT AND METHOD O NEILL, PATRICK 2836 DP Non-Final OA — Pending Jul 03, 2025
19254164 IMPEDANCE MATCHING CIRCUIT AND METHOD CHEN, PATRICK C 2836 §102DP Non-Final OA — Pending Jun 30, 2025
19255872 INTEGRATED CIRCUIT HAVING LATCH WITH TRANSISTORS OF DIFFERENT GATE WIDTHS O NEILL, PATRICK 2842 §102§112DP Non-Final OA — Pending Jun 30, 2025
19255856 WAFER PROCESSING METHOD RODRIGUEZ, MICHAEL P 1715 §102§103§112DP Non-Final OA — Pending Jun 30, 2025
19252413 GATED TRI-STATE INVERTER, AND METHOD OF OPERATING SAME JAGER, RYAN C 2842 §112DP Non-Final OA — Pending Jun 27, 2025
19253186 DATA SEQUENCING CIRCUIT VERBRUGGE, KEVIN 2132 Other Non-Final OA — Pending Jun 27, 2025
19252149 IMAGE SENSOR PIXEL AND METAL SHIELDING OF CHARGE STORAGE DEVICE OF IMAGE SENSOR PIXEL FORMED BY ONE STEP PROCESS HALIYUR, PADMA 2637 §103Other Non-Final OA — Pending Jun 27, 2025
19250906 Systems and Methods for Phase Locked Loop Realignment With Skew Cancellation CHEN, PATRICK C 2842 §103DP Non-Final OA — Pending Jun 26, 2025
19251693 TEMPERATURE SENSOR CIRCUITS AND CONTROL CIRCUITS AND METHOD FOR TEMPERATURE SENSOR CIRCUITS O NEILL, PATRICK 2842 §102DP Non-Final OA — Pending Jun 26, 2025
19247229 SEMICONDUCTOR DEVICE INCLUDING DECOUPLING SYSTEM RETEBO, METASEBIA T 2842 DP Non-Final OA — Pending Jun 24, 2025
19245452 ELECTRONIC CIRCUIT AND METHOD FOR OPERATING THE SAME PEREZ, JAMES M 2631 §112DP Non-Final OA — Pending Jun 23, 2025
19243074 THERMAL BARRIER STRUCTURE IN PHASE CHANGE MATERIAL DEVICE TAN, DAVE 2897 §102§103 Non-Final OA — Pending Jun 19, 2025
19241406 SHIFT REGISTER HAVING LOW POWER MODE O NEILL, PATRICK 2836 §102§112DP Non-Final OA — Pending Jun 18, 2025
19241088 SEMICONDUCTOR DEVICE HAVING HYSTERESIS BLOCK WELLS, KENNETH B 2836 §102§103§112DP Non-Final OA — Pending Jun 17, 2025
19237327 METHOD FOR PROCESSING SEMICONDUCTOR WAFER ROSTAMI, MOHAMMAD S 2154 §103Other Final Rejection — Pending Jun 13, 2025
19235541 METHOD OF FORMING PACKAGE STRUCTURE HAVING THERMOELECTRIC COOLER GOLDEN, ANDREW J 1726 §102§103 Final Rejection — Pending Jun 11, 2025
19230034 PHYSICAL VAPOR DEPOSITION (PVD) WITH TARGET EROSION PROFILE MONITORING MCDONALD, RODNEY GLENN 1794 DP Final Rejection — Pending Jun 05, 2025
19211749 CHEMICAL DISPENSING SYSTEM GARDNER, NICOLE 3753 §102§112Other Non-Final OA — Pending May 19, 2025
19206002 DE-TAPE TOOL CAILLOUET, CHRISTOPHER C 1745 §102DP Non-Final OA — Pending May 12, 2025
19200973 SYSTEM AND SEMICONDUCTOR DEVICE THEREIN JAGER, RYAN C 2842 §102DP Non-Final OA — Pending May 07, 2025
19197279 Level Shifter With Inside Self-Protection High Bias Generator RETEBO, METASEBIA T 2836 §102§103 Non-Final OA — Pending May 02, 2025
19194045 MEMORY DEVICE, READ CLOCK GENERATION CIRCUIT, AND METHOD FOR CONTROLLING READ OPERATION IN MEMORY DEVICE HIDALGO, FERNANDO N 2827 DP Non-Final OA — Pending Apr 30, 2025
19176354 Overdrive I/O ESD Protection Network WELLS, KENNETH B 2842 §103§112DP Final Rejection — Pending Apr 11, 2025
19176327 Device and Method for Diagnosis of the Same BRADEN, GRACE VICTORIA 2112 §103 Non-Final OA — Pending Apr 11, 2025
19171607 ION EXPOSURE METHOD AND APPARATUS ASFAW, MESFIN T 2882 §102§103 Non-Final OA — Pending Apr 07, 2025
19089163 Bio-Detector Device for Bio-Targets BALL, JOHN C 1795 DP Non-Final OA — Pending Mar 25, 2025
19088255 REDUCE MASK DEFECT IMPACT BY CONTAMINATION DECOMPOSE WHITESELL, STEVEN H 1759 §102§103Other Non-Final OA — Pending Mar 24, 2025
19084239 WIDTH ADJUSTMENT OF EUV RADIATION BEAM PERSAUD, DEORAM 2882 §102§103Other Non-Final OA — Pending Mar 19, 2025
19075364 LOW-DROPOUT (LDO) REGULATOR WITH A FEEDBACK CIRCUIT GBLENDE, JEFFREY A 2838 DP Non-Final OA — Pending Mar 10, 2025
19070730 Sub-Word Line Driver Placement For Memory Device YANG, HAN 2824 §102 Non-Final OA — Pending Mar 05, 2025
19069350 Programmable Regulator Voltage Controlled Ring Oscillator GANNON, LEVI 2849 §102Other Non-Final OA 14d Pending Mar 04, 2025
19069048 ONE TIME PROGRAMMABLE MEMORY CHEN, XIAOCHUN L 2824 §103§112DP Non-Final OA — Pending Mar 03, 2025
19068296 METHOD OF USING WAFER STAGE NGUYEN, HUNG 2882 §103DP Non-Final OA — Pending Mar 03, 2025
19064599 LOW DROPOUT REGULATOR CIRCUITS, INPUT/OUTPUT DEVICE, AND METHODS FOR OPERATING A LOW DROPOUT REGULATOR TIKU, SISAY G 2838 §103 Non-Final OA — Pending Feb 26, 2025
19064089 LOW-DROPOUT (LDO) VOLTAGE REGULATOR QUDDUS, NUSRAT 2838 §103Other Non-Final OA — Pending Feb 26, 2025
19059384 MEMORY DEVICE WITH ADDITIONAL WRITE BIT LINES CHO, SUNG IL 2825 §102§103Other Non-Final OA — Pending Feb 21, 2025
19058345 DATA RETENTION CIRCUIT AND METHOD CHEN, SIBIN 2896 §112 Non-Final OA — Pending Feb 20, 2025
19056851 MULTIPLE SEMICONDUCTOR DIE CONTAINER LOAD PORT MCCLAIN, GERALD 3652 §102DP Non-Final OA — Pending Feb 19, 2025
19055771 BUFFER CONTROL OF MULTIPLE MEMORY BANKS HIDALGO, FERNANDO N 2827 §112DP Non-Final OA — Pending Feb 18, 2025
19056022 CHEMICAL VAPOR DEPOSITION FOR UNIFORM TUNGSTEN GROWTH GAMBETTA, KELLY M 1718 §102§103§112 Final Rejection — Pending Feb 18, 2025
19056350 INTEGRATED CIRCUIT AND METHOD OF OPERATING SAME ALHWAMDEH, KAREEM FUAD 2112 §103 Non-Final OA — Pending Feb 18, 2025
19055872 MERGED BIT LINES FOR HIGH DENSITY MEMORY ARRAY TECHANE, MUNA A 2827 §102§103 Non-Final OA — Pending Feb 18, 2025
19052420 Device and Method for Measuring a Duty Cycle of a Clock Signal MAINI, RAHUL 2858 §103§112Other Non-Final OA — Pending Feb 13, 2025
19050140 CAPACITOR-LESS LOW-DROPOUT REGULATOR WITH DYNAMIC FREQUENCY COMPENSATION PEREZ, BRYAN REYNALDO 2838 §102 Non-Final OA — Pending Feb 11, 2025
19049935 Antenna Effect Protection and Electrostatic Discharge Protection for Three-Dimensional Integrated Circuit JEAN PIERRE, PEGUY 2845 DP Non-Final OA — Pending Feb 10, 2025
19047669 SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME SECK, AHMED F 2834 §103 Non-Final OA — Pending Feb 07, 2025
19045904 MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF CHOI, WOO H 3992 §102§112 Non-Final OA — Pending Feb 05, 2025

View all 1,571 →

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Frequently Asked Questions

How many pending USPTO office actions does Taiwan Semiconductor Manufacturing Company, Ltd. have?

Taiwan Semiconductor Manufacturing Company, Ltd. has 1,571 pending office actions as of October 2026, spread across 118 art units and 609 examiners.

Which USPTO examiner handles the most Taiwan Semiconductor Manufacturing Company, Ltd. applications?

Lamont B Koo has the most, with 22 of Taiwan Semiconductor Manufacturing Company, Ltd.'s pending office actions.

What technology area are Taiwan Semiconductor Manufacturing Company, Ltd.'s patent applications in?

Mostly Semiconductors, Circuits & Optics (USPTO Tech Center 2800), based on where its pending office actions are examined.

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