Prosecution Insights
Last updated: April 19, 2026
Application No. 17/653,763

SEMICONDUCTOR PACKAGE SUBSTRATE AND METHOD OF MANUFACTURING THE SAME, AND SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

Final Rejection §103§112
Filed
Mar 07, 2022
Examiner
NETTLES, CORALIE ANN
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Haesung Ds Co. Ltd.
OA Round
3 (Final)
73%
Grant Probability
Favorable
4-5
OA Rounds
3y 7m
To Grant
96%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allow Rate
22 granted / 30 resolved
+5.3% vs TC avg
Strong +22% interview lift
Without
With
+22.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
51 currently pending
Career history
81
Total Applications
across all art units

Statute-Specific Performance

§103
58.1%
+18.1% vs TC avg
§102
22.0%
-18.0% vs TC avg
§112
17.0%
-23.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 30 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment This Office Action is in response to Applicant's amendments filed July 7, 2025. Claim 1 has been amended. No claims have been added. No claims have been canceled. Claims 7-8 and 10-20 stand withdrawn. Currently, claims 1-2, 4-6 and 9 are pending. Applicant’s Amendment to claim 1 does not overcome the 112(b) rejection outlined in the previous Office Action. The 112(b) is maintained and presented below. Applicant’s Amendment to the drawings submitted July 7, 2025 overcomes the drawing objection outlined in the previous Office Action. The drawing objection is withdrawn. Response to Arguments Applicant's arguments filed July 7, 2025 have been fully considered but they are not persuasive. The Applicant asserts that the combination of Bae et al. (US 20190267315 A1) herein after “Bae” in view of Bowers et al. (US 20220115301 A1) herein after “Bowers” does not disclose or suggest all the limitations of newly amended claim 1. Specifically, that neither Bae or Bowers discloses “a groove structure in at least one corner of the first surface of the base layer and having a depth based on the first surface of the base layer is 1/2 or more of a thickness of the base layer so that the thickness of the base layer between an apex of the groove structure and the second layer is greater than 40 µm”. The Examiner respectfully disagrees with the assertion. As outlined on page 6 of the previous Office Action, Bae discloses a groove structure (Fig. 5, second groove or trench 100e, ¶ [0048]) in at least one corner of the first surface (100a) of the base layer (100) and having a depth based on the first surface (100a) of the base layer (100) is 1/2 or more of a thickness of the base layer (Fig. 5, “a depth of the first grooves or trenches 100c may be about 80% to 90% of a thickness of the base substrate 100”, “The second groove or trench 100e may be formed not to completely pass through the base substrate 100, similar to the first grooves or trenches 100c”, ¶ [0041] and [0048]). The Examiner asserts that by describing the formation of the second groove or trench 100e as “similar to the first grooves or trenches 100c” and depicting them to be of similar dimensions in Fig. 5, one of ordinary skill in the art would have considered applying the same dimensions to the first grooves or trenches and the second grooves or trenches. Therefore, Bae discloses a groove structure in at least one corner of the first surface of the base layer and having a depth based on the first surface of the base layer is 1/2 or more of a thickness of the base layer. Furthermore, the Examiner asserts that Bowers also discloses the limitation a groove structure (Fig. 2C, grooves 110D, ¶ [0046]) in at least one corner of the first surface (Fig. 2C, side 110A, ¶ [0043]) of the base layer (Fig. 2C, substrate 110, ¶ [0040]) and having a depth based on the first surface (110A) of the base layer is 1/2 or more (Fig. 2C, “a height, from cavity base 1111 to side 110A of substrate 110, of about 40% to 70% of the thickness of substrate 110, such as about 50%”, ¶ [0049]) (The height from the cavity base 1111 to the side 110A is the depth of the cavity 111. Cavity 111 and grooves 110D have the same dimensions because “cavities 111 and grooves 110D can be simultaneously formed” using the same process as described in ¶ [0047]) of a thickness of the base layer (110) so that the thickness of the base layer between an apex of the groove structure and the second layer is greater than 40 µm (Bowers discloses that the thickness of the substrate is “about 100 μm to about 500 μm”, ¶ [0043]. Further, the grooves have a depth of “about 50%”, ¶ [0049]. Therefore, Bowers discloses a groove depth of 50-250 µm). Therefore, the combination of Bae and Bowers discloses all the limitations of newly amended claim 1. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-2, 4-6, and 9 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 1, the claim recites the limitation "the second layer" in line 10. There is insufficient antecedent basis for this limitation in the claim. It is indefinite as to whether the second layer refers to the second surface recited in Claim 1, line 2 or some other layer. For the purposes of examination the former interpretation will be used. Claims 2, 4-6 and 9 depend from the rejected Claim 1 and are rejected on at least the same basis as outlined above. Appropriate correction is required. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2, 4-5 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Bae et al. (US 20190267315 A1) herein after “Bae” in view of Bowers et al. (US 20220115301 A1) herein after “Bowers”. Regarding claim 1, Figs. 1-9 of Bae disclose a semiconductor package substrate (Fig. 9, semiconductor package substrate 10, ¶ [0037]) comprising: a base layer (Fig. 9, base substrate 100, ¶ [0037]) including a conductive material, having a first surface (Fig. 1, bottom surface 100a, ¶ [0037]) and a second surface (Fig. 1, top surface 100b, ¶ [0037]) opposite the first surface (Fig. 1, “a top surface 100b and a bottom surface 100a, which are opposite surfaces”, ¶ [0037]), and having a first groove or first trench (Fig. 2, first grooves or trenches 100c, ¶ [0038]) in the first surface (Fig. 2, “first grooves or trenches 100c are formed in the bottom surface 100a”, ¶ [0038]) and a second groove or second trench (Fig. 5, portions 100d, ¶ [0046]) in the second surface (Fig. 5, “the top surface 100b of the base substrate 100 is etched to form portions 100d”, ¶ [0046]); a first resin (Fig. 9, resin 110, ¶ [0043]) buried in the first groove or first trench (100c) in the first surface (100a) of the base layer (100); and a groove structure (Fig. 5, second groove or trench 100e, ¶ [0048]) in at least one corner of the first surface (100a) of the base layer (100) and having a depth based on the first surface (100a) of the base layer (100) is 1/2 or more of a thickness of the base layer (Fig. 5, “a depth of the first grooves or trenches 100c may be about 80% to 90% of a thickness of the base substrate 100”, “The second groove or trench 100e may be formed not to completely pass through the base substrate 100, similar to the first grooves or trenches 100c”, ¶ [0041] and [0048]). Bae fails to disclose the base layer having a thickness of at least 100 µm to 500 µm between the first surface and second surface; the thickness of the base layer between an apex of the groove structure and the second layer is greater than 40 µm. In the similar field of endeavor of semiconductor packages, Fig. 2I of Bowers discloses the base layer (Fig. 2C, substrate 110, ¶ [0040]) having a thickness of at least 100 µm to 500 µm between the first surface and second surface (Fig. 2C, “substrate 110′ can comprise a thickness of about 100 μm to about 500 μm”, ¶ [0043]); a groove structure (Fig. 2C, grooves 110D, ¶ [0046]) in at least one corner of the first surface (Fig. 2C, side 110A, ¶ [0043]) of the base layer (110) and having a depth based on the first surface (110A) of the base layer is 1/2 or more (Fig. 2C, “a height, from cavity base 1111 to side 110A of substrate 110, of about 40% to 70% of the thickness of substrate 110, such as about 50%”, ¶ [0049]) (The height from the cavity base 1111 to the side 110A is the depth of the cavity 111. Cavity 111 and grooves 110D have the same dimensions because “cavities 111 and grooves 110D can be simultaneously formed” using the same process as described in ¶ [0047]) of a thickness of the base layer (110) so that the thickness of the base layer between an apex of the groove structure and the second layer is greater than 40 µm (Bowers discloses that the thickness of the substrate is “about 100 μm to about 500 μm”, ¶ [0043]. Further, the grooves have a depth of “about 50%”, ¶ [0049]. Therefore, Bowers discloses a groove depth of 50-250 µm). It would have been obvious to one of ordinary skill in the art at the time of the effective filling date of the invention to modify the package substrate of Bae with the thickness as disclosed by Bowers, to optimize device dimensions and improve production yield (see Bowers, ¶ [0172]). Regarding claim 2, Bae and Bowers together disclose the semiconductor package substrate of claim 1 as applied above, and Fig. 5 of Bae further discloses wherein a depth of the groove structure (100e) is 100 µm or more (Bae discloses in ¶ [0041] that the grooves 100c, which are formed in the same way as grooves 100e ¶ [0048], are about 80-90% of the thickness of the base substrate 100. Further, the remaining portions of the base substrate 100 are in the range 10-40 µm. Therefore, Bae discloses that the depth of the grooves is approximately 40-360 µm). Regarding claim 4, Bae and Bowers together disclose the semiconductor package substrate of claim 1 as applied above, and Fig. 5 of Bae further discloses wherein a width of the base layer (100) with respect to the first surface (100a) corresponding to the groove structure (100e) is 30 µm or more greater than a width of the groove structure (100e) with respect to the second surface (100b) of the base layer (100) (Bae discloses in ¶ [0041] that the grooves 100c, which are formed in the same way as grooves 100e ¶ [0048], are about 80-90% of the thickness of the base substrate 100. Further, the remaining portions of the base substrate 100 are in the range 10-40 µm. Therefore, Bae discloses that the depth of the grooves is approximately 40-360 µm and the difference is up to 350 µm). Regarding claim 5, Bae and Bowers together disclose the semiconductor package substrate of claim 1 as applied above, and Fig. 9 of Bae further discloses comprising: a coating layer (Fig. 9, plating layer 120, ¶ [0052]) disposed on a surface of the base layer (100) except for the first resin (110) (“The plating layer 120 may be formed on an inner surface of the second groove or trench 100e, and may be formed on the top surface 100b and the bottom surface 100a of the base substrate 100 and inner surfaces of the first grooves or trenches 100c except the resin 110”, ¶ [0052]). Regarding claim 9, Bae and Bowers together disclose the semiconductor package substrate of claim 1 as applied above, and Fig. 9 of Bae further discloses a semiconductor package (Fig. 9, semiconductor package 20, ¶ [0057]) comprising: the semiconductor package substrate (10) of claim 1; and a semiconductor chip (Fig. 9, semiconductor chips 130, ¶ [0058]) mounted on the semiconductor package substrate (10) (“a semiconductor chips 130 is mounted on a semiconductor package substrate 10”, ¶ [0058]). Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Bae (US 20190267315 A1) and Bowers (US 20220115301 A1) in further view of Otsuki (US 20120223622 A1). Regarding claim 6, Bae and Bowers together disclose the semiconductor package substrate of claim 1 as applied above, but both fail to disclose wherein at least a portion of the first resin is exposed to the outside through the groove structure. In a similar field of endeavor, Fig. 1B of Otsuki discloses wherein at least a portion of the first resin (Fig. 1B, insulator 33, ¶ [0067]) is exposed to the outside through the groove structure (Fig. 1B, “substrate 2 includes a plurality of metal posts and an insulator 33 which integrally fixes the metal posts in a state of being electrically independent of each other”, ¶ [0067]). It would have been obvious to one of ordinary skill in the art at the time of the effective filling date of the invention to modify the package substrate of Bae such that at least a portion of the first resin is exposed to the outside through the groove structure as disclosed by Otsuki, to insulate the interconnections (see Otsuki, ¶ [0067]). Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CORALIE NETTLES whose telephone number is (571)270-5374. The examiner can normally be reached Mon-Fri. 7:30am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara J Green can be reached at (571) 270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /C.A.N./Examiner, Art Unit 2893 /YARA B GREEN/Supervisor Patent Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Mar 07, 2022
Application Filed
Mar 07, 2022
Response after Non-Final Action
Dec 27, 2024
Non-Final Rejection — §103, §112
Mar 27, 2025
Response Filed
Apr 01, 2025
Non-Final Rejection — §103, §112
Jul 07, 2025
Response Filed
Aug 10, 2025
Final Rejection — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

4-5
Expected OA Rounds
73%
Grant Probability
96%
With Interview (+22.2%)
3y 7m
Median Time to Grant
High
PTA Risk
Based on 30 resolved cases by this examiner. Grant probability derived from career allow rate.

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