Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to Applicant’s Amendment filed on 06/23/2025. Claims 1, 3-8, 10-15, and 17-20 are pending. Claims 1, 8, and 15 have been amended. Claims 2, 9, and 16 have been canceled.
Priority
Applicant’s claims for priority from foreign application CN201910907661.5 filed 09/24/2019 and parent application PCT/CN2020/116405 filed 09/21/2020 are acknowledged.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 06/23/2025 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-6, 8, 10-13, 15, and 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Koryakin et al. (U.S. 10,180,855) in view of Sankaran et al. (U.S. 2016/0117190), further in view of Cain et al. (U.S. 2017/0139767) (Hereinafter Cain), and further in view of Tsirkin et al. (U.S. 2016/0139942), hereinafter referred to as Koryakin, Sankaran, Cain, and Tsirkin, respectively.
As per claim 1, Koryakin discloses a method for process handling, applied to a virtual machine monitor, comprising:
handling a current interrupt event in an interrupt queue in response to detecting an interrupt event being triggered (Col. 1, Lines 57-61-For a hardware interrupt, an OS interrupt handler will start execution and call a specific device driver (e.g., a kernel module extension) interrupt handler to perform the necessary interrupt processing for the device. Please note the OS interrupt handler starting execution and performing the necessary interrupt processing for a hardware interrupt corresponds to Applicant’s handling a current interrupt event in an interrupt queue in response to detecting an interrupt event being triggered.);
detecting a blocking time of a kernel process in response to an ending of handling the current interrupt event in the interrupt queue (see for example Koryakin, this limitation is disclosed such that a scheduler checks a time quantum of a process handled by a kernel module extension interrupt handler, seeing how long the process has been waiting in a blocked state until a requested resource becomes available. If the time quantum has expired during an interrupt event, the scheduler pushes the interrupted process to the back of a queue; col.1 line {53} – col.2 line {3}).
Koryakin does not explicitly teach triggering a soft interrupt of a virtual processor.
However, Sankaran discloses triggering a soft interrupt event of a virtual processor (see for example Sankaran, this limitation is disclosed such that a soft real-time interrupt (i.e. soft interrupt) is targeted to a virtual processor (i.e. triggering a soft interrupt event of a virtual processor); paragraph [0079]).
Koryakin in view of Sankaran is analogous art because they are from the same field of endeavor, scheduling.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method as taught by Koryakin by targeting a virtual processor with a soft real-time interrupt as taught by Sankaran because it would enhance the teaching of Koryakin with an effective means of pre-empting a virtual processor with urgent interrupts (as suggested by Sankaran, see for example paragraph [0080]).
Although Koryakin in view of Sankaran discloses triggering a soft interrupt event of a virtual processor, Koryakin in view of Sankaran does not explicitly teach triggering a interrupt event when the blocking time of a kernel process exceeds a preset time threshold.
However, Cain discloses triggering a interrupt event when the blocking time of a kernel process exceeds a preset time threshold (see for example Cain, this limitation is disclosed such that when a timer for an inter-process call expires in the case of a deadlock, a kernel interrupts a process; paragraphs [0012], [0015], [0019]); and
Koryakin in view of Sankaran is analogous art with Cain because they are from the same field of endeavor, scheduling.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method as taught by Koryakin in view of Sankaran by setting a timer to interrupt a process by a kernel when deadlocked as taught by Cain because it would enhance the teaching of Koryakin in view of Sankaran with an effective means of using a kernel to detect and recover from hangs and deadlocks more quickly (as suggested by Cain, see for example paragraph [0015]).
Although Koryakin in view of Sankaran, further in view of Cain discloses an event being a soft interrupt event, Koryakin in view of Sankaran, further in view of Cain does not explicitly teach sending an intermediate start instruction to a virtual processor in response to an event of the virtual processor being triggered, to make the virtual processor run for a preset time period.
However, Tsirkin discloses sending an intermediate start instruction to a virtual processor in response to an event of the virtual processor being triggered, to make the virtual processor run for a preset time period (see for example Tsirkin, this limitation is disclosed such that a context switch causes a start execute instruction to be sent to a virtual processor, the start instruction specifying an allotted specific period of time for the virtual processor to process tasks before executing a halt command (i.e. sending an intermediate command to make the virtual processor run for a preset time period); paragraph [0033]).
Koryakin in view of Sankaran, further in view of Cain is analogous art with Tsirkin because they are from the same field of endeavor, scheduling.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method as taught by Koryakin in view of Sankaran, further in view of Cain, by using an interrupt to a cause a virtual processor to process for a period of time as taught by Tsirkin because it would enhance the teaching of Koryakin in view of Sankaran, further in view of Cain with an effective means of allowing other virtual processors to process other tasks (as suggested by Tsirkin, see for example paragraph [0033]).
Regarding claim 8, it is an apparatus claim having similar limitations cited in claim 1. Thus, claim 8 is also rejected under the same rationales as cited in the rejection of claim 1.
Regarding claim 15, it is a medium claim having similar limitations cited in claim 1. Thus, claim 15 is also rejected under the same rationales as cited in the rejection of claim 1.
Regarding Claim 3, Koryakin-Sankaran-Cain-Tsirkin as described in Claim 1, Cain further discloses wherein before handling the current interrupt event in the interrupt queue in response to detecting the interrupt event being triggered (See above rejection for Claim 1 from Koryakin), the method further comprises:
acquiring a run queue corresponding to the kernel process, and executing the run queue in units of preset running units of the virtual processor, according to an arrangement sequence of the preset running units in the run queue, until a process scheduling command is received, wherein one or more preset running units of the virtual processor are placed in the run queue ([0012] the kernel 101 may store an indication of the inter-process call in a queue 105. The queue 105 may also be referred to as a stack. The kernel 101 may also collect “process data” for the processes in the inter-process call. The process data may include, without limitation, contents of each process' stack, process memory usage, process CPU usage, system memory usage, system CPU usage, and the like. Please note that the queue 105 stored by the kernel 101 that stores indications of the inter-process call and process data for the processes corresponds to Applicant’s acquiring a run queue corresponding to the kernel process and executing the run queue in units of preset running units of the virtual processor, according to an arrangement sequence of the preset running units in the run queue. Additionally, the inter-process call causing the storing of the indication in the queue corresponds to Applicant’s process scheduling command being received, wherein preset running units of the virtual processor are placed in the run queue.).
Regarding Claim 10, it is an apparatus claim having similar limitations cited in Claim 3. Thus, Claim 10 is also rejected under the same rationales as cited in the rejection of Claim 3.
Regarding Claim 17, it is a medium claim having similar limitations cited in Claim 3. Thus, Claim 17 is also rejected under the same rationales as cited in the rejection of Claim 3.
Regarding Claim 4, Koryakin-Sankaran-Cain-Tsirkin as described in Claim 3, Cain further discloses wherein before acquiring the run queue corresponding to the kernel process, and executing the run queue in units of preset running units of the virtual processor, according to an arrangement sequence of the preset running, units in the run queue until a process scheduling command is received, the method (See above rejection for Claim 3) further comprises:
initializing the kernel process ([0012] The system 100 illustratively executes an operating system kernel 101 and three processes 102-104. The kernel 101 is configured to detect excessive execution times by processes executing on the system 100. Please note that the operating system kernel 101 being configured to be executed by the system 101 corresponds to Applicant’s initializing the kernel process.).
Regarding Claim 18, it is a medium claim having similar limitations cited in Claim 4. Thus, Claim 18 is also rejected under the same rationales as cited in the rejection of Claim 4.
Regarding Claim 5, Koryakin-Sankaran-Cain-Tsirkin as described in Claim 4, Cain further discloses wherein initializing the kernel process comprises: creating the kernel process ([0012] The system 100 illustratively executes an operating system kernel 101 and three processes 102-104. The kernel 101 is configured to detect excessive execution times by processes executing on the system 100. Please note that the system 100 executing the configured operating system kernel 101 corresponds to Applicant’s initializing the kernel process creating the kernel process.);
in response to receiving a mount request sent by the virtual processor, placing one or more preset running units of the virtual processor in the run queue corresponding to the kernel process, and sending a mount success message to the virtual processor ([0012] The kernel 101 may also collect “process data” for the processes in the inter-process call. The process data may include, without limitation, contents of each process' stack, process memory usage, process CPU usage, system memory usage, system CPU usage, and the like. The process data may be stored in the queue 105, or in a separate data structure. If the timer for an inter-process call expires (such as in the case of a deadlock), the kernel 101 may interrupt the process and output the contents of the queue 105 and the process data as part of an data dump. Please note that as Applicant states in [00167] that “The mount request can include kernel process identification information and request body information,” the process data collected by the kernel 101 related to the process call and placed in the queue 105 corresponds to Applicant’s placing preset running units of the virtual processor in the run queue corresponding to the kernel process in response to receiving a mount request sent by the virtual processor, and sending a mount success message to the virtual processor, i.e., by not having an expiration causing the output of the contents of the queue, it is an indication for success of the process.);
Koryakin further discloses and starting the kernel process in response to receiving a kernel process wake-up request sent by the virtual processor (Col. 2, Lines 28-30- each virtual processor sleep and wake up transition takes time to execute additional state transition codes. Please note that the wake up transition of the virtual processor corresponds to Applicant’s starting the kernel process in response to receiving a kernel process wake-up request sent by the virtual processor, as the kernel process starting process previously disclosed by Cain could be started by the wake-up process.).
Regarding Claim 12, it is an apparatus claim having similar limitations cited in Claim 5. Thus, Claim 12 is also rejected under the same rationales as cited in the rejection of Claim 5.
Regarding Claim 19, it is a medium claim having similar limitations cited in Claim 5. Thus, Claim 19 is also rejected under the same rationales as cited in the rejection of Claim 5.
Regarding Claim 6, Koryakin-Sankaran-Cain-Tsirkin as described in Claim 1, Koryakin further discloses in response to receiving a preset running request, sending an intermediate wake-up request to the virtual processor, and entering a sleep state after receiving a wake-up success message sent by the virtual processor, wherein the intermediate wake-up request carries information about the preset running request (Col. 2, Lines 36-37-transition into and out of the sleep state; Col. 5, Lines 64-67 – Col. 6, Lines 1-18- delay or even ignore certain types of asynchronous events that would otherwise wake up the processor from the idle state when there are no “ready to execute” processes/threads. As will be described in detail below, the system and method is configured to control the idle system state behavior of a processor based on an absence of “ready to execute” processes/threads and does not depend on process content. […] Moreover, if the OS attempts to execute a “non-idle” page or the scheduler changes the state of a process/thread from a blocked state to a “ready to execute” state, execution of the protected page(s) will raise a page fault exception. In this instance, the system and method detects the move from an idle system state to an active state and releases protection of the protected page(s). Based on the algorithms described herein, a universal criteria is provided for detecting idle system states for most operating systems. When the system is in the idle state, it only executes “idle” pages. Otherwise, the system exits the idle state and returns to the active state. Please note that the OS attempt to execute a non-idle page, raising a page fault exception, and moving to an active state corresponds to Applicant’s sending an intermediate wake-up request to the virtual processor in response to receiving a preset running request, wherein the intermediate wake-up request carries information about the preset running request, i.e., the requested pages to be executed. Furthermore, as transitions into and out of the sleep state are disclosed, this corresponds to entering a sleep state after receiving a wake-up success message sent by the virtual processor, i.e., once the wake-up and processing is completed successfully, it may return back to a sleep state.);
and entering a running state in response to receiving a preset running request handling end message sent by the virtual processor (Col. 6, Lines 8-18- Moreover, if the OS attempts to execute a “non-idle” page or the scheduler changes the state of a process/thread from a blocked state to a “ready to execute” state, execution of the protected page(s) will raise a page fault exception. In this instance, the system and method detects the move from an idle system state to an active state[…] the system exits the idle state and returns to the active state. Please note that the system returning to the active state after exiting the idle state upon detecting the move from an idle system state to an active state due to the page fault exception corresponds to Applicant’s entering a running state in response to receiving a preset running request handling end message sent by the virtual processor.).
Regarding Claim 13, it is an apparatus claim having similar limitations cited in Claim 6. Thus, Claim 13 is also rejected under the same rationales as cited in the rejection of Claim 6.
Regarding Claim 20, it is a medium claim having similar limitations cited in Claim 6. Thus, Claim 20 is also rejected under the same rationales as cited in the rejection of Claim 6.
Regarding Claim 11, Koryakin-Sankaran-Cain-Tsirkin as described in Claim 10, Cain further discloses wherein before handling the current interrupt event in the interrupt queue in response to detecting the interrupt event being triggered (See above rejection for Claim 10), the one or more processors are configured to execute the set of instructions to cause the apparatus to further perform:
initializing the kernel process ([0012] The system 100 illustratively executes an operating system kernel 101 and three processes 102-104. The kernel 101 is configured to detect excessive execution times by processes executing on the system 100. Please note that the operating system kernel 101 being configured to be executed by the system 101 corresponds to Applicant’s initializing the kernel process.).
Claim 7 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Koryakin (U.S. 10,180,855) in view of Sankaran (U.S. 2016/0117190), further in view of Cain (U.S. 2017/0139767), further in view of Tsirkin (U.S. 2016/0139942) as applied to claims 1 and 8 above, respectively, and further in view of Anand et al. (U.S. 2006/0064529), hereinafter referred to as Koryakin, Sankaran, Cain, Tsirkin, and Anand, respectively.
As per claim 7, Koryakin in view of Sankaran, further in view of Cain, further in view of Tsirkin discloses the process handling method according to claim 1 (see rejection of claim 1 above), but does not explicitly teach handling a next interrupt event in an interrupt queue in response to an end of a preset time period.
However, Anand discloses handling a next interrupt event in an interrupt queue in response to an end of a preset time period (see for example Anand, this limitation is disclosed such that a timer value times an interval after a last interrupt until the next interrupt from a receive queue is issued; paragraph [0027]).
Koryakin in view of Sankaran, further in view of Cain, further in view of Tsirkin is analogous art with Anand because they are from the same field of endeavor, scheduling.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method as taught by Koryakin in view of Sankaran, further in view of Cain, further in view of Tsirkin by controlling interrupt timing as taught by Anand because it would enhance the teaching of Koryakin in view of Sankaran, further in view of Cain, further in view of Tsirkin with an effective means controlling the queue depth at which an interrupt is issued, and adjusting interrupt threshold (as suggested by Anand, see for example paragraph [0027]).
Regarding claim 14, it is an apparatus claim having similar limitations cited in claim 7. Thus, claim 14 is also rejected under the same rationales as cited in the rejection of claim 7.
Response to Arguments
Applicant's arguments filed 06/23/2025 have been fully considered but they are not persuasive.
Applicant’s arguments are summarized as follows:
Applicant traverses the rejections of Claims 1, 7, 8, 14, and 15 rejected under 35 U.S.C. 103 as being unpatentable over Koryakin in view of Sankaran, further in view of Cain, and further in view of Tsirkin, and further in view of Anand for some dependent Claims. As allowable subject matter of Claims 2, 9, and 16 have been incorporated into respective independent Claims 1, 8, and 15, the independent Claims are now patentable over the cited art. Additionally, dependent Claims 7 and 14 are allowable due to their dependence from Claim 1 and 8.
Since independent Claims 1, 8, and 15 are allowable, Claims 3-6, 10-13, and 17-20 are also allowable due to their dependence from Claims 1 and 15.
Regarding A, the examiner respectfully disagrees. Independent Claim 1 remains rejected for the reasons stated above, and the combinations cited would have been obvious to a person of ordinary skill in the art prior to the effective filing date of the application. Therefore, contrary to Applicant’s arguments, because independent Claims 10 and 16 contain similar limitations to unpatentable Claim 1 and do not add limitations that overcome the rejection, they likewise remain rejected under 35 U.S.C. 103, and the application is not in condition for allowance.
Regarding B, the examiner respectfully disagrees. Independent claims 1, 8, and 15 remain rejected for the reasons stated above, and the combinations cited would have been obvious to a person of ordinary skill in the art prior to the effective filing date of the application. Therefore, contrary to Applicant’s arguments, because the dependent claims 3-6, 10-13, and 17-20 depend on unpatentable claims and do not add limitations that overcome the rejection, they likewise remain rejected, and the application is not in condition for allowance.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Ho (US 20160378545 A1) discloses kernel services involving events and interrupts, waiting and blocking of kernel processes, and interrupt processing (see [0011, 0101, 01440164, 0206, 0223, 0318]).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FARAZ T AKBARI whose telephone number is (571)272-4166. The examiner can normally be reached Monday-Thursday 9:30am-7:30pm ET.
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/FARAZ T AKBARI/ Examiner, Art Unit 2196
/APRIL Y BLAIR/ Supervisory Patent Examiner, Art Unit 2196