DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Response to Amendment
The following office action is in response to the amendment and remarks filed on 12/12/25.
Applicant’s amendment to claims 1 and 15 is acknowledged.
Claims 6-14 are canceled.
Claims 1-5 and 15-20 are subject to examination at this time.
Interview Summary
For the prosecution record, this office action is providing clarifying remarks on Applicant’s Interview Summary that was conducted on 11/21/25. Applicants submit at page 3: “The Examiner indicated that the foregoing amendments may have overcome the rejections on the record but it would require a further search.”
As set forth in the Interview Summary 11/26/25, “The interview discussed Attorney/Applicant’s agenda, but no agreement was reached.” The examiner did not indicate the foregoing amendments may have overcome the rejections on the record.
Response to Arguments
Applicant's arguments with respect to claim 1 have been considered but are moot in view of the new ground(s) of rejection.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 5, 15-17 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huo et al., Chinese Publication No. CN 111883521 A (of record, see attached English machine translation) in view of Yan, Chinese Publication No. CN 103227170 A (of record, see attached English machine translation), Hable, US Publication No. 2005/0237722 A1 (of record) and Bae, US Publication No. 2013/0328200 A1 (of record).
Huo teaches:
1. A power structure, comprising (see figs. 1 and 10):
a first substrate (19) having a first surface (e.g. bottom surface);
a second substrate (16) having a second surface (e.g. top surface) disposed opposite to the first surface of the first substrate…;
a conductive part (13 in fig. 1; 20 in fig. 10) including a first end connected to the first surface and a second end connected to the second surface;
a driver chip (12, “control chip”; See Hable reference below disclosing control chips are driver chips.) disposed on the first substrate (19) facing the second substrate (16);
a pad (e.g. See remarks below) located on a rear surface (e.g. top surface) of the first substrate (19), wherein the rear surface (e.g. top surface) and the first surface (e.g. bottom surface) of the first substrate are two opposite surfaces, wherein the pad is used for an electrical connection between the power structure and an external device; and
a power chip (11) disposed on the second substrate (16). See Huo at English machine translation pages 11-15 and pages 27-28, also see pages 1-35, figs. 1-18.
Regarding claim 1:
In a first interpretation, Huo, in fig. 1, teaches a pad (18) located on a rear surface (e.g. top surface) of the first substrate (19) because the pad (18) is coplanar with the rear surface. For example, the pad (18) is located at and below the rear surface of the first substrate (19).
In a second interpretation, Huo, in fig. 8, teaches an anti-oxidation layer may be formed over layer (181, 18). The anti-oxidation layer may be stacked nickel layer, palladium layer and gold layer. The anti-oxidation layer is interpreted as the pad located on a rear surface (e.g. top surface) of the first substrate (19). See Huo at English machine translation page 26.
In a third interpretation, Huo, in fig. 8, teaches a solder ball may be formed over layer (181, 18). The solder ball is interpreted as the pad located on a rear surface (e.g. top surface) of the first substrate (19). See Huo at English machine translation page 26.
The limitation “the pad is used for an electrical connection between the power structure and an external device” is an intended use limitation
A recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus satisfying the claimed structural limitations. Ex parte Masham, 2 USPQ2d 1647 (1987).
It would have been obvious top one of ordinary skill in the art that Huo’s pad is capable of being used for an electrical connection between the power structure and an external device because in the first to third interpretations above, the pad is conductive.
In a fourth interpretation, in an analogous art, Yan teaches:
(See figs. 5-6) a pad (e.g. A pad is shown in fig. 5 and labeled 133 in fig. 6) located on a rear surface (e.g. top surface) of a first substrate (130), wherein the rear surface (e.g. top surface) and the first surface (e.g. bottom surface) of the first substrate are two opposite surfaces, wherein the pad is used for an electrical connection between the structure (300) and an external device (100). See Yan at English machine translation para. [0079] – [0083].
Huo refers to element (12) as “control chip”. Huo does not label element (12) as a “driver chip”. That is, Huo does not use the same vocabulary to describe element (12).
However, Referring to MPEP § 2131:
“The identical invention must be shown in as complete detail as is contained in the ... claim.” Richardson v. Suzuki Motor Co., 868 F.2d 1226, 1236, 9 USPQ2d 1913, 1920 (Fed. Cir. 1989). The elements must be arranged as required by the claim, but this is not an ipsissimis verbis test, i.e., identity of terminology is not required. In re Bond, 910 F.2d 831, 15 USPQ2d 1566 (Fed. Cir. 1990).
Furthermore, in an analogous art, Hable teaches a control chip (31) may be referred to as a driver chip (21) at para. [0040].
Further regarding claim 1:
Huo does not expressly teach “wherein the second substrate has a heat dissipation function, wherein the heat dissipation function comprises a heat dissipation module disposed on a rear face of the second surface of the second substrate, wherein the second substrate comprises a direct bonding copper… wherein the power chip and the heat dissipation module are disposed on different surfaces of the second substrate.”
In an analogous art, Bae teaches:
(see fig. 4) wherein the second substrate (100) has a heat dissipation function, wherein the heat dissipation function comprises a heat dissipation module (300) disposed on a rear face of the second surface (e.g. bottom surface) of the second substrate (100), wherein the second substrate (100) comprises a direct bonding copper (DBC)… wherein the power chip (200) and the heat dissipation module (300) are disposed on different surfaces of the second substrate (100). See Bae at para. [0024] – [0035], also see figs. 1-3.
Huo further teaches:
2. The power structure according to claim 1, further comprising a package body (14) that covers the first surface of the first substrate (19), the second substrate (16), the driver chip (12), the power chip (11), and the conductive part (13, 20), figs. 1 and 10.
3. The power structure according to claim 1, wherein the driver chip (12) is disposed on the first surface (e.g. bottom surface) of the first substrate (19) or built in the first substrate; and the power chip (11) is disposed on the second surface (e.g. top surface) of the second substrate (16), figs. 1 and 10.
Regarding claim 5:
It would have been obvious to one having ordinary skill in the art to form additional chips such as “further comprising an electronic element disposed on the first surface of the first substrate and/or the second surface of the second substrate”, since duplication of essential working parts of a device involve only routine skill in the art. See MPEP 2144.04, Legal Precedent as Source of Supporting Rationale, VI. Reversal, Duplication, or Rearrangement of Parts.
Regarding claim 15:
Huo, Yan, Hable and Bae teach the limitations as applied to claim 1 above.
Regarding claim 16:
Huo teaches the limitations as applied to claim 2 above.
Regarding claim 17:
Huo teaches the limitations as applied to claim 3 above.
Regarding claim 19:
Huo teaches the limitations as applied to claim 5 above.
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Huo with the teachings of Yan because a pad that can be used for an electrical connection to an external device enables the integration of additional “functional requirements” (e.g. “plurality of chips” and “plurality of passive elements” providing added functionality) into a semiconductor package. See Yang at para. [0002].
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Huo with the teachings of Hable because control or driver chips are mounted together with logic chips to create “an intelligent power module”. See Hable at para. [0040].
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Huo with the teachings of Bae because “Accordingly, in current power semiconductor packages, copper substrates or direct bonded copper (DBC) type substrates which have good thermal characteristics are applied, and a heat pipe or a heat spreader is installed on the rear surface of two substrates in order to lower the high level of heat generated by a power semiconductor.” See Bae at para. [0004], also see para. [0034] – [0035].
Claim(s) 4 and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huo in view of Yan, Hable and Bae, as applied to claims 1 and 15 above, and further in view of Nagasaki et al., US Publication No. 2022/0157788 A1 (of record).
Regarding claims 4 and 18:
Huo, Yan, Hable and Bae teach all the limitations of claims 1 and 15 above, and but do not expressly teach wherein the first end is soldered to the first surface, and the second end is soldered to the second surface.
In an analogous art, Nagasaki teaches:
(see fig. 8) wherein a first end (e.g. top end of conductive part 701) is soldered (602) to the first surface (e.g. bottom surface), and the second end (e.g. bottom end of 701) is soldered (602) to the second surface (e.g. top surface). See Nagasaki at para. [0061] – [0069].
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Huo with the teachings of Nagasaki because “In contrast, as the signal relay conductor 701 is used, the height and thickness of the high-potential side terminal 201, the low-potential side terminal 202, the AC output terminal 203, the positive sense terminal 204, and the negative sense terminal 205 when viewed from the A-A′ cross-sectional direction can be made the same, and the productivity in the molding process can be secured.” See Huo at para. [0066].
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huo in view of Yan, Hable and Bae, as applied to claim 15 above, and further in view of Yoshimatsu et al., US Publication No. 2002/0024120 A1 (of record).
Regarding claim 20:
Huo, Yan, Hable and Bae teach all the limitations of claim 15 above, and but do not expressly teach further comprising a heat dissipation module disposed on a rear face of the second surface of the second substrate.
In an analogous art, Yoshimatsu teaches:
(see figs. 2-3) further comprising a heat dissipation module (14) disposed on a rear face of the second surface of the second substrate (2 and/or 3), para. [0036].
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Huo with the teachings of Yoshimatsu because “Electromagnetic waves which are emitted toward the control substrate 18 from the power switching semiconductor device 4 are dissipated to the heat sink 14 which is grounded via the conductive electromagnetic shielding member 19…therefore, the control components 8 such as the control semiconductor device which are mounted on the control substrate 18 can be prevented from malfunctioning.” See Yoshimatsu at para. [0037].
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Michele Fan whose telephone number is 571-270-7401. The examiner can normally be reached on M-F from 7:30 am to 4 pm.
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/Michele Fan/
Primary Examiner, Art Unit 2818
23 February 2026