DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1, 3-13, 15, and 17-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, because the specification, while being enabling for two sets of particular thicknesses (¶48), does not reasonably provide enablement for all first and second thicknesses that prevent crack propagation from the plurality of first cuts and the plurality of second cuts from meandering outside of a plurality of scribe streets. The specification does not enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to use the invention commensurate in scope with these claims.
The claimed limitation “selecting the first thickness and the second thickness to prevent crack propagating from the plurality of first cuts and the plurality of second cuts from meandering outside of a plurality of scribe streets” from the specification (e.g., ¶48) appears to require a particular relationship between the first thickness, second thickness, and the semiconductor wafer thickness. However, only two sets of thicknesses are provided; but the claims cover all possible first and second thickness selections for a wafer of arbitrary thickness. The art does not appear to explicitly recognize a particular relationship between elements corresponding to the first and second thicknesses as claimed and the claimed lack of meandering, and the Applicant has not provided any guidance as to how to select the first and second thicknesses in general. How should the first and second thicknesses be selected for a wafer with a thickness of 300 µm or 600 µm? Or 1000 µm? What if the wafer is only 50 µm thick? These questions are not answered by the Applicant’s specification.
Claims 3-7, 9-13, and 17-20 inherit this rejection for a lack of enablement commensurate with the scope of the claims.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Rejection 1/2
Claim 1, 3, 5-6, 8, 10-11, and 13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Furuta (US 2020/0266104) newly cited.
(Re Claim 1) Furuta teaches the method of manufacturing a semiconductor package, comprising: attaching a tape (17; Fig. 3A, ¶26) to a first side of a semiconductor wafer; forming a plurality of first cuts (25a; Fig. 3B) in the semiconductor wafer, wherein the plurality of first cuts are formed at a first thickness (11c; Fig. 3B) of the semiconductor wafer, and wherein the plurality of first cuts comprise: a first set of first cuts (25a formed along the length direction of 13a; Fig. 1, ¶41) that are parallel to one another; and a second set of first cuts (25a formed along the length direction of 13b; Fig. 1, ¶41) that are parallel to one another and perpendicular to the first set of first cuts; forming a plurality of second cuts (25b; Fig. 4A) in the semiconductor wafer after forming the plurality of first cuts (¶50), wherein the plurality of second cuts are vertically aligned with the plurality of first cuts (Fig. 4B, ¶51) and are formed at a second thickness (11d; Fig. 4B) of the semiconductor wafer, and wherein the plurality of second cuts comprise: a first set of second cuts (25b that are formed along the length direction of 13a; Fig. 1, ¶¶51-52) that are parallel to one another; and a second set of second cuts (25b that are formed along the length direction of 13b; Fig. 1, ¶¶51-52) that are parallel to one another and perpendicular to the first set of second cuts; and selecting the first thickness and the second thickness to prevent crack propagating from the plurality of first cuts and the plurality of second cuts from meandering outside of a plurality of scribe streets (the first cuts and the second cuts are joined within scribe streets 13a and 13b; Fig. 1 and 4B, ¶53).
(Re Claim 3) Furuta teaches the method of claim 1, wherein forming the plurality of first cuts comprises forming the plurality of first cuts with a laser cutter (6+8; Fig. 3B), wherein forming the plurality of second cuts comprises forming the plurality of second cuts with the laser cutter (6+8; Fig. 3B), and wherein the method further comprises: forming a first layer of discontinuities (23a; Fig. 3B) in the semiconductor wafer with the laser cutter when forming the plurality of first cuts; and forming a second layer of discontinuities in the semiconductor wafer with the laser cutter when forming the plurality of second cuts (23b; Fig. 4B), wherein the first layer of discontinuities and the second layer of discontinuities are spaced from one another (Fig. 4B).
(Re Claim 5) Furuta teaches the method of claim 3, wherein the semiconductor wafer comprises a device side (11a; Fig. 4B) having a plurality of circuits (conductive films included within devices 15 and devices 15 themselves; ¶35) formed thereon, and a non-device side (11b; Fig. 4B) opposite the device side.
(Re Claim 6) The method of claim 5, further comprising directing a laser (8; Fig. 3A) of the laser cutter through the non-device side while forming the plurality of first cuts and forming the plurality of second cuts, wherein the first side of the semiconductor wafer is the device side (Fig. 3A).
(Re Claim 8) Furuta teaches the method of manufacturing a semiconductor package, comprising: attaching a tape (21; Fig. 3A) to a first side (11a; Fig. 3A) of a semiconductor wafer (11; Fig. 3A); directing a laser (8; Fig. 3A) into the semiconductor wafer, wherein the semiconductor wafer comprises a plurality of circuits (15+21; Fig. 1) and a plurality of scribe streets (13a+13b; Fig. 1) positioned between the plurality of circuits; forming a plurality of first cuts (25a; Fig. 3B) with the laser at a first thickness (11c) of the semiconductor wafer that are vertically aligned with the plurality of scribe streets (“cracks 25a propagate…in the thickness direction of the wafer 11” (¶36)); after forming the plurality of first cuts, forming a plurality of second cuts (25b; Fig. 4B) with the laser at a second thickness (11d) of the semiconductor wafer that are vertically aligned with the plurality of first cuts (Fig. 4B, “cracks 25b are also formed…in the thickness direction of the wafer 11”(¶51)); and selecting the first thickness and the second thickness to prevent crack propagating from the plurality of first cuts and the plurality of second cuts from meandering outside of the plurality of scribe streets (the plurality of first and second cuts do not have cracks meandering outside the plurality of scribe streets, and so the first and second thickness were selected to accomplish this).
(Re Claim 10) Furuta teaches the method of claim 8, wherein the semiconductor wafer comprises a device side (11a; Fig. 4B) and a non-device side (11b; Fig. 4B), and wherein the device side comprises the plurality of circuits and the plurality of scribe streets (Fig. 1).
(Re Claim 11) Furuta teaches the method of claim 10, wherein forming the plurality of first cuts and forming the plurality of second cuts comprise directing the laser into the semiconductor wafer from the non-device side, wherein the first side of the semiconductor wafer is the device side.
(Re Claim 13) Furuta teaches the method of claim 8, wherein forming the plurality of first cuts and forming the plurality of second cuts comprise not cutting the tape (Fig. 4B).
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 4 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Furuta (US 2020/0266104) newly cited as respectively applied to claims 3 and 8 above, and further in view of further in view of Yonehara et al. (US 2014/0038392) of record and Lee (US 2023/0129020) newly cited.
(Re Claim 4) Furuta teaches the method of claim 3, but has not been shown to explicitly teach the method further comprising applying an output power level for the laser cutter of 0.5 watts (W) to 0.7 W during forming the plurality of first cuts and forming the plurality of second cuts.
Yonehara teaches using a laser operated in the range of 0.1 to 1.5 watts (¶107).
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to operate the laser within the range of Yonehara to allow for less damage from scattered light (¶91). In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976).
(Re Claim 9) Furuta teaches the method of claim 8, but has not been shown to explicitly teach the method wherein forming the plurality of first cuts and forming the plurality of second cuts comprise applying an output power level for the laser of 0.5 watts (W) to 0.7 W.
Yonehara teaches using a laser operated in the range of 0.1 to 1.5 watts (¶107).
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to operate the laser within the range of Yonehara to allow for less damage from scattered light (¶91). In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976).
Claims 15 and 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Furuta (US 2020/0266104) and Lee (US 2023/0129020), both newly cited, and Yonehara et al. (US 2014/0038392) of record.
(Re Claim 15) Furuta teaches the method of manufacturing a semiconductor package, comprising: attaching a tape (21; Fig. 3A) to a first side (11a) of a semiconductor wafer (11; Fig. 3A); emitting a laser (8; Fig. 3A) from a laser cutter (6; ¶27); forming a plurality of first cuts (25a; Fig. 3B) in the semiconductor wafer with the laser (Fig. 3A), wherein the plurality of first cuts are formed at a first thickness (11c) of the semiconductor wafer; forming a plurality of second cuts (25b; Fig. 3B) in the semiconductor wafer with the laser after forming the plurality of first cuts (Fig. 4B), wherein the plurality of second cuts are vertically aligned (Fig. 4B, “cracks 25b are also formed…in the thickness direction of the wafer 11”(¶51)) with the plurality of first cuts and are formed at a second thickness (11d) of the semiconductor wafer, and selecting the first thickness and the second thickness to prevent crack propagating from the plurality of first cuts and the plurality of second cuts from meandering outside of a plurality of scribe streets (the plurality of first and second cuts do not have cracks meandering outside the plurality of scribe streets, and so the first and second thickness were selected to accomplish this).
Furuta has not been shown to explicitly teach a method comprising emitting a laser from a laser cutter at a power level between 0.5 watts (W) and 0.7 W.
Yonehara teaches using a laser operated in the range of 0.1 to 1.5 watts (¶107).
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to operate the laser within the range of Yonehara to allow for less damage from scattered light (¶91). In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976).
(Re Claim 17) Modified Furuta teaches the method of claim 15, wherein the semiconductor wafer comprises a device side (11a; Fig. 3A) having a plurality of circuits (15+21; Fig. 1 and 3A) formed thereon, and a non-device side (11b; Fig. 3A) opposite the device side.
(Re Claim 18) Modified Furuta teaches the method of claim 17, further comprising directing the laser through the non-device side while forming the plurality of first cuts (Fig. 3A) and forming the plurality of second cuts (Fig. 4A), wherein the first side of the semiconductor wafer is the device side (Fig. 3A and 4A).
Claims 7 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Furuta (US 2020/0266104) newly cited as respectively applied to claims 5 and 10, and further in view of Sherbin et al. (US 2020/0176314) of record.
(Re Claim 7) Furuta teaches the method of claim 5, but has not been shown to explicitly teach the method further comprising directing a laser of the laser cutter through the device side while forming the plurality of first cuts and forming the plurality of second cuts, wherein the first side of the semiconductor wafer is the non-device side.
However, in view of Sherbin (Fig. 1) and Applicant’s statement that Species A and B are obvious variants of each other (election received 11/12/2024), a person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to reorient the semiconductor wafer of Fig. 3B such that the dicing tape is on the non-device side and the laser of the laser cutter goes through the device side of the semiconductor wafer.
(Re Claim 12) Furuta teaches the method of claim 10, but has not been shown to explicitly teach the method wherein forming the plurality of first cuts and forming the plurality of second cuts comprise directing the laser into the semiconductor wafer from the device side, wherein the first side of the semiconductor wafer is the non-device side.
However, in view of Sherbin (Fig. 1) and Applicant’s statement that Species A and B are obvious variants of each other (election received 11/12/2024), a person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to reorient the semiconductor wafer of Fig. 3B such that the dicing tape is on the non-device side and the laser of the laser cutter goes through the device side of the semiconductor wafer.
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Furuta (US 2020/0266104) and Lee (US 2023/0129020), both newly cited, and Yonehara et al. (US 2014/0038392) of record, as applied to claim 17 above, and further in view of Sherbin et al. (US 2020/0176314) of record.
(Re Claim 19) Modified Furuta teaches the method of claim 17, but has not been shown to explicitly teach the method further comprising directing the laser through the device side while forming the plurality of first cuts and forming the plurality of second cuts, wherein the first side of the semiconductor wafer is the non-device side.
However, in view of Sherbin (Fig. 1) and Applicant’s statement that Species A and B are obvious variants of each other (election received 11/12/2024), a person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to reorient the semiconductor wafer of Fig. 3B such that the dicing tape is on the non-device side and the laser of the laser cutter goes through the device side of the semiconductor wafer.
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Furuta (US 2020/0266104) and Lee (US 2023/0129020), both newly cited, and Yonehara et al. (US 2014/0038392) of record as applied to claim 15 above, and further in view of Moeller et al. (US 2021/0305095) and Sherbin et al. (US 2020/0176314), both of record.
(Re Claim 20) Modified Furuta teaches the method of claim 15, further comprising: separating a semiconductor die (one 15; Fig. 1, “In addition, at the time that the first modified layer forming step and the second modified layer forming step have been conducted, the dividing step of the wafer 11 has already been completed” (¶63)) as a result of forming the plurality of first cuts and forming the plurality of second cuts (¶63).
Modified Furuta has not been shown to explicitly teach the method further comprising separating a semiconductor from the semiconductor wafer; coupling a circuit on the semiconductor die to a plurality of conductive terminals; and covering the semiconductor die with a mold compound.
Sherbin teaches semiconductor die at a device side (105a; Fig. 1) of a semiconductor wafer (105; Fig. 1), wherein the semiconductor die include circuitry (¶22).
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious that the semiconductor dies (15; Fig. 1) of modified Furuta include circuitry as taught by Sherbin, as this allows for the dies 15 to have various memory or logic functionality, and so modified Furuta in view of Sherbin also teaches a semiconductor wafer comprising semiconductor dies comprising circuits (each circuit of semiconductor dies 15; Fig. 1).
Moeller teaches that after the dies are singulated, they are coupled to a plurality of conductive terminals (76; Fig. 8, ¶21), and covered with a mold compound (72).
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to couple a circuit on the semiconductor die of modified Furuta, after moving one of the separated dies from the semiconductor wafer, and then cover them with a mold compound, in the manner taught by Moeller, in order to achieve the predictable result of accessing the functions of the semiconductor die while protecting the die from moisture and physical damage.
Rejection 2/2
Claims 1 and 3 are rejected under 35 U.S.C. 103 as being unpatentable over Wyant et al. (US 2020/0051860), Kriebel et al. (US 2016/0093534), Tamura et al. (US 2007/0202619), Fukuyo et al. (US 6,992,026), and Keite-Telgenbuscher et al. (US 2008/0271845), all of record.
(Re Claim 1) Wyant teaches a method of manufacturing a semiconductor package, comprising:
attaching a tape (312; Fig. 3A) to a first side (device side – the bottom side shown in Fig. 3A; ¶17) of a semiconductor wafer; forming a plurality of first cuts (leftmost crack from top of 302 to the bottom; Fig. 3A) in a semiconductor wafer (302; Fig. 3A), wherein the plurality of first cuts (between 324 and bottom of 302; Fig. 3A) are formed at a first thickness (top of 302 to the bottom) of the semiconductor wafer, and wherein the plurality of first cuts comprises: a first set of first cuts (314; Fig. 3A) that are parallel to one another.
Wyant has not been shown to explicitly teach a method comprising:
a plurality of first cuts, wherein the plurality of first cuts comprises: a second set of first cuts that are parallel to one another and perpendicular to the first set of first cuts; forming a plurality of second cuts in the semiconductor wafer after forming the plurality of first cuts, wherein the plurality of second cuts are vertically aligned with the plurality of first cuts and are formed at a second thickness of the semiconductor wafer, and wherein the plurality of second cuts comprises: a first set of second cuts that are parallel to one another; and a second set of second cuts that are parallel to one another and perpendicular to the first set of second cuts; and
selecting the first thickness and the second thickness to prevent crack propagating from the plurality of first cuts and the plurality of second cuts from meandering outside of a plurality of scribe streets.
However, Wyant teaches another embodiment demonstrating completing a set of first lower cuts and a set of first upper cuts, where the first set of upper cuts are vertically aligned with the first lower set (See Fig. 5D and associated markup). Furthermore, Wyant teaches forming the cuts seen in the cross-section of Fig. 5D in a direction perpendicular to the set of first lower and upper of cuts (¶46), singulating each die (505) such that each die has four sides, with edges corresponding to laser cutting paths (¶46). This results in the cuts forming a grid pattern. These perpendicular lower and upper cuts form a set of second lower cuts and a set of second upper cuts.
As the lower and upper cuts are formed parallel to each other (Fig. 5C, 5D, and 6A; ¶46), and another set of lower and upper cuts can be formed perpendicular such that each die has four sides (¶46), a person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to form – in the wafer as seen in Fig. 3B – a plurality of first cuts corresponding to the first and second lower cuts as discussed above, and a plurality of second cuts corresponding to the first and second upper cuts as discussed above, resulting in the predictable effect of cutting and separating the various dies (305; Fig. 3B) located in or at the wafer. See Ruiz v. A.B. Chance Co., 357 F.3d 1270, 69 USPQ2d 1686 (Fed. Cir. 2004).
Modified Wyant then teaches a method of manufacturing a semiconductor package comprising:
forming a plurality of first cuts (set of lower cuts, with reference to Fig. 3A markup and the discussion above) in a semiconductor wafer (302; Fig. 3A), wherein the plurality of first cuts extend through a first portion (from top of crack generated by 310 to the bottom) of a thickness (top of 302 to the bottom) of the semiconductor wafer, and wherein the plurality of first cuts comprises:
a first set of first cuts (set of first lower cuts) that are parallel to one another (Fig. 3A markup); and
a second set of first cuts that are parallel to one another and perpendicular to the first set of first cuts (set of second lower cuts; ¶46); and
forming a plurality of second cuts (set of upper cuts, with reference to Fig. 3A markup and the discussion above) in the semiconductor wafer, wherein the plurality of second cuts are vertically aligned with the plurality of first cuts (Fig. 3A markup) and extend through a second portion (from top of crack generated by 324 and 326 to the bottom) of the thickness of the semiconductor wafer, and wherein the plurality of second cuts comprises:
a first set of second cuts (set of first upper cuts) that are parallel to one another (Fig. 3A); and
a second set of second cuts (set of second upper cuts) that are parallel to one another and perpendicular to the first set of second cuts (see the discussion around ¶46).
It has yet to be shown that modified Wyant teaches forming a plurality of second cuts in the semiconductor wafer after forming the plurality of first cuts, as currently the first set of first cuts and first set of second cuts are formed, and then the second set of first cuts and second set of second cuts are formed.
Wyant does teach sequentially forming continuous layers of discontinuities (“the polycrystalline [discontinuity] regions will be at different depths as described above and can be continuous if the frequency and scanning speed are such that all of the silicon is affected”; Fig. 2A, ¶51; see also Fig. 6A for an example of continuous discontinuity layers), and a laser beam used for cutting that can be focused to multiple depths (¶16).
Kriebel teaches moving a laser along a first set of cut lines 12, and then a second set of cut lines 11 at a depth “a” (Fig. 1-4), and then repeating that process up to two more times (Fig. 3-4) at different depths, where the first cuts (any cracks propagating from the device side 19 to halfway between discontinuities 28 and 29 constitute the first cuts; Fig. 3-4) comprise a first set of first cuts (first cuts along cut line 12) that are parallel to one another; and
a second set of first cuts (first cuts along cut line 11) that are parallel to one another and perpendicular to the first set of cuts; and
forming a plurality of second cuts (cracks propagating from halfway between discontinuities 28 and 29 down to their farthest extent; Fig. 3-4) in the semiconductor wafer after forming the plurality of first cuts (¶¶42-44), wherein the plurality of second cuts are vertically aligned with the plurality of first cuts (Fig. 3-4) and extend through a second portion (from the starting point of the second cuts to their end) of the thickness of the semiconductor wafer, and wherein the plurality of second cuts comprise:
a first set of second cuts (second cuts along cut line 12); that are parallel to one another; and
a second set of second cuts (second cuts along cut line 11) that are parallel to one another and perpendicular to the first set of second cuts.
Tamura teaches alternative embodiments of a laser to form discontinuities using either one or two focal points (Fig. 4-5).
A PHOSITA would find it obvious to change the order of cut formation for the wafer as shown in Fig. 3B, by switching from a split beam operation to a single beam operation, in the manner of Tamura, to form the plurality of second cuts after forming the plurality of first cuts as defined above, as the single beam of Fig. 2A achieves the predictable result of forming layers of discontinuities, and using a single beam or split beam are known alternatives. See Ruiz v. A.B. Chance Co., 357 F.3d 1270, 69 USPQ2d 1686 (Fed. Cir. 2004).
Furthermore, a PHOSITA would find it obvious to form the first cuts and second cuts of modified Wyant in the order taught by Kriebel, such that the second cuts are formed after the first cuts, where the first cuts are the set of lower cuts (Wyant: Fig. 5D markup) and the second cuts are the set of upper cuts (Wyant: Fig. 5D markup), wherein the first set of first cuts and the first set of second cuts are along the first direction of Wyant; and the second set of first cuts and the second set of second cuts are along the second direction (Wyant: ¶46), as this cut formation sequence prevents defects in the second cuts from being influenced by defects in the first cuts (Kriebel: ¶16). See also In re Burhans, 154 F.2d 690, 69 USPQ 330 (CCPA 1946) (selection of any order of performing process steps is prima facie obvious in the absence of new or unexpected results).
PNG
media_image1.png
405
923
media_image1.png
Greyscale
Modified Wyant has yet to be shown to teach the plurality of second cuts are closer to the tape than the plurality of first cuts.
Fukuyo teaches that cut height when using lasers can be adjusted according to the size of the discontinuity region (Col. 58 Ln. 42-45), that the size of the discontinuity region can be adjusted (Fig. 59-65; Col. 10 Ln. 30-38), and that the number of depths at which discontinuity regions are formed can be changed according to the wafer’s thickness or intrinsic cutting difficulty (Col. 70 Ln. 33-47).
In view of Fukuyo, a person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to use two depths when forming the discontinuities of modified Wyant, that is only forming regions 310 and 324, rather than 310, 324, and 326, when the semiconductor wafer is thinner to allow for faster production by avoiding an additional depth of discontinuity formation. Thinner wafers also provide increase thermal conductivity (Keite-Telgenbuscher: ¶6).
This results in modified Wyant only forming the regions 310 and 324.
Fukuyo teaches that discontinuities may be formed either from farthest from the laser entry point to closest, or vice-versa (col. 70 ln. 48-67 to col. 71 ln. 1-7).
A PHOSITA would find it obvious to form the regions 310 after forming the regions 324, rather than forming regions 324 after forming regions 310, as this is a known process sequence that predictably forms cuts in a thin semiconductor wafer to allow for singulation without force application (“can be cut along the line 5…or naturally without applying such force”; col. 70 ln. 29-32). See In re Fout, 675 F.2d 297, 213 USPQ 532 (CCPA 1982).
For modified Wyant then, the method now comprises a plurality of first cuts comprises, wherein the plurality of first cuts are formed at a first thickness (from the top of wafer 302, which is the dashed line, to the bottom of the crack generated when forming region 324; Fig. 3A markup below), wherein the plurality of first cuts comprises:
a first set of first cuts (set of first upper cuts) that are parallel to one another (Fig. 3A markup); and
a second set of first cuts that are parallel to one another and perpendicular to the first set of first cuts (set of second upper cuts; ¶46); and
and the plurality of second cuts (set of lower cuts, with reference to Fig. 3A markup and the discussion above) in the semiconductor wafer, wherein the plurality of second cuts are vertically aligned with the plurality of first cuts (Fig. 3A markup) and are formed at a second thickness (from the top of the crack generated after forming region 310 to the bottom of wafer 302; Fig. 3A markup) of the semiconductor wafer, and wherein the plurality of second cuts comprises:
a first set of second cuts (set of first upper cuts) that are parallel to one another (Fig. 3A); and
a second set of second cuts (set of second upper cuts) that are parallel to one another and perpendicular to the first set of second cuts (see the discussion around ¶46), wherein the plurality of second cuts are closer to the tape than the plurality of first cuts (Fig. 3A markup).
Therefore, modified Wyant teaches forming the plurality of second cuts closer to the tape than the plurality of first cuts.
PNG
media_image2.png
396
861
media_image2.png
Greyscale
Wyant teaches selecting thicknesses of cuts (314; Fig. 3B) to prevent crack propagating from the cuts from meandering outside of a plurality of scribe streets (316; Fig. 3B, “the dicing tape 312 is stretched to open the cracks 314 in the scribe streets 316, singulating the semiconductor device dies 305” (¶18); note that the cracks 314 do not deviate outside of the modified portions 310+324+326 in a plan view).
A PHOSITA would find it obvious to select the first and second thicknesses of modified Wyant to prevent crack propagating from the plurality of first cuts and the plurality of second cuts from meandering outside of a plurality of scribe streets, in the manner demonstrated by Wyant, to allow for device singulation through the joining of the first and second cuts from one side of the wafer to the opposing side.
(Re Claim 3) Modified Wyant teaches the method of claim 1, wherein forming the plurality of first cuts comprises forming the plurality of first cuts with a laser cutter, wherein forming the plurality of second cuts comprises forming the plurality of second cuts with the laser cutter (¶51); and wherein the method further comprises: forming a first layer of discontinuities (continuous 310 layers) in the semiconductor wafer with the laser cutter when forming the plurality of first cuts; and forming a second layer of discontinuities (continuous 324 layers) in the semiconductor wafer with the laser cutter when forming the plurality of second cuts, wherein the first layer of discontinuities and the second layer of discontinuities are spaced from one another along the thickness of the semiconductor wafer (Fig. 2A, ¶51; see also Fig. 6A for an example discontinuity layers that are spaced apart).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Wyant et al. (US 2020/0051860), Kriebel et al. (US 2016/0093534), Tamura et al. (US 2007/0202619), and Fukuyo et al. (US 6,992,026), and Keite-Telgenbuscher et al. (US 2008/0271845) all of record, as applied to claim 3 above, and further in view of Yonehara et al. (US 2014/0038392) of record.
(Re Claim 4) Modified Wyant teaches the method of claim 3, but does not explicitly teach the method comprising applying an output power level for the laser cutter of 0.5 watts (W) to 0.7 W during forming the plurality of first cuts and forming the plurality of second cuts.
Yonehara teaches using a laser operated in the range of 0.1 to 1.5 watts (¶107).
In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976).
Claims 5-7 are rejected under 35 U.S.C. 103 as being unpatentable over Wyant et al. (US 2020/0051860), Kriebel et al. (US 2016/0093534), Tamura et al. (US 2007/0202619), and Fukuyo et al. (US 6,992,026), and Keite-Telgenbuscher et al. (US 2008/0271845) all of record, as applied to claim 3 above, and further in view of Sherbin et al. (US 2020/0176314) of record.
(Re Claim 5) Modified Wyant teaches the method of claim 3, wherein the semiconductor wafer comprises a device side (at 312; Fig. 3B), and a non-device side (at 305 labelling; Fig. 3B) opposite the device side.
However, modified Wyant does not explicitly teach a method wherein a device side has a plurality of circuits formed thereon.
Sherbin teaches semiconductor die at a device side (105a; Fig. 1) of a semiconductor wafer (105; Fig. 1), wherein the semiconductor die include circuitry (¶22).
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious that the semiconductor die (305; Fig. 3B) of modified Wyant include circuitry as taught by Sherbin, as this allows for the dies 305 to have various memory or logic functionality, and so modified Wyant in view of Sherbin also teaches a semiconductor wafer comprising a device having a plurality of circuits formed thereon (each circuit of semiconductor dies 305; Fig. 3B).
(Re Claim 6) Modified Wyant teaches the method of claim 5, comprising directing a laser of the laser cutter (204+206+208; Fig. 2A, ¶¶14-15, 17) through the non-device side while forming the plurality of first cuts and forming the plurality of second cuts, wherein the first side of the semiconductor wafer is the device side (“device side in contact with the dicing tape”; ¶17).
(Re Claim 7) Modified Wyant teaches the method of claim 5, but does not explicitly teach the method comprising directing a laser of the laser cutter through the device side while forming the plurality of first cuts and forming the plurality of second cuts, wherein the first .
However, in view of Sherbin (Fig. 1) and Applicant’s statement that Species A and B are obvious variants of each other (election received 11/12/2024), a person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to reorient the semiconductor wafer of Fig. 3B such that the dicing tape is on the non-device side and the laser of the laser cutter goes through the device side of the semiconductor wafer.
Additionally, as Fukuyo teaches that a formation sequence for discontinuity regions may be either from a depth farthest from the laser entry side then up, or a depth closest to the laser entry side then down (Col. 70 Ln. 62-67 to Col. 71 Ln. 1-3), a PHOSITA would find it obvious to still form first cuts and second cuts from a depth farthest from the laser entry side then up, as shown in Fig. 2A of Wyant.
Claims 8, 10-13 are rejected under 35 U.S.C. 103 as being unpatentable over Wyant et al. (US 2020/0051860), Sherbin et al. (US 2020/0176314), Nakamura et al. (US 2018/0151508) all of record, Kriebel et al. (US 2016/0093534), Fukuyo et al. (US 6,992,026), Tamura et al. (US 2007/0202619), and Keite-Telgenbuscher et al. (US 2008/0271845), all of record.
(Re Claim 8) Wyant teaches a method of manufacturing a semiconductor package, comprising:
attaching a tape (312; Fig. 3A) to a first side (bottom side as shown in Fig. 3A) of a semiconductor wafer (302; Fig. 3A); directing a laser (in stealth dicing, a laser is directed through the non-device side of the semiconductor wafer; Fig. 2A and 3B, ¶¶6, 15) into the semiconductor wafer (302; Fig. 3B); forming a plurality of first cuts (316; Fig. 3B) with the laser (consequence of forming 310, 324, and 326 with the laser; ¶17) at a first thickness of the semiconductor wafer (top of 302 to the bottom).
However, Wyant does not explicitly teach a method wherein the semiconductor wafer comprises a plurality of circuits and a plurality of scribe streets positioned between the plurality of circuits; forming a plurality of first cuts with the laser that are vertically aligned with the plurality of scribe streets; and after forming the plurality of first cuts, forming a plurality of second cuts with the laser at a second thickness of the semiconductor wafer that are vertically aligned with the plurality of first cuts; and
selecting the first thickness and the second thickness to prevent crack propagating from the plurality of first cuts and the plurality of second cuts from meandering outside of the plurality of scribe streets.
Sherbin teaches semiconductor die at a device side (105a; Fig. 1) of a semiconductor wafer (105; Fig. 1), wherein the semiconductor die include circuitry (¶22).
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious that the semiconductor die (305; Fig. 3B) of modified Wyant include circuitry as taught by Sherbin, as this allows for the dies 305 to have various memory or logic functionality, and so modified Wyant in view of Sherbin also teaches a semiconductor wafer comprising a plurality of circuits formed thereon (each circuit of semiconductor dies 305; Fig. 3B).
Additionally, Sherbin teaches forming scribe streets (106; Fig. 1) between the circuits (Fig. 1).
A PHOSITA would find it obvious to from scribe streets in the manner of Sherbin between the circuits of modified Wyant, in order to allow for alignment of the laser before cutting (Nakamura: Fig. 3, ¶¶27-28). This results in the lower set of cuts of modified Wyant (Wyant: Fig. 5D markup) being vertically aligned with the plurality of scribe streets.
Additionally, Wyant teaches completing a set of first lower cuts and a set of first upper cuts, where the first set of upper cuts are vertically aligned with the first lower set (See Fig. 5D). Furthermore, Wyant teaches forming the cuts seen in the cross-section of Fig. 5D in a direction perpendicular to the set of first lower and upper of cuts (¶46), singulating each die (505) such that each die has four sides, with edges corresponding to laser cutting paths (¶46). This results in the cuts forming a grid pattern. These perpendicular lower and upper cuts form a set of second lower cuts and a set of second upper cuts.
As the lower and upper cuts are formed parallel to each other (Fig. 5C, 5D, and 6A; ¶46), and another set of lower and upper cuts can be formed perpendicular such that each die has four sides (¶46), a person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to form – in the wafer as seen in Fig. 3B – a plurality of first cuts corresponding to the first and second lower cuts as discussed above, and a plurality of second cuts corresponding to the first and second upper cuts as discussed above, resulting in the predictable effect of cutting and separating the various dies (305; Fig. 3B) located in or at the wafer. See Ruiz v. A.B. Chance Co., 357 F.3d 1270, 69 USPQ2d 1686 (Fed. Cir. 2004).
The first thickness of the semiconductor wafer and the second thickness of the semiconductor wafer respectively correspond to the cracks propagated by 310, and 324+326.
Kriebel teaches moving a laser along a first set of cut lines 12, and then a second set of cut lines 11 at a depth “a” (Fig. 1-4), and then repeating that process up to two more times (Fig. 3-4) at different depths, where the first cuts (any cracks propagating from the device side 19 to halfway between discontinuities 28 and 29 constitute the first cuts; Fig. 3-4) are formed with a laser through a first thickness of a semiconductor wafer; and
after forming the plurality of first cuts, forming a plurality of second cuts (cracks propagating from halfway between discontinuities 28 and 29 down to their farthest extent; Fig. 3-4) with a laser through a second thickness of the semiconductor wafer that are vertically aligned with the plurality of first cuts (Fig. 3-4).
Tamura teaches alternative embodiments of a laser to form discontinuities using either one or two focal points (Fig. 4-5).
A PHOSITA would find it obvious to change the order of cut formation for the wafer as shown in Fig. 3B, by switching from a split beam operation to a single beam operation, in the manner of Tamura, to form the plurality of second cuts after forming the plurality of first cuts as defined above, as the single beam of Fig. 2A achieves the predictable result of forming layers of discontinuities, and using a single beam or split beam are known alternatives. See Ruiz v. A.B. Chance Co., 357 F.3d 1270, 69 USPQ2d 1686 (Fed. Cir. 2004).
Furthermore, a PHOSITA would find it obvious to form the first cuts and second cuts of modified Wyant in the order taught by Kriebel, such that the second cuts are formed after the first cuts, where the first cuts are the set of lower cuts (Wyant: Fig. 3A markup) and the second cuts are the set of upper cuts (Wyant: Fig. 3A markup), as this cut formation sequence prevents defects in the second cuts from being influenced by defects in the first cuts (Kriebel: ¶16). See also In re Burhans, 154 F.2d 690, 69 USPQ 330 (CCPA 1946) (selection of any order of performing process steps is prima facie obvious in the absence of new or unexpected results).
PNG
media_image1.png
405
923
media_image1.png
Greyscale
Fukuyo teaches that cut height when using lasers can be adjusted according to the size of the discontinuity region (Col. 58 Ln. 42-45), that the size of the discontinuity region can be adjusted (Fig. 59-65; Col. 10 Ln. 30-38), and that the number of depths at which discontinuity regions are formed can be changed according to the wafer’s thickness or intrinsic cutting difficulty (Col. 70 Ln. 33-47).
In view of Fukuyo, a person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to use two depths when forming the discontinuities of modified Wyant, that is only forming regions 310 and 324, rather than 310, 324, and 326, when the semiconductor wafer is thinner to allow for faster production by avoiding an additional depth of discontinuity formation. Thinner wafers also provide increase thermal conductivity (Keite-Telgenbuscher: ¶6).
This results in modified Wyant only forming the regions 310 and 324.
Fukuyo teaches that discontinuities may be formed either from farthest from the laser entry point to closest, or vice-versa (col. 70 ln. 48-67 to col. 71 ln. 1-7).
A PHOSITA would find it obvious to form the regions 310 after forming the regions 324, rather than forming regions 324 after forming regions 310, as this is a known process sequence that predictably forms cuts in a thin semiconductor wafer to allow for singulation without force application (“can be cut along the line 5…or naturally without applying such force”; col. 70 ln. 29-32). See In re Fout, 675 F.2d 297, 213 USPQ 532 (CCPA 1982).
For modified Wyant then, the method now comprises forming a plurality of first cuts (the set of upper cuts formed when forming regions 324; Fig. 3A markup; Wyant: ¶46), wherein the plurality of first cuts extend through a first portion (from the top of the wafer 302 to the bottom of the crack generated when forming region 324; Fig. 3A markup below); and
forming a plurality of second cuts (the set of lower cuts formed when forming regions 310; Fig. 3A markup; Wyant: ¶46) after forming the plurality of first cuts, wherein the plurality of second cuts are vertically aligned with the plurality of first cuts and extend through a second portion (from the top of the crack generated by 310 to the bottom of the wafer 302; Fig. 3A markup) of the thickness of the semiconductor wafer, and wherein the plurality of second cuts are closer to the tape than the plurality of first cuts (Fig. 3A markup).
Therefore, modified Wyant teaches forming the plurality of second cuts closer to the tape than the plurality of first cuts.
PNG
media_image2.png
396
861
media_image2.png
Greyscale
Wyant teaches selecting thicknesses of cuts (314; Fig. 3B) to prevent crack propagating from the cuts from meandering outside of a plurality of scribe streets (316; Fig. 3B, “the dicing tape 312 is stretched to open the cracks 314 in the scribe streets 316, singulating the semiconductor device dies 305” (¶18); note that the cracks 314 do not deviate outside of the modified portions 310+324+326 in a plan view).
A PHOSITA would find it obvious to select the first and second thicknesses of modified Wyant to prevent crack propagating from the plurality of first cuts and the plurality of second cuts from meandering outside of a plurality of scribe streets, in the manner demonstrated by Wyant, to allow for device singulation through the joining of the first and second cuts from one side of the wafer to the opposing side.
(Re Claim 10) Modified Wyant teaches the method of claim 8, wherein the semiconductor wafer comprises a device side (side at 312; Fig. 3B) and a non-device side (side at 305 labelling), wherein the device side comprises the plurality of circuits and the plurality of scribe streets, and wherein the first portion of the thickness extends from the device side and the second portion of the thickness extends from the non-device side (Fig. 3B).
(Re Claim 11) Modified Wyant teaches the method of claim 10, wherein forming the plurality of first cuts and forming the plurality of second cuts comprises directing the laser into the semiconductor wafer from the non-device side (Fig. 2A and 3B, ¶¶6, and 15).
(Re Claim 12) Modified Wyant teaches the method of claim 10, but does not explicitly teach the method wherein forming the plurality of first cuts and forming the plurality of second cuts comprise directing the laser into the semiconductor die from the device side.
However, in view of Sherbin (Fig. 1) and Applicant’s statement that Species A and B are obvious variants of each other (election received 11/12/2024), a person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to reorient the semiconductor wafer of Fig. 3B such that the dicing tape is on the non-device side and the laser of the laser cutter goes through the device side of the semiconductor wafer.
Additionally, as Fukuyo teaches that a formation sequence for discontinuity regions may be either from a depth farthest from the laser entry side then up, or a depth closest to the laser entry side then down (Col. 70 Ln. 62-67 to Col. 71 Ln. 1-3), as PHOSITA would find it obvious to still form first cuts and second cuts from a depth farthest from the laser entry side then up, as shown in Fig. 2A of Wyant.
(Re Claim 13) Modified Wyant teaches the method of claim 10, wherein forming the plurality of first cuts and forming the plurality of second cuts comprises not cutting tape (Fig. 3B).
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Wyant et al. (US 2020/0051860), Sherbin et al. (US 2020/0176314), Nakamura et al. (US 2018/0151508) all of record, Kriebel et al. (US 2016/0093534), Fukuyo et al. (US 6,992,026), Tamura et al. (US 2007/0202619), and Keite-Telgenbuscher et al. (US 2008/0271845) all of record, as applied to claim 8 above, and further in view of Yonehara et al. (US 2014/0038392), of record.
(Re Claim 9) Modified Wyant teaches the method of claim 8, but does not explicitly teach wherein forming the plurality of first cuts and forming the plurality of second cuts comprise applying an output power level for the laser of 0.5 Watts (W) to 0.7 W.
Yonehara teaches using a laser operated in the range of 0.1 to 1.5 watts (¶107).
In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976).
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Wyant et al. (US 2020/0051860), Yonehara et al. (US 2014/0038392), Kriebel et al. (US 2016/0093534), Tamura et al. (US 2007/0202619), Fukuyo et al. (US 6,992,026), and Keite-Telgenbuscher et al. (US 2008/0271845), all of record.
(Re Claim 15) Wyant teaches a method of manufacturing a semiconductor package, comprising:
attaching a tape (312; Fig. 3A) to a first side (bottom side of 302 as seen in Fig. 3A) of a semiconductor wafer (302; Fig. 3A). forming a plurality of first cuts (316; Fig. 3B) in a semiconductor wafer with a laser (Fig. 2A and 3B, ¶¶6, 15), wherein the plurality of first cuts are formed at a first thickness (top of 302 to the bottom) of the semiconductor wafer.
However, Wyant does not explicitly teach emitting an infrared laser from a laser cutter at a power level between 0.5 Watts (W) and 0.7 W; and forming a plurality of second cuts in the semiconductor wafer with the laser after forming the plurality of first cuts, wherein the plurality of second cuts are vertically aligned with the plurality of first cuts and are formed at a second thickness of the semiconductor wafer; and
selecting the first thickness and the second thickness to prevent crack propagating from the plurality of first cuts and the plurality of second cuts from meandering outside of the plurality of scribe streets.
Yonehara teaches using an infrared laser operated in the range of 0.1 to 1.5 watts (¶107).
In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976).
Additionally, Wyant teaches completing a set of first lower cuts and a set of first upper cuts, where the first set of upper cuts are vertically aligned with the first lower set (See Fig. 5D).
Furthermore, Wyant teaches forming the cuts seen in the cross-section of Fig. 5D in a direction perpendicular to the set of first lower and upper of cuts (¶46), singulating each die (505) such that each die has four sides, with edges corresponding to laser cutting paths (¶46). This results in the cuts forming a grid pattern. These perpendicular lower and upper cuts form a set of second lower cuts and a set of second upper cuts.
As the lower and upper cuts are formed parallel to each other (Fig. 5C, 5D, and 6A; ¶46), and another set of lower and upper cuts can be formed perpendicular such that each die has four sides (¶46), a person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to form – in the wafer as seen in Fig. 3B – a plurality of first cuts corresponding to the first and second lower cuts as discussed above, and a plurality of second cuts corresponding to the first and second upper cuts as discussed above, resulting in the predictable effect of cutting and separating the various dies (305; Fig. 3B) located in or at the wafer. See Ruiz v. A.B. Chance Co., 357 F.3d 1270, 69 USPQ2d 1686 (Fed. Cir. 2004).
The first thickness of the semiconductor wafer and the second thickness of the semiconductor wafer respectively correspond to the cracks propagated by 310, and 324+326.
Kriebel teaches moving a laser along a first set of cut lines 12, and then a second set of cut lines 11 at a depth “a” (Fig. 1-4), and then repeating that process up to two more times (Fig. 3-4) at different depths, where the first cuts (any cracks propagating from the device side 19 to halfway between discontinuities 28 and 29 constitute the first cuts; Fig. 3-4) are formed with a laser through a first thickness of a semiconductor wafer; and
after forming the plurality of first cuts, forming a plurality of second cuts (cracks propagating from halfway between discontinuities 28 and 29 down to their farthest extent; Fig. 3-4) with a laser through a second thickness of the semiconductor wafer that are vertically aligned with the plurality of first cuts (Fig. 3-4).
Tamura teaches alternative embodiments of a laser to form discontinuities using either one or two focal points (Fig. 4-5).
A PHOSITA would find it obvious to change the order of cut formation for the wafer as shown in Fig. 3B, by switching from a split beam operation to a single beam operation, in the manner of Tamura, to form the plurality of second cuts after forming the plurality of first cuts as defined above, as the single beam of Fig. 2A achieves the predictable result of forming layers of discontinuities, and using a single beam or split beam are known alternatives. See Ruiz v. A.B. Chance Co., 357 F.3d 1270, 69 USPQ2d 1686 (Fed. Cir. 2004).
Furthermore, a PHOSITA would find it obvious to form the first cuts and second cuts of modified Wyant in the order taught by Kriebel, such that the second cuts are formed after the first cuts, where the first cuts are the set of lower cuts (Wyant: Fig. 5D markup) and the second cuts are the set of upper cuts (Wyant: Fig. 5D markup), as this cut formation sequence prevents defects in the second cuts from being influenced by defects in the first cuts (Kriebel: ¶16). See also In re Burhans, 154 F.2d 690, 69 USPQ 330 (CCPA 1946) (selection of any order of performing process steps is prima facie obvious in the absence of new or unexpected results).
PNG
media_image3.png
274
624
media_image3.png
Greyscale
Fukuyo teaches that cut height when using lasers can be adjusted according to the size of the discontinuity region (Col. 58 Ln. 42-45), that the size of the discontinuity region can be adjusted (Fig. 59-65; Col. 10 Ln. 30-38), and that the number of depths at which discontinuity regions are formed can be changed according to the wafer’s thickness or intrinsic cutting difficulty (Col. 70 Ln. 33-47).
In view of Fukuyo, a person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to use two depths when forming the discontinuities of modified Wyant, that is only forming regions 310 and 324, rather than 310, 324, and 326, when the semiconductor wafer is thinner to allow for faster production by avoiding an additional depth of discontinuity formation. Thinner wafers also provide increase thermal conductivity (Keite-Telgenbuscher: ¶6).
This results in modified Wyant only forming the regions 310 and 324.
Fukuyo teaches that discontinuities may be formed either from farthest from the laser entry point to closest, or vice-versa (col. 70 ln. 48-67 to col. 71 ln. 1-7).
A PHOSITA would find it obvious to form the regions 310 after forming the regions 324, rather than forming regions 324 after forming regions 310, as this is a known process sequence that predictably forms cuts in a thin semiconductor wafer to allow for singulation without force application (“can be cut along the line 5…or naturally without applying such force”; col. 70 ln. 29-32). See In re Fout, 675 F.2d 297, 213 USPQ 532 (CCPA 1982).
For modified Wyant then, the method now comprises forming a plurality of first cuts (the set of upper cuts formed when forming regions 324; Fig. 3A markup; Wyant: ¶46), wherein the plurality of first cuts extend through a first thickness (from the top of the wafer 302 to the bottom of the crack generated when forming region 324; Fig. 3A markup below); and
forming a plurality of second cuts (the set of lower cuts formed when forming regions 310; Fig. 3A markup; Wyant: ¶46) after forming the plurality of first cuts, wherein the plurality of second cuts are vertically aligned with the plurality of first cuts and extend through a second portion (from the top of the crack generated by 310 to the bottom of the wafer 302; Fig. 3A markup) of the thickness of the semiconductor wafer, and wherein the plurality of second cuts are closer to the tape than the plurality of first cuts (Fig. 3A markup).
Therefore, modified Wyant teaches forming the plurality of second cuts closer to the tape than the plurality of first cuts.
PNG
media_image2.png
396
861
media_image2.png
Greyscale
Wyant teaches selecting thicknesses of cuts (314; Fig. 3B) to prevent crack propagating from the cuts from meandering outside of a plurality of scribe streets (316; Fig. 3B, “the dicing tape 312 is stretched to open the cracks 314 in the scribe streets 316, singulating the semiconductor device dies 305” (¶18); note that the cracks 314 do not deviate outside of the modified portions 310+324+326 in a plan view).
A PHOSITA would find it obvious to select the first and second thicknesses of modified Wyant to prevent crack propagating from the plurality of first cuts and the plurality of second cuts from meandering outside of a plurality of scribe streets, in the manner demonstrated by Wyant, to allow for device singulation through the joining of the first and second cuts from one side of the wafer to the opposing side.
Claims 17-19 are rejected under 35 U.S.C. 103 as being unpatentable over Wyant et al. (US 2020/0051860), Yonehara et al. (US 2014/0038392), Kriebel et al. (US 2016/0093534), Tamura et al. (US 2007/0202619), Fukuyo et al. (US 6,992,026), and Keite-Telgenbuscher et al. (US 2008/0271845) all of record, as applied to claim above 15, and further in view of Sherbin et al. (US 2020/0176314) of record.
(Re Claim 17) Modified Wyant teaches the method of claim 15, wherein the semiconductor wafer comprises a device side (side at 312; Fig. 3B), and a non-device side (side at 305 labelling; Fig. 3B) opposite the device side.
Modified Wyant does not explicitly teach a device side having a plurality of circuits formed thereon.
Sherbin teaches semiconductor die at a device side (105a; Fig. 1) of a semiconductor wafer (105; Fig. 1), wherein the semiconductor die include circuitry (¶22).
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious that the semiconductor die (305; Fig. 3B) of modified Wyant include circuitry as taught by Sherbin, as this allows for the dies 305 to have various memory or logic functionality, and so modified Wyant in view of Sherbin also teaches a semiconductor wafer comprising a device side having a plurality of circuits formed thereon (each circuit of semiconductor dies 305; Fig. 3B).
(Re Claim 18) Modified Wyant teaches the method of claim 17, comprising directing the laser through the non-device side while forming the plurality of first cuts and forming the plurality of second cuts (Fig. 2A and 3B, ¶¶6 and 15), wherein the first side of the semiconductor wafer is the device side (“device side in contact with the dicing tape”; ¶17).
(Re Claim 19) Modified Wyant teaches the method of claim 17, but does not explicitly teach the method comprising directing the laser through the device side while forming the plurality of first cuts and forming the plurality of second cuts, wherein the first side of the semiconductor wafer is the non-device side.
However, in view of Sherbin (Fig. 1) and Applicant’s statement that Species A and B are obvious variants of each other (election received 11/12/2024), a person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to reorient the semiconductor wafer of Fig. 3B such that the dicing tape is on the non-device side and the laser of the laser cutter goes through the device side of the semiconductor wafer.
Additionally, as Fukuyo teaches that a formation sequence for discontinuity regions may be either from a depth farthest from the laser entry side then up, or a depth closest to the laser entry side then down (Col. 70 Ln. 62-67 to Col. 71 Ln. 1-3), a PHOSITA would find it obvious to still form first cuts and second cuts from a depth farthest from the laser entry side then up, as shown in Fig. 2A of Wyant.
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Wyant et al. (US 2020/0051860), Yonehara et al. (US 2014/0038392), Kriebel et al. (US 2016/0093534), Tamura et al. (US 2007/0202619), Fukuyo et al. (US 6,992,026), and Keite-Telgenbuscher et al. (US 2008/0271845) all of record, as applied to claim 15 above, and further in view of Moeller et al. (US 2021/0305095) and Sherbin et al. (US 2020/0176314), both of record.
(Re Claim 20) Modified Wyant teaches the method of claim 15, comprising: separating a semiconductor die from the semiconductor wafer as a result of forming the plurality of first cuts and forming the plurality of second cuts (¶18).
However, Wyant does not explicitly teach coupling a circuit on the semiconductor die to a plurality of conductive terminals, and covering the semiconductor die with a mold compound.
Sherbin teaches semiconductor die at a device side (105a; Fig. 1) of a semiconductor wafer (105; Fig. 1), wherein the semiconductor die include circuitry (¶22).
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious that the semiconductor die (305; Fig. 3B) of modified Wyant include circuitry as taught by Sherbin, as this allows for the dies 305 to have various memory or logic functionality, and so modified Wyant in view of Sherbin also teaches a semiconductor wafer comprising semiconductor dies comprising circuits (each circuit of semiconductor dies 305; Fig. 3B).
Moeller teaches that after the dies are singulated, they are connected to a plurality of conductive terminals (76; Fig. 8, ¶21), and covered with a mold compound (72).
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to couple a circuit on the semiconductor die of modified Wyant in the manner taught by Moeller, in order to achieve the predictable result of accessing the functions of the semiconductor die while protecting the die from moisture and physical damage.
Response to Arguments
Applicant's arguments filed 6/1/2026 have been fully considered but they are not persuasive.
As Wyant in view of additional references teaches forming the first and second cuts such that the cracks generated by the discontinuities do not even deviate outside of the discontinuities when seen in a plan view, the thicknesses were selected to prevent crack propagating from the plurality of first cuts and the plurality of second cuts from meandering outside of the plurality of scribe streets. See the corresponding rejection above.
The remainder of Applicant’s arguments are moot.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Nakano et al. (US 2016/0329246) teaches forming discontinuities at depths (Nakano: depths and wafer thickness ¶¶130-131) close to those described in instant ¶49.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Christopher A Schodde whose telephone number is (571)270-1974. The examiner can normally be reached M-F 1000-1800 EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Manno can be reached on (571)272-2339. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/CHRISTOPHER A. SCHODDE/Examiner, Art Unit 2898
/JESSICA S MANNO/SPE, Art Unit 2898
Prosecution Insights