Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Attorney Docket Number: 9022-108038-01
Filling Date: 2/16/22
Priority Date: 6/30/21
Inventor: Kim et al
Examiner: Bilkis Jahan
DETAILED ACTION
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “a length obtained by subtracting the extension width from the first length is greater than 0 and equal to or less than about 10 nm, and the channel region is configured to extend between one of the source region and the drain region located on an opposite side of the extension region and the extension end of the extension region.” must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 1 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as failing to set forth the subject matter which the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the applicant regards as the invention.
Claim 1 in last four lines recites “a length obtained by subtracting the extension width from the first length is greater than 0 and equal to or less than about 10 nm, and the channel region is configured to extend between one of the source region and the drain region located on an opposite side of the extension region and the extension end of the extension region.” However, it is not understood from the claim language and the drawings that how channel region is between S/D and the extension end of the extension region.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 12-15 and 17-18 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Hokazono et al (US 2014/0054657 A1).
Regarding claim 12, Hokazono discloses a tunnel field effect transistor (Fig. 10) comprising: a source region 5 (Para. 21) and a drain region 6 (Para. 21), positioned on a substrate 1 (Para. 15); a channel region 4 (Para. 15) positioned between the source region 5 and the drain region 6 and having a first length in a first direction (X-direction); a gate electrode 12 (Para. 14) positioned on the channel region 4; and a gate insulating layer 11 (Para. 14) positioned between the channel region 4 and the gate electrode 12, wherein the source region 5 is doped with impurities of a first conductivity type (Para. 21) and the drain region 6 is doped with impurities of a second conductivity type (Para. 21) that is different from the first conductivity type, and
one of the source region 5 and the drain region 6 includes an extension region 7a (Paras. 24, 25, 57) extending toward the other region in the first direction (X-direction) by an extension width, the extension region 7a being positioned under the channel region 4 to form a constant current independent of a gate voltage of the gate electrode 12, wherein the extension width is equal to the first length 7a (Fig. 14); and wherein the extension region 7a has the same type of conductivity (Para. 57) as one of the source region 5 and the drain region.
Regarding claim 13, Hokazono further discloses the tunnel field effect transistor of claim 12, wherein an upper surface of the extension region 7a is apart from an upper surface of the channel region 4 by a certain distance in a second direction (Y-direction) intersecting with the first direction (X-direction).
Regarding claim 14, Hokazono further discloses the tunnel field effect transistor of claim 13, wherein the source region 5 includes a first extension region as the extension region 7a, wherein the first extension region 7a has an extension width in the first direction (X-direction) and the extension width is equal to the first length of the channel region 4.
Regarding claim 15, Hokazono further discloses the tunnel field effect transistor of claim 14, wherein the first extension region 7a has a same type of conductivity as the first conductivity type 5 (Paras. 21, 57).
Regarding claim 17, Hokazono further discloses the tunnel field effect transistor of claim 13, wherein the drain region 6 includes a second extension region 7c as the extension region, wherein the second extension region 7c (Para. 57) has an extension width in the first direction and the extension width is equal to the first length 4 of the channel region.
Regarding claim 18, Hokazono further discloses the tunnel field effect transistor of claim 17, wherein the second extension region 7c has a same type of conductivity as the second conductivity type 6 (Paras. 21, 57).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-7 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Gossner et al (US 2017/0125556 A1).
Regarding claim 1, Gossner discloses a tunnel field effect transistor (Fig. 1) comprising: a source region 10 (Para. 31) and a drain region 20 (Para. 32), positioned on a substrate 100 (Para. 32); a channel region 30 (Para. 33) positioned between the source region 10 and the drain region 20 and having a first length in a first direction (X-direction); a gate electrode 70 (Para. 37) positioned on the channel region 30; and a gate insulating layer 55 (Para. 35) positioned between the channel region 30 and the gate electrode 70, wherein the source region 10 is doped with impurities of a first conductivity type (N-type) and the drain region 20 is doped with impurities of a second conductivity type (P-type) that is different from the first conductivity type, one of the source region 10 and the drain region includes an extension region 50 (Para. 38) extending toward the other region (right).
Gossner does not explicitly disclose the extension region being positioned under the channel region to form a constant current independent of a gate voltage of the gate electrode.
However, Gossner discloses the same structure as claimed (see above). Therefore, it would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to obtain the extension region being positioned under the channel region to form a constant current independent of a gate voltage (inherent) for intended purposes (Para. 47). Also, the claim does not specify the extension region completely and only under the channel as disclosed in the instant application figure 1.
Gossner does not explicitly disclose a length obtained by subtracting the extension width from the first length is greater than 0 and equal to or less than about 10 nm, and the channel region is configured to extend between one of the source region and the drain region located on an opposite side of the extension region and the extension end of the extension region.
However, Gossner discloses a length obtained by subtracting the extension width 50 from the first length 30 is greater than 0 and equal to or less than about 10 nm (it is greater), and the channel region 30 is configured to extend between one of the source region 10 and the drain region located on an opposite side of the extension region 50 and the extension end of the extension region 50. It would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to obtain a length obtained by subtracting the extension width from the first length is greater than 0 and equal to or less than about 10 nm, and the channel region is configured to extend between one of the source region and the drain region located on an opposite side of the extension region and the extension end of the extension region for intended purposes.
the applicants have not established the criticality (see next paragraph below) of the length.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed length or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Regarding claim 2, Gossner discloses the tunnel field effect transistor of claim 1, wherein an upper surface of the extension region 50 is apart from an upper surface of the channel region 30 (top surface) by a certain distance in a second direction (Y-direction) intersecting with the first direction (X-direction).
Regarding claim 3, Gossner discloses the tunnel field effect transistor of claim 2, wherein the source region 10 includes a first extension region 50 (Para. 38) as the extension region, wherein the first extension region 50 has an extension width in the first direction (X-direction) and the extension width is less than or equal to the first length of the channel region 30 (consider the figure 1 is scaled).
Regarding claim 4, Gossner discloses the tunnel field effect transistor of claim 3, wherein the first extension region 50 has a same type of conductivity as the first conductivity type (N-type).
Regarding claim 5, Gossner discloses the tunnel field effect transistor of claim 3, wherein the first extension region 50 has a same type of conductivity as the second conductivity type (obvious to have in the art, see KR20200083151 (A), 2020-07-08, elements SDa, Para. 85, Fig. 7), wherein a doping concentration of the first extension region 50 (Para. 38) is lower than a doping concentration of the drain region 20 (Para. 32).
Regarding claim 6, Gossner discloses the tunnel field effect transistor of claim 2, wherein the drain region 20 includes a second extension region 40 (Para. 39) as the extension region, wherein the second extension region 40 has an extension width in the first direction (X-direction) and the extension width is less than or equal to the first length of the channel region 30 (consider the figure 1 is scaled).
Regarding claim 7, Gossner discloses the tunnel field effect transistor of claim 6, wherein the second extension region 40 has a same type of conductivity as the second conductivity type 20 (P-type).
Regarding claim 8, Gossner discloses the tunnel field effect transistor of claim 6, wherein the second extension region has a same type of conductivity as the first conductivity type (very common in the art, see KR20200083151 (A), 2020-07-08, elements SDa, Para. 85, Fig. 7), wherein a doping concentration of the second extension region 40 (Para. 39) is lower than a doping concentration of the source region 10 (Para. 31).
Claim(s) 16 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Hokazono et al (US 2014/0054657 A1).
Regarding claim 16, Hokazono further discloses the tunnel field effect transistor of claim 14, wherein the first extension region 7c (Para. 57) has a same type of conductivity as the second conductivity type 6 (Para. 21).
Hokazono does not explicitly disclose a doping concentration of the first extension region is lower than a doping concentration of the drain region.
However, Hokazono discloses a particular concentrations for the first extension region 7a and the drain 6. Therefore, it would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to obtain a doping concentration of the first extension region is lower than a doping concentration of the drain region for intended purposes.
the applicants have not established the criticality (see next paragraph below) of the concentration.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed concentration or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Regarding claim 19, Hokazono does not explicitly disclose the tunnel field effect transistor of claim 17, wherein the second extension region has a same type of conductivity as the first conductivity type, wherein a doping concentration of the second extension region is lower than a doping concentration of the source region.
However, Hokazono discloses a particular concentrations and conductivity type for the second extension region 7c and the source 5. Therefore, it would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to obtain the second extension region has a same type of conductivity as the first conductivity type, wherein a doping concentration of the second extension region is lower than a doping concentration of the source region for intended purposes.
the applicants have not established the criticality (see next paragraph below) of the concentration and conductivity.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed concentration and conductivity or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Allowable Subject Matter.
Claims 9-11 are allowed.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-8 and 12-19 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BILKIS JAHAN whose telephone number is (571)270-5022. The examiner can normally be reached Monday-Friday, 8:00 am-5 Pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon T Fletcher can be reached on (571)272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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BILKIS . JAHAN
Primary Examiner
Art Unit 2817
/BILKIS JAHAN/Primary Examiner, Art Unit 2817