DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 8/22/2025 has been entered.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, a cross-section showing “each of the anti-collision recesses has a circular or oval flat cross-section when viewed in a direction perpendicular to the active surface of the semiconductor substrate”, must be shown or the feature(s) canceled from the claim(s). The cross-section provided (Fig. 4B) does not show this feature. No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
In view of Applicant’s amendments, the prior 112(a) rejection is withdrawn.
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 9 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
(Re Claim 9) As claim 1 recites, “each of the convex rounded corners is connected to an adjacent side surface at a point of tangency”, claim 9 now represents new matter for describing a previously undisclosed embodiment. Nowhere is the quoted limitation above discussed in conjunction with an embodiment wherein “each of the anti-collision recesses has a circular or oval flat cross-section when viewed in a direction perpendicular to the active surface of the semiconductor substrate”.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 9 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
(Re Claim 9) It is unclear how to interpret a “each of the anti-collision recesses has a circular or oval flat cross-section when viewed in a direction perpendicular to the active surface of the semiconductor substrate” as no cross-section is provided showing this particular feature. Fig. 4A does not represent a cross-sectional view of the anti-collision recesses, and Fig. 4B, though showing a cross-section, does not show a circular or oval flat cross-section.
Furthermore, it is unclear what shape is meant by “oval flat”, as a cross-section was not provided as discussed above, and a discussion around “oval flat” is not in the specification. This could be interpreted to require that the cross-section is some degree of flat with respect to an oval shape, or is both oval in shape and flat in the cross-section.
With the above in mind, “each of the anti-collision recesses has a circular or oval flat cross-section when viewed in a direction perpendicular to the active surface of the semiconductor substrate” was read as “each of the anti-collision recesses has a circular or flat, oval shape when viewed in a plan view perpendicular to the active surface of the semiconductor substrate”.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-2, 5-8 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang et al. (US 2018/0174983), Farooq et al. (US 2008/0150087), Taguchi et al. (US 2009/0098712), and Won et al. (US 2021/0050264), all of record, and Hyakumura (US 2020/0114473), Mackh et al. (US 2018/0286735), and Too et al. (US 2011/0227201), all newly cited.
(Re Claim 1) Zhang teaches a method of manufacturing a semiconductor chip, the method comprising: preparing a semiconductor substrate (100; Fig. 3) having an active surface (102; Fig. 10) on which a device layer (134; Fig. 10) is provided and an inactive surface (104) opposite to the active surface, the device layer having a plurality of integrated circuit (IC) areas (area of each 106 that excludes area 112; Fig. 14) and a cut area (112; Fig. 14) provided between adjacent IC areas of the plurality of IC areas (Fig. 14); forming anti-collision recesses (110; Fig. 14) in regions of the cut area that are adjacent to corners of the plurality of IC areas, each of the anti-collision recesses having rounded internal sidewalls (Fig. 14), each of the rounded internal sidewalls corresponding to a respective corner of the adjacent corners of the plurality of IC areas (Fig. 14); forming a modified portion (130; ¶32) in the semiconductor substrate by irradiating a laser along a cut line of the cut area (Fig. 8, ¶32); polishing (Fig. 9, ¶35) the inactive surface of the semiconductor substrate; and separating the plurality of IC areas from each other along cracks (154; Fig. 9) that propagate from the modified portion in a vertical direction of the semiconductor substrate, to form a plurality of semiconductor chips (¶38).
Zhang does not been shown to explicitly teach a method of manufacturing a semiconductor chip comprising:
each of the anti-collision recesses having convex rounded internal sidewalls;
forming a modified portion in the semiconductor substrate, the modified being positioned closer to the active surface than the inactive surface of the semiconductor substrate; and
each of the plurality of IC areas has convex rounded corners and side surfaces between the convex rounded corners, and each of the convex rounded corners is connected to an adjacent side surface at a point of tangency, wherein the thickness of the semiconductor chip, after the polishing, is greater than or equal to 50 micrometers and less than or equal to 150 micrometers, and the depth of the anti-collision recesses are greater than or equal to 15 micrometers and less than or equal to 40 micrometers.
Farooq teaches anti-collision recesses having a circular configuration (Fig. 2a) and a diamond configuration (Fig. 3a).
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to anti-collision recesses having a diamond configuration, as taught by Farooq, instead of the circular configuration taught by Zhang, as both arrangements reduce the initiation and propagation of cracks in the IC areas (Farooq: ¶24).
Taguchi teaches anti-collision recesses having a diamond configuration (Fig. 6A) and an inwardly curved, convex structure configuration (Fig. 3A).
A PHOSITA would find it obvious to use the inwardly curved, convex structure configuration of Taguchi for anti-collision recesses of Zhang, as both the diamond and inwardly curved, convex structure configurations prevent chipping at the corners of the IC areas of modified Zhang (Taguchi: ¶¶48, 63). See also In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Doing so results in each of the anti-collision recesses having convex rounded internal sidewalls (Taguchi: Fig. 3A and 6A); each of the plurality of IC areas has convex rounded corners and side surfaces between the convex rounded corners (Taguchi: Fig. 3A and 6A), and each of the convex rounded corners is connected to an adjacent side surface at a point of tangency (Taguchi: the dividing line A and the circular arc forming the convex rounded internal sidewalls are tangential; ¶37).
Won teaches forming a modified portion (150P; Fig. 5B) in a semiconductor substrate (100; Fig. 5B) positioned closer to an active surface (100F; Fig. 5B) than an inactive surface (100B; Fig. 5B) of the semiconductor substrate (¶¶83, 88).
A PHOSITA would find it obvious to form the modified portion of modified Zhang closer to the active surface than the inactive surface, as taught by Won, as the laser can be set at multiple depths (Zhang: ¶33), and forming the modified portion in this way predictably results in forming cracks for stealth dicing after polishing (Zhang: Fig. 8 and 9, ¶35; Won: Fig. 7B and 8). See Ruiz v. A.B. Chance Co., 357 F.3d 1270, 69 USPQ2d 1686 (Fed. Cir. 2004).
Zhang teaches that “[w]hile full depth recess portions 110a may be preferable, it is conceivable that the depth of the corner recesses 110 formed in the wafer 100 may be less than the final thickness of the wafer 100. Such an embodiment is shown in Fig. 11” (¶37), and that “FIGS. 10 and 11 show alternative embodiments of a semiconductor die 106 within wafer 100 thinned to its final thickness after the backgrind step 214” (¶36).
As Zhang teaches that the anti-collision recesses 110 of modified Zhang may be alternatively formed at either full or less-than-full depth compared to the final thickness of the substrate, a PHOSITA would find it obvious to form the anti-collision recesses 110 of modified Zhang, formed in view of Farooq and Taguchi as previously discussed, with a depth that is less than the final thickness of the semiconductor chip after the polishing (Fig. 11, ¶¶36-37). See Ruiz v. A.B. Chance Co., 357 F.3d 1270, 69 USPQ2d 1686 (Fed. Cir. 2004).
Zhang teaches that the final thickness of the substrate may be a thickness greater than 36 µm (¶35) after polishing, and that that depth of the anti-collision recess may be less than 50 µm (¶27), and that the depth of recess 110 may be less than the final thickness of the substrate after polishing (¶27).
Hyakumura teaches polishing a substrate down to a final thickness of 30 µm - 50 µm (Fig. 7, ¶74), where modified portions (P1 and P2; Fig. 7) are formed at least that far away from the unpolished surface of the substrate (Fig. 7).
A PHOSITA would find it obvious to form the modified portions outside of the final thickness of the semiconductor chip of modified Zhang, as taught by Hyakumura, in order to increase the stability of the polished surface by removing the modified portions during polishing (Mackh: Fig. 7A-7B, ¶46). Also, utilizing the final thickness of 50 µm taught by Hyakumura for the final thickness of the semiconductor chip after polishing, in conjunction with forming the modified portions outside of the final thickness, prevents premature separation of the semiconductor chips during handling (Fig. 7, ¶91).
Also, In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976).
Too teaches that the stress experienced by a rounded corner of a semiconductor chip is related to the thickness of the rounded portion (“If it is anticipated that a given corner will exhibit greater stress concentration, then greater rounding or thickness of the rounded portion can be used there”; ¶30; see also ¶28).
As Zhang states that the depth of the recess may be less than 50 µm and that the depth of recess 110 may be less than the final thickness of the substrate after polishing, and Too teaches that the depth of a recess (Too: Fig. 3 and 7, ¶¶28, 30) is a known result-effective variable for the stress experienced by a semiconductor die, the claimed depth range for the anti-collision recess would have been obvious to optimize and ascertainable through routine experimentation. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). See also ClearValue Inc. v. Pearl River Polymers Inc., 668 F.3d 1340, 101 USPQ2d 1773 (Fed. Cir. 2012).
(Re Claim 2) Modified Zhang teaches the method of claim 1, wherein each of the plurality of IC areas has a quadrangular shape (Fig. 2 and 14), wherein the plurality of IC areas are arranged in a plurality of rows and a plurality of columns (Fig. 2) with the cut area therebetween (Fig. 14, ¶¶23, 26), and wherein each of the regions adjacent to the corners is adjacent to respective corners of four IC areas positioned in two adjacent rows and two adjacent columns (Fig. 14).
(Re Claim 5) Modified Zhang teaches the method of claim 1, wherein each of the anti-collision recesses has a depth that is greater than a thickness of the device layer (Fig. 10 and 11; ¶27).
(Re Claim 6) Modified Zhang teaches the method of claim 5, wherein the depth of each of the anti-collision recesses is at least 110% of the thickness of the device layer (the device layer may be equal to or smaller than 25 µm, and modified Zhang teaches that the anti-collision recesses may be at least between 40 µm and 27.5 µm deep; Zhang: Fig. 11, ¶27).
(Re Claim 7) Modified Zhang teaches the method of claim 1, but does not explicitly teach the method wherein the polishing comprises: bonding a protective sheet to the active surface of the semiconductor substrate; and disposing the active surface to which the protective sheet is bonded, on a support for a polishing device.
Won teaches bonding a protective sheet (200; Fig. 3) to an active surface (100F, ¶40) of a semiconductor substrate (100; ¶40); and disposing the active surface to which the protective sheet is bonded, on a support for a polishing device (410; Fig. 8, ¶94).
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to bond a protective sheet to the active surface of the semiconductor substrate of Zhang, as taught by Won, in order to protect the active surface during the dicing process (Won: ¶75).
Additionally, a PHOSITA would find it obvious to dispose the active surface of modified Zhang, to which the protective sheet is bonded, on a support for a polishing device in the manner of Won, to provide the predictable effect of support for the semiconductor substrate (Won: ¶94). See also Ruiz v. A.B. Chance Co., 357 F.3d 1270, 69 USPQ2d 1686 (Fed. Cir. 2004).
(Re Claim 8) Modified Zhang teaches the method of claim 1, wherein each of the rounded internal sidewalls of the anti-collision recesses have an inwardly curved structure (Taguchi: Fig. 1B and 3A).
Claims 3-4 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang et al. (US 2018/0174983), Farooq et al. (US 2008/0150087), Taguchi et al. (US 2009/0098712), and Won et al. (US 2021/0050264), all of record, and Hyakumura (US 2020/0114473), Mackh et al. (US 2018/0286735), and Too et al. (US 2011/0227201), all newly cited, as applied to claim 2 above, and further in view of Nakamura (US 2015/0357242) of record.
(Re Claim 3) Zhang teaches the method of claim 2, but does not explicitly teach the method wherein each of the anti-collision recesses has a width ranging from about 30% to about 70% of an interval between IC areas of the four IC areas that are arranged in a diagonal direction.
Taguchi teaches that a width, taken along a diagonal between two vertexes of the rounded die shapes (Taguchi: vertexes are on the dividing line A; additionally, the rounded sidewalls follow circular arcs that are tangent to the dividing line A; Fig. 1B and 3A; ¶¶22, 37, 47), has a maximum width wider than twice the width of a dicing blade.
Nakamura teaches a dicing blade having a width of 20 µm (¶4).
Using a vertex distance of 49.5 µm, for the diagonal distance between vertexes of the anti-collision recesses as defined in Taguchi, and knowing that the sidewalls follow circular arcs that are tangent to the dividing line A of Taguchi, the radius of the circular arcs is about 35 µm. Therefore, the width in the column direction is about 70 µm, as the width is twice the radius of the circular arcs. A width in a diagonal direction between two IC areas is about 99 µm using a width of the lanes 112 of 70 µm (Zhang: ¶24), and so the width of each anti-collision recess is about 70% of an interval between IC areas of the four IC areas that are arranged in a diagonal direction.
(Re Claim 4) Modified Zhang teaches the method of claim 2, but does not explicitly teach the method wherein a shortest interval between each of the corners of the plurality of IC areas and a corresponding rounded internal sidewall is 5 µm or greater.
Taguchi teaches that a width, taken along a diagonal between two vertexes of the rounded die shapes (Taguchi: vertexes are on the dividing line A; additionally, the rounded sidewalls follow circular arcs that are tangent to the dividing line A; Fig. 1B and 3A; ¶¶22, 37, 47), has a maximum width wider than twice the width of a dicing blade.
Nakamura teaches a dicing blade having a width of 20 µm (¶4).
Using a vertex distance of 41 µm, for the diagonal distance between vertexes of the anti-collision recesses as defined in Taguchi, and knowing that the sidewalls follow circular arcs that are tangent to the dividing line A of Taguchi, the radius of the circular arcs is about 29 µm, which then results in a shortest interval between each of the corners of the plurality of IC areas and a corresponding rounded internal sidewall being about 37.5 µm – greater than 5 µm –
when the dicing lanes have a width of 70 µm (Zhang: ¶24).
Claims 10-11, 13, and 21-23 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang et al. (US 2018/0174983), Farooq et al. (US 2008/0150087), Taguchi et al. (US 2009/0098712), and Won et al. (US 2021/0050264), all of record, and Hyakumura (US 2020/0114473), Mackh et al. (US 2018/0286735), and Too et al. (US 2011/0227201), all newly cited.
(Re Claim 10) Zhang teaches a method of manufacturing a semiconductor chip, the method comprising: preparing a semiconductor substrate (100; Fig. 3) having an active surface (102; Fig. 10) on which a device layer (134; Fig. 10) is provided and an inactive surface (104) positioned opposite to the active surface, the device layer having a plurality of integrated circuit (IC) areas (area of 106 excluding area 112; Fig. 14) arranged in a plurality of rows and a plurality of columns (Fig. 2) and a cut area (112) provided between adjacent IC areas of the plurality of IC areas, each of the plurality of IC areas having a quadrangular shape (Fig. 2 and 14); forming anti-collision recesses (110; Fig. 14) in regions of the cut area that are adjacent to four corners of the plurality of IC areas (Fig. 14); forming a modified portion (130; ¶32) in the semiconductor substrate by irradiating a cut line of the cut area with a laser (Fig. 8, ¶32); polishing the inactive surface of the semiconductor substrate (Fig. 9, ¶35); separating the plurality of IC areas from each other along cracks (154; Fig. 9) that propagate from the modified portion in a vertical direction of the semiconductor substrate, to form a plurality of semiconductor chips (¶38).
Zhang does not explicitly teach the method wherein each of the anti-collision recesses having inwardly curved and convex rounded internal sidewalls, each of the internal sidewalls corresponding to a respective corner of the four corners;
forming the modified portion being positioned closer to the active surface than the inactive surface of the semiconductor substrate;
polishing the inactive surface of the semiconductor substrate in a state in which the active surface is disposed on a support; and
separating the plurality of IC areas wherein each of the plurality of IC areas has convex rounded corners and side surfaces between the convex rounded corners, and each of the convex rounded corners is connected to an adjacent side surface without an angular edge.
Farooq teaches anti-collision recesses having a circular configuration (Fig. 2a) and a diamond configuration (Fig. 3a).
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to anti-collision recesses having a diamond configuration, as taught by Farooq, instead of the circular configuration taught by Zhang, as both arrangements reduce the initiation and propagation of cracks in the IC areas (Farooq: ¶24).
Taguchi teaches anti-collision recesses having a diamond configuration (Fig. 6A) and a configuration having inwardly curved and convex rounded internal sidewalls (Fig. 3A).
A PHOSITA would find it obvious to use the inwardly curved and convex rounded anti-collision recess configuration of Taguchi for anti-collision recesses of Zhang, as both the diamond and the inwardly curved and rounded internal sidewall configuration prevents chipping at the corners of the IC areas of modified Zhang (Taguchi: ¶¶48, 63). See also In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Doing so results in each of the anti-collision recesses having convex rounded internal sidewalls (Taguchi: Fig. 3A and 6A); each of the plurality of IC areas has convex rounded corners and side surfaces between the convex rounded corners (Taguchi: Fig. 3A and 6A), and each of the convex rounded corners is connected to an adjacent side surface without an angular edge (Taguchi: the dividing line A and the circular arc forming the convex rounded internal sidewalls are tangential; ¶37).
Won teaches polishing an inactive surface (100B; Fig. 8) of a semiconductor substrate (100; ¶94) in a state in which an active surface is disposed in a support (410).
A PHOSITA would find it obvious to dispose the semiconductor substrate on a support for a polishing device in the manner of Won, to provide the predictable effect of support for the semiconductor substrate (Won: ¶94). See also Ruiz v. A.B. Chance Co., 357 F.3d 1270, 69 USPQ2d 1686 (Fed. Cir. 2004).
Won additionally teaches forming a modified portion (150P; Fig. 5B) in a semiconductor substrate (100; Fig. 5B) positioned closer to an active surface (100F; Fig. 5B) than an inactive surface (100B; Fig. 5B) of the semiconductor substrate (¶¶83, 88).
A PHOSITA would find it obvious to form the modified portion of modified Zhang closer to the active surface than the inactive surface, as taught by Won, as the laser can be set at multiple depths (Zhang: ¶33), and forming the modified portion in this way predictably results in forming cracks for stealth dicing after polishing (Zhang: Fig. 8 and 9, ¶35; Won: Fig. 7B and 8). See Ruiz v. A.B. Chance Co., 357 F.3d 1270, 69 USPQ2d 1686 (Fed. Cir. 2004).
Zhang teaches that “[w]hile full depth recess portions 110a may be preferable, it is conceivable that the depth of the corner recesses 110 formed in the wafer 100 may be less than the final thickness of the wafer 100. Such an embodiment is shown in Fig. 11” (¶37), and that “FIGS. 10 and 11 show alternative embodiments of a semiconductor die 106 within wafer 100 thinned to its final thickness after the backgrind step 214” (¶36).
As Zhang teaches that the anti-collision recesses 110 of modified Zhang may be alternatively formed at either full or less-than-full depth compared to the final thickness of the substrate, a PHOSITA would find it obvious to form the anti-collision recesses 110 of modified Zhang, formed in view of Farooq and Taguchi as previously discussed, with a depth that is less than the final thickness of the semiconductor chip after the polishing (Fig. 11, ¶¶36-37). See Ruiz v. A.B. Chance Co., 357 F.3d 1270, 69 USPQ2d 1686 (Fed. Cir. 2004).
Zhang teaches that the final thickness of the substrate may be a thickness greater than 36 µm (¶35) after polishing, and that that depth of the anti-collision recess may be less than 50 µm (¶27), and that the depth of recess 110 may be less than the final thickness of the substrate after polishing (¶27).
Hyakumura teaches polishing a substrate down to a final thickness of 30 µm - 50 µm (Fig. 7, ¶74), where modified portions (P1 and P2; Fig. 7) are formed at least that far away from the unpolished surface of the substrate (Fig. 7).
A PHOSITA would find it obvious to form the modified portions outside of the final thickness of the semiconductor chip of modified Zhang, as taught by Hyakumura, in order to increase the stability of the polished surface by removing the modified portions during polishing (Mackh: Fig. 7A-7B, ¶46). Also, utilizing the final thickness of 50 µm taught by Hyakumura for the final thickness of the semiconductor chip after polishing, in conjunction with forming the modified portions outside of the final thickness, prevents premature separation of the semiconductor chips during handling (Fig. 7, ¶91).
Also, In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976).
Too teaches that the stress experienced by a rounded corner of a semiconductor chip is related to the thickness of the rounded portion (“If it is anticipated that a given corner will exhibit greater stress concentration, then greater rounding or thickness of the rounded portion can be used there”; ¶30; see also ¶28).
As Zhang states that the depth of the recess may be less than 50 µm and that the depth of recess 110 may be less than the final thickness of the substrate after polishing, and Too teaches that the depth of a recess (Too: Fig. 3 and 7, ¶¶28, 30) is a known result-effective variable for the stress experienced by a semiconductor die, the claimed depth range for the anti-collision recess would have been obvious to optimize and ascertainable through routine experimentation. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). See also ClearValue Inc. v. Pearl River Polymers Inc., 668 F.3d 1340, 101 USPQ2d 1773 (Fed. Cir. 2012).
(Re Claim 11) Modified Zhang teaches the method of claim 10, wherein each of the anti-collision recesses has a depth greater than a thickness of the device layer (Fig. 11) and extends into the semiconductor substrate (Fig. 11).
(Re Claim 13) Modified Zhang teaches the method of claim 10, wherein each of the plurality of semiconductor chips has four corners (Fig. 11), and wherein an upper region of each of the four corners of each of the plurality of semiconductor chips has a rounded portion (Taguchi: Fig. 1B).
(Re Claim 21) Modified Zhang teaches the method of claim 10, but has not been shown to explicitly teach the method wherein the polishing comprises: bonding a protective sheet to the active surface of the semiconductor substrate using an acrylic adhesive, and disposing the active surface to which the protective sheet is bonded, on a support for a polishing device.
Won teaches bonding a protective sheet (200; Fig. 3) to an active surface (100F, ¶40) of a semiconductor substrate (100; ¶40) using an acrylic adhesive (¶76); and disposing the active surface to which the protective sheet is bonded, on a support for a polishing device (410; Fig. 8, ¶94).
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to bond a protective sheet to the active surface of the semiconductor substrate of Zhang using an acrylic adhesive, as taught by Won, in order to protect the active surface during the dicing process (Won: ¶75).
Additionally, a PHOSITA would find it obvious to dispose the active surface of modified Zhang, to which the protective sheet is bonded, on a support for a polishing device in the manner of Won, to provide the predictable effect of support for the semiconductor substrate (Won: ¶94). See also Ruiz v. A.B. Chance Co., 357 F.3d 1270, 69 USPQ2d 1686 (Fed. Cir. 2004).
(Re Claim 22) Modified Zhang teaches the method of claim 21, wherein the acrylic adhesive has a thickness greater than or equal to 2 micrometers and less than or equal to 10 micrometers (Won: ¶76).
(Re Claim 23) Modified Zhang teaches the method of claim 21, wherein the protective sheet has a thickness greater than or equal to 60 micrometers and less than or equal to 200 micrometers (Won: ¶76).
Claim 12, 14-15, and 25 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang et al. (US 2018/0174983), Farooq et al. (US 2008/0150087), Taguchi et al. (US 2009/0098712), and Won et al. (US 2021/0050264), all of record, and Hyakumura (US 2020/0114473), Mackh et al. (US 2018/0286735), and Too et al. (US 2011/0227201), all newly cited, as applied to claim 10 above, and further in view of Nakamura (US 2015/0357242), of record.
(Re Claim 12) Modified Zhang teaches the method of claim 10, but does not explicitly teach the method wherein a width of each of the anti-collision recesses in a row or column direction is greater than a width thereof in a diagonal direction of the four corners by at least 30%.
Taguchi teaches that a width, taken along a diagonal between two vertexes of the rounded die shapes (Taguchi: vertexes are on the dividing line A; additionally, the rounded sidewalls follow circular arcs that are tangent to the dividing line A; Fig. 1B and 3A; ¶¶22, 37, 47), has a maximum width wider than twice the width of a dicing blade.
Nakamura teaches a dicing blade having a width of 20 µm (¶4).
Using a vertex distance of 49.5 µm, for the diagonal distance between vertexes of the anti-collision recesses as defined in Taguchi, and knowing that the sidewalls follow circular arcs that are tangent to the dividing line A of Taguchi, the radius of the circular arcs is about 35 µm. Therefore, the width in the column direction is about 70 µm, as the width is twice the radius of the circular arcs. A width in a diagonal direction between two corners is about 29 µm using a width of the lanes 112 of 70 µm (Zhang: ¶24), and so the width of each anti-collision recess is about 241% of a width in a diagonal direction of the four corners by at least 30%.
(Re Claim 14) Modified Zhang teaches the method of claim 12, wherein each of the plurality of semiconductor chips has an IC area (part of 106 not including area 112; Fig. 10 and 14) and a peripheral protective area (portion of area 112 retained around each IC area; compare recess location in Fig. 10 and 14) surrounding the IC area, and wherein the peripheral protective area is a residual area of the cut area (retained area 112 was present before laser irradiation, polishing, and separation; Fig. 8 and 14).
(Re Claim 15) Modified Zhang teaches the method of claim 14, wherein a shortest interval from each of the four corners of the plurality of IC areas to a corresponding internal sidewall is equal to or smaller than a thickness of the peripheral protective area positioned at each of the four corners of the plurality of IC areas (using the vertex distance of 49.5 µm, and a cut area 112 width of 70 µm, a distance between a corner of an IC area and a corresponding adjacent internal sidewalls is 34.9993 µm, which is smaller than the 35 µm thickness of the peripheral protective area positioned at each of the four corners; Zhang: ¶24)
(Re Claim 25) Modified Zhang teaches the method of claim 14, wherein the polishing completely removes the modified portion (Hyakumura: Fig. 7; Mackh: ¶46).
Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Zhang et al. (US 2018/0174983), Farooq et al. (US 2008/0150087), Taguchi et al. (US 2009/0098712), and Won et al. (US 2021/0050264), all of record, and Hyakumura (US 2020/0114473), Mackh et al. (US 2018/0286735), and Too et al. (US 2011/0227201), all newly cited, as applied to claim 21 above, and further in view of Kobayashi (US 2014/0038389) and Kitahara (US 2013/0087949), both newly cited.
(Re Claim 24) Modified Zhang teaches the method of claim 21, but has not been shown to explicitly teach the method wherein the protective sheet is a die attach film.
Won teaches that the protective sheet may include a polymer sheet based on PVC (¶76).
Kobayashi teaches that a protective sheet (30, which is comprised of 31+32; Fig. 1, ¶¶64, 72) used during polishing (Fig. 1 polishing step) may include either PVC or polyimide (¶64).
As both PVC and polyimide is known to be used in conjunction with an acrylic adhesive (Kobayashi: ¶¶64, 72) to form a protective sheet during polishing, a person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to use polyimide instead of PVC to form the protective sheet of modified Zhang. The selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945). "Reading a list and selecting a known compound to meet known requirements is no more ingenious than selecting the last piece to put in the last opening in a jig-saw puzzle." 325 U.S. at 335, 65 USPQ at 301.). See also In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960).
Kitahara teaches that die attach films are formed from a polyimide sheet and an acrylic adhesive (¶30). Therefore, a PHOSITA would recognize the protective sheet, which is formed from polyimide and acrylic adhesive, of modified Zhang as a die attach film.
Response to Arguments
Applicant's arguments filed 8/22/2025 have been fully considered but they are not persuasive.
Though Zhang’s description of the drawings in ¶12 states: “FIGS. 10 and 11 illustrate alternative embodiments of a semiconductor die within a wafer after the stealth dicing before grinding and backgrind processes”, this is outweighed by the extensive commentary located in the detailed description of the specification (remarks, p. 8).
Zhang states: “FIGS. 10 and 11 show alternative embodiments of a semiconductor die 106 within wafer 100 thinned to its final thickness after the backgrind step 214. In FIG. 10, the depth of the corner recesses 110 formed in wafer 100 is greater than the final thickness of the wafer 100. As such, after thinning, the recess portions 110a are full depth (i.e., notches in the corners of the semiconductor die 106). As noted above, where individual semiconductor die 106 are fully separated from each other before completion of the backgrind step 214, the perturbations of the backgrind step may cause corners of adjacent semiconductor die to move relative to each other. This movement has caused crashing, cracking and/or chipping at the corners of conventional semiconductor die as explained in the Background section. However, formation of the corner recesses 110 and recess portions 110a in the semiconductor die prevents die from crashing into or contacting each other at the corners upon such relative movement. Thus, the corner recesses 110 and recess portions 110a are effective in preventing chipping and/or cracking at the corners of semiconductor die, thus improving semiconductor die yields.
While full depth recess portions 110a may be preferable, it is conceivable that the depth of the corner recesses 110 formed in the wafer 100 may be less than the final thickness of the wafer 100. Such an embodiment is shown in FIG. 11. In this embodiment, the recess portions 110a are formed in respective semiconductor die 106 at the first major surface 102 including the layer of integrated circuits 134. After thinning, no recess portions 110a exist at the second major surface 104. Thus, crashing of the corners of respective semiconductor die 106 may occur at the second major surface 104. However, as the recess portions 110a exist at the first major surface 102 including the layer of integrated circuits 134, the integrated circuits are protected.” (emphasis added; ¶¶36-37).
The remainder of Applicant’s arguments are moot in view of the new rejection.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Daubenspeck et al. (US 2015/0001683) teaches removing a partial thickness of a substrate that is about 30 µm to about 80 µm in depth (¶¶45-46) before polishing.
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/CHRISTOPHER A. SCHODDE/Examiner, Art Unit 2898
/ERIK T. K. PETERSON/Primary Examiner, Art Unit 2898