DETAILED ACTION
This communication is in response to the amendment filed 9/15/25 in which claims 1-3, 7-9, 15, 16, and 21 were amended, and claims 22-28 were canceled. Claims 1-21 are currently pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claims 1, 8, and 15 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or non-obviousness.
Claims 1-4, 6-10, 13-17, and 19-21 are rejected under 35 U.S.C. 103 as being unpatentable over Yoon (US 2020/0117999 A1; published Apr. 16, 2020) in view of Busato et al., Exploiting NVIDIA Ampere Structured Sparsity with cuSPARSELt (Dec. 8, 2020) (available at https://developer.nvidia.com/blog/exploiting-ampere-structured-sparsity-with-cusparselt/).
Regarding claim 1, Yoon discloses [a] processor comprising: (see ¶ 26)
one or more circuits to cause one or more dimensions of one or more tensors to be modified based, at least in part, on . . . one or more processing resources (¶ 39 (“The improvement module 131 can generate the updated machine learning model 132 for an input machine learning model 112 by modifying the operations of the model, modifying the control dependencies of the model, and/or modifying the data dependencies of model to improve the locality for the memory hierarchy.”), ¶ 41 (“Modifying the operations can also include adding an operation to split a tensor into multiple sub-tensors and including multiple iterations of one or more operations. For example, if the size of a tensor that will be input to an operation (or a sequence of operations) is too large to fit in faster memory, the improvement module 131 can add an operation that splits the tensor into multiple sub-tensors that each can fit into the faster memory.”)).
Yoon does not expressly disclose changing the dimensions of a tensor based on a difference between the one or more dimensions of the one or more tensors and a structured sparsity of one or more processing resources (but see Busato pgs. 2-3 (“Figure 2 shows how NVIDIA Sparse Tensor Cores operate on only half of one input to double the math efficiency. On the left is a weight matrix pruned to meet the expected 2:4 sparse pattern. As you can see, in each group of four weights (outlined in orange), only two weights are nonzero(shades of green). This matrix is compressed to be half the size of the original matrix with a from the second input matrix, letting the NVIDIA Sparse Tensor Core skip computing multiplications by zero to achieve twice the throughput of a regular Tensor Core.”) (figure 2 is reproduced below)).
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It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Yoon to incorporate the teachings of Busato to exploit the structured sparsity of a GPU by compressing the size of the original matrix at least because doing so would enable processing a neural network efficiently while reducing model complexity and maintaining accuracy. See Busato page 2.
Regarding claim 2, Yoon, in view of Busato, discloses the invention of claim 1 as discussed above. Yoon further discloses wherein the one or more circuits are further to cause the one or more tensors to be compatible with the one or more processing resources and based, at least in part, on the modified one or more tensors (¶ 41 (“Modifying the operations can also include adding an operation to split a tensor into multiple sub-tensors and including multiple iterations of one or more operations. For example, if the size of a tensor that will be input to an operation (or a sequence of operations) is too large to fit in faster memory, the improvement module 131 can add an operation that splits the tensor into multiple sub-tensors that each can fit into the faster memory.”)).
Regarding claim 3, Yoon, in view of Busato, discloses the invention of claim 1 as discussed above. Yoon further discloses wherein:
the one or more tensors include one or more input tensors and one or more weight tensors; and (¶ 31 (“For example, the machine learning data can include inputs to operations (e.g., input tensors), outputs from operations (e.g., output tensors), weights used by the operations, and/or other appropriate data used by a machine learning processor 140 when performing machine learning computations using a machine learning model.”))
the one or more circuits are further to cause the one or more tensors to be modified to be compatible with the one or more processing resources (¶ 41 (“Modifying the operations can also include adding an operation to split a tensor into multiple sub-tensors and including multiple iterations of one or more operations. For example, if the size of a tensor that will be input to an operation (or a sequence of operations) is too large to fit in faster memory, the improvement module 131 can add an operation that splits the tensor into multiple sub-tensors that each can fit into the faster memory.”)).
Regarding claim 4, Yoon, in view of Busato, discloses the invention of claim 1 as discussed above. Yoon further discloses wherein:
modification of the one or more tensors is to add a number of elements to the one or more tensors (¶ 41 (“The improvement module 131 can also include a concat operation that merges the sub-tensors output by each iteration into an output tensor that represents the output of the original one or more operations on the original input tensor.”)).
Regarding claim 6, Yoon, in view of Busato, discloses the invention of claim 1 as discussed above. Yoon further discloses wherein:
the one or more tensors include two tensors; and the one or more circuits are further to cause the two tensors to be fused to be compatible with one or more sparse weight tensors (¶ 41 (“The improvement module 131 can also include a concat operation that merges the sub-tensors output by each iteration into an output tensor that represents the output of the original one or more operations on the original input tensor.”)).
Regarding claim 7, Yoon, in view of Busato, discloses the invention of claim 1 as discussed above. Yoon further discloses wherein:
the one or more tensors include one or more input tensors; and the modification of the one or more dimensions includes coalescing the one or more input tensors to be compatible with a sparse weight tensor (¶ 41 (“The improvement module 131 can also include a concat operation that merges the sub-tensors output by each iteration into an output tensor that represents the output of the original one or more operations on the original input tensor.”)).
Regarding claim 8, Yoon discloses [a] system, comprising:
one or more processors to cause modification of one or more dimensions of one or more tensors based, at least in part, on … one or more processing resources (¶ 39 (“The improvement module 131 can generate the updated machine learning model 132 for an input machine learning model 112 by modifying the operations of the model, modifying the control dependencies of the model, and/or modifying the data dependencies of model to improve the locality for the memory hierarchy.”), ¶ 41 (“Modifying the operations can also include adding an operation to split a tensor into multiple sub-tensors and including multiple iterations of one or more operations. For example, if the size of a tensor that will be input to an operation (or a sequence of operations) is too large to fit in faster memory, the improvement module 131 can add an operation that splits the tensor into multiple sub-tensors that each can fit into the faster memory.”)).
Yoon does not expressly disclose changing the dimensions of a tensor based on a difference between the one or more dimensions of the one or more tensors and a structured sparsity of one or more processing resources (but see Busato pgs. 2-3 (“Figure 2 shows how NVIDIA Sparse Tensor Cores operate on only half of one input to double the math efficiency. On the left is a weight matrix pruned to meet the expected 2:4 sparse pattern. As you can see, in each group of four weights (outlined in orange), only two weights are nonzero(shades of green). This matrix is compressed to be half the size of the original matrix with a from the second input matrix, letting the NVIDIA Sparse Tensor Core skip computing multiplications by zero to achieve twice the throughput of a regular Tensor Core.”) (figure 2 is reproduced below)).
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It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Yoon to incorporate the teachings of Busato to exploit the structured sparsity of a GPU by compressing the size of the original matrix at least because doing so would enable processing a neural network efficiently while reducing model complexity and maintaining accuracy. See Busato page 2.
Regarding claim 9, Yoon, in view of Busato, discloses the invention of claim 8 as discussed above. Yoon further discloses wherein:
the one or more tensors include one or more weight tensors and one or more input tensors; (¶ 31 (“For example, the machine learning data can include inputs to operations (e.g., input tensors), outputs from operations (e.g., output tensors), weights used by the operations, and/or other appropriate data used by a machine learning processor 140 when performing machine learning computations using a machine learning model.”))
one or more dimensions of the one or more weight tensors and one or more dimensions of the one or more input tensors are modified; and (¶ 41 (“Modifying the operations can also include adding an operation to split a tensor into multiple sub-tensors and including multiple iterations of one or more operations. For example, if the size of a tensor that will be input to an operation (or a sequence of operations) is too large to fit in faster memory, the improvement module 131 can add an operation that splits the tensor into multiple sub-tensors that each can fit into the faster memory.”))
the one or more dimensions of the one or more weight tensors are modified to become sparse weight tensors (¶ 41 (“Modifying the operations can also include adding an operation to split a tensor into multiple sub-tensors and including multiple iterations of one or more operations. For example, if the size of a tensor that will be input to an operation (or a sequence of operations) is too large to fit in faster memory, the improvement module 131 can add an operation that splits the tensor into multiple sub-tensors that each can fit into the faster memory.”)).
Regarding claim 10, Yoon, in view of Busato, discloses the invention of claim 8 as discussed above. Yoon further discloses wherein:
the tensors include one or more input tensors and one or more weight tensors; and (¶ 31 (“For example, the machine learning data can include inputs to operations (e.g., input tensors), outputs from operations (e.g., output tensors), weights used by the operations, and/or other appropriate data used by a machine learning processor 140 when performing machine learning computations using a machine learning model.”)).
modification of the one or more input tensors is based, at least in part, on the modification of the one or more weight tensors (¶ 41 (“Modifying the operations can also include adding an operation to split a tensor into multiple sub-tensors and including multiple iterations of one or more operations. For example, if the size of a tensor that will be input to an operation (or a sequence of operations) is too large to fit in faster memory, the improvement module 131 can add an operation that splits the tensor into multiple sub-tensors that each can fit into the faster memory.”)).
Regarding claim 13, Yoon, in view of Busato, discloses the invention of claim 8 as discussed above. Yoon further discloses wherein:
the one or more tensors include two tensors that share an input; and the one or more processors are further to cause the two tensors to be fused to be compatible with a sparse weight tensor (¶ 41 (“The improvement module 131 can also include a concat operation that merges the sub-tensors output by each iteration into an output tensor that represents the output of the original one or more operations on the original input tensor.”)).
Regarding claim 14, Yoon, in view of Busato, discloses the invention of claim 8 as discussed above. Yoon further discloses wherein:
the one or more tensors include two tensors that share an input; and the one or more processors are further to cause the two tensors to be fused using concatenation, stack, padding, or some combination thereof (¶ 41 (“The improvement module 131 can also include a concat operation that merges the sub-tensors output by each iteration into an output tensor that represents the output of the original one or more operations on the original input tensor.”)).
Regarding claim 15, Yoon discloses [a] method, comprising:
modifying dimensions of one or more tensors based, at least in part, on … one or more processing resources ((¶ 39 (“The improvement module 131 can generate the updated machine learning model 132 for an input machine learning model 112 by modifying the operations of the model, modifying the control dependencies of the model, and/or modifying the data dependencies of model to improve the locality for the memory hierarchy.”), ¶ 41 (“Modifying the operations can also include adding an operation to split a tensor into multiple sub-tensors and including multiple iterations of one or more operations. For example, if the size of a tensor that will be input to an operation (or a sequence of operations) is too large to fit in faster memory, the improvement module 131 can add an operation that splits the tensor into multiple sub-tensors that each can fit into the faster memory.”)).
Yoon does not expressly disclose changing the dimensions of a tensor based on a difference between the dimensions and a structured sparsity of one or more processing resources (but see Busato pgs. 2-3 (“Figure 2 shows how NVIDIA Sparse Tensor Cores operate on only half of one input to double the math efficiency. On the left is a weight matrix pruned to meet the expected 2:4 sparse pattern. As you can see, in each group of four weights (outlined in orange), only two weights are nonzero(shades of green). This matrix is compressed to be half the size of the original matrix with a from the second input matrix, letting the NVIDIA Sparse Tensor Core skip computing multiplications by zero to achieve twice the throughput of a regular Tensor Core.”) (figure 2 is reproduced below)).
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It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Yoon to incorporate the teachings of Busato to exploit the structured sparsity of a GPU by compressing the size of the original matrix at least because doing so would enable processing a neural network efficiently while reducing model complexity and maintaining accuracy. See Busato page 2.
Regarding claim 16, Yoon, in view of Busato, discloses the invention of claim 15 as discussed above. Yoon further discloses wherein:
the one or more tensors include one or more input tensors; and the one or more input tensors are modified to be expanded or coalesced (¶ 41 (“The improvement module 131 can also include a concat operation that merges the sub-tensors output by each iteration into an output tensor that represents the output of the original one or more operations on the original input tensor.”)).
Regarding claim 17, Yoon, in view of Busato, discloses the invention of claim 15 as discussed above. Yoon further discloses wherein:
the one or more tensors include one or more weight tensors and one or more input tensors; and (¶ 31 (“For example, the machine learning data can include inputs to operations (e.g., input tensors), outputs from operations (e.g., output tensors), weights used by the operations, and/or other appropriate data used by a machine learning processor 140 when performing machine learning computations using a machine learning model.”))
the one or more weight tensors and one or more input tensors are modified to output one or more sparse tensors (¶ 41 (“Modifying the operations can also include adding an operation to split a tensor into multiple sub-tensors and including multiple iterations of one or more operations. For example, if the size of a tensor that will be input to an operation (or a sequence of operations) is too large to fit in faster memory, the improvement module 131 can add an operation that splits the tensor into multiple sub-tensors that each can fit into the faster memory.”)).
Regarding claim 19, Yoon, in view of Busato, discloses the invention of claim 15 as discussed above. Yoon further discloses identifying which of the one or more tensors share an input (¶ 36 (“From the graph, the improvement module 131 can determine what data will be needed for each operation and when the operation will be executed.”)).
Regarding claim 20, Yoon, in view of Busato, discloses the invention of claim 15 as discussed above. Yoon further discloses analyzing which of the one or more tensors require one or more modifications, wherein the one or more tensors are between two or more layers of a neural network (¶ 36 (“From the graph, the improvement module 131 can determine what data will be needed for each operation and when the operation will be executed. Using this information, the size of data for each input and each output of each operation (e.g., based on the size of an input tensor to the operation), and the characteristics of the memory hierarchy, the improvement module 131 can determine when and where to store input and output data for each operation.”)).
Regarding claim 21, Yoon, in view of Busato, discloses the invention of claim 15 as discussed above. Yoon further discloses analyzing the one or more tensors, wherein the one or more tensors are input tensors; and (¶ 36 (“From the graph, the improvement module 131 can determine what data will be needed for each operation and when the operation will be executed. Using this information, the size of data for each input and each output of each operation (e.g., based on the size of an input tensor to the operation), and the characteristics of the memory hierarchy, the improvement module 131 can determine when and where to store input and output data for each operation.”))
fusing together two or more input tensors that share an input and are not compatible for the one or more processing resources (¶ 41 (“The improvement module 131 can also include a concat operation that merges the sub-tensors output by each iteration into an output tensor that represents the output of the original one or more operations on the original input tensor.”)).
Claims 5, 12, 18, 27, and 28 are rejected under 35 U.S.C. 103 as being unpatentable over Yoon and Busato as applied to claims 1, 8, 15, and 22 above, and further in view of Pelissier (US 2022/0327691 A1; published Oct. 13, 2022).
Regarding claim 5, Yoon, in view of Busato, discloses the invention of claim 1 as discussed above. Yoon further discloses wherein:
the one or more tensors are one or more sparse tensors; and (¶ 29 (“The operations can be those that are necessary to perform a forward pass through the machine learning model, e.g., to compute an inference through the machine learning model. These operations can include, for example, matrix multiplication operations and/or convolution operations performed by the layers of a neural network. As another example, the operations can be those that are necessary to perform an iteration of a training process to train the machine learning model. These operations can include operations necessary to perform a forward pass through the machine learning model and also operations necessary to perform a backward pass through the machine learning model, i.e., backpropagation operations necessary to determine gradients with respect to the weights or parameters of the machine learning model.”)).
Yoon does not expressly disclose the one or more sparse tensors are modified to have one or more respective shapes identical to shapes of one or more input tensors used in training a neural network (but see Pelissier ¶ 104 (“At 506, in some embodiment, the input image can be pre-processed. This step is optional and shown in dotted outline in FIG. 5. Example pre-processing steps may include downsampling or upsampling the image, cropping the number of lengthwise or widthwise pixels of the image, scaling the image, rotating the image, processing the image through one or more noise filters, processing the image through a high contrast filter (e.g., to reduce granularity of grayscale), Sobel filters for edge detection, smoothing filters for noise reduction, and the like. Pre-processing an input image may help standardize the input image so that it matches the format (e.g., having generally the same dimensions and parameters) of the medical image the machine learning model used in step 508 is trained on.”)).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Yoon to incorporate the teachings of Pelissier to modify the input tensor to have the same shape as the tensors used to train the neural network, at least because doing so would improve the accuracy of the prediction outputted by the machine learning model. See Pelissier ¶ 104.
Regarding claim 12, Yoon, in view of Busato, discloses the invention of claim 8 as discussed above. Yoon further discloses wherein:
the one or more tensors are one or more sparse tensors compatible with the one or more processing resources; and (¶ 29 (“The operations can be those that are necessary to perform a forward pass through the machine learning model, e.g., to compute an inference through the machine learning model. These operations can include, for example, matrix multiplication operations and/or convolution operations performed by the layers of a neural network. As another example, the operations can be those that are necessary to perform an iteration of a training process to train the machine learning model. These operations can include operations necessary to perform a forward pass through the machine learning model and also operations necessary to perform a backward pass through the machine learning model, i.e., backpropagation operations necessary to determine gradients with respect to the weights or parameters of the machine learning model.”)).
Yoon does not expressly disclose the one or more sparse tensors are modified to have one or more respective shapes identical to shapes of one or more input tensors used in training a neural network (but see Pelissier ¶ 104 (“At 506, in some embodiment, the input image can be pre-processed. This step is optional and shown in dotted outline in FIG. 5. Example pre-processing steps may include downsampling or upsampling the image, cropping the number of lengthwise or widthwise pixels of the image, scaling the image, rotating the image, processing the image through one or more noise filters, processing the image through a high contrast filter (e.g., to reduce granularity of grayscale), Sobel filters for edge detection, smoothing filters for noise reduction, and the like. Pre-processing an input image may help standardize the input image so that it matches the format (e.g., having generally the same dimensions and parameters) of the medical image the machine learning model used in step 508 is trained on.”)).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Yoon to incorporate the teachings of Pelissier to modify the input tensor to have the same shape as the tensors used to train the neural network, at least because doing so would improve the accuracy of the prediction outputted by the machine learning model. See Pelissier ¶ 104.
Regarding claim 18, Yoon, in view of Busato, discloses the invention of claim 15 as discussed above. Yoon further discloses wherein:
the one or more tensors include one or more sparse tensors based, at least in part, on one or more input tensors used to train a neural network; and (¶ 29 (“The operations can be those that are necessary to perform a forward pass through the machine learning model, e.g., to compute an inference through the machine learning model. These operations can include, for example, matrix multiplication operations and/or convolution operations performed by the layers of a neural network. As another example, the operations can be those that are necessary to perform an iteration of a training process to train the machine learning model. These operations can include operations necessary to perform a forward pass through the machine learning model and also operations necessary to perform a backward pass through the machine learning model, i.e., backpropagation operations necessary to determine gradients with respect to the weights or parameters of the machine learning model.”)).
Yoon does not expressly disclose the one or more tensors are modified to have one or more respective shapes identical to shapes of the one or more input tensors (but see Pelissier ¶ 104 (“At 506, in some embodiment, the input image can be pre-processed. This step is optional and shown in dotted outline in FIG. 5. Example pre-processing steps may include downsampling or upsampling the image, cropping the number of lengthwise or widthwise pixels of the image, scaling the image, rotating the image, processing the image through one or more noise filters, processing the image through a high contrast filter (e.g., to reduce granularity of grayscale), Sobel filters for edge detection, smoothing filters for noise reduction, and the like. Pre-processing an input image may help standardize the input image so that it matches the format (e.g., having generally the same dimensions and parameters) of the medical image the machine learning model used in step 508 is trained on.”)).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Yoon to incorporate the teachings of Pelissier to modify the input tensor to have the same shape as the tensors used to train the neural network, at least because doing so would improve the accuracy of the prediction outputted by the machine learning model. See Pelissier ¶ 104.
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Yoon and Busato as applied to claim 8 above, and further in view of Towal (US 2019/0332941 A1; published Oct. 31, 2019).
Regarding claim 11, Yoon, in view of Busato, discloses the invention of claim 8 as discussed above. Yoon further discloses wherein:
the one or more tensors include one or more weight tensors and one or more input tensors, and (¶ 31 (“For example, the machine learning data can include inputs to operations (e.g., input tensors), outputs from operations (e.g., output tensors), weights used by the operations, and/or other appropriate data used by a machine learning processor 140 when performing machine learning computations using a machine learning model.”)).
Yoon does not expressly disclose each of the one or more weight tensors are modified based further, at least in part, on dimensions of the one or more input tensors (but see Towal ¶ 55 (“The artificial neural network includes a layer 406 including a set of nodes. In the artificial neural network 400, a set of inputs 402 are received at a layer of the artificial neural network 400. The set of inputs 402 are convolved with a set of weights of weight tensor 404. A bias term b1 may be added to the result of the convolution and the sum may be output and supplied as an input for the next layer 406 of the artificial neural network 400.”), ¶ 56 (“Singular value decomposition (SVD) may be applied to weights 404. Applying SVD, weight tensor 404 may be represented by two matrices (e.g., 424, 426) as given by W≈Ŵ=UVT, where U is an M×M matrix of input filters, and V is a M×N matrix of output filters, each of which has a rank=M. As such, weight tensor 404 of artificial neural network 400 may be decomposed into a first weight tensor U 1 424 and a second weight tensor V 1 426.”)).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Yoon to incorporate the teachings of Towal to decompose a weight tensor of the neural network model via singular value decomposition and setting the value to 0 for successively higher singular values, at least because doing so would address the issue of computational complexity and compute resource consumption. See Towal ¶ 10.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Liu, Bangtian, et al. "A unified optimization approach for sparse tensor operations on gpus." 2017 IEEE international conference on cluster computing (CLUSTER). IEEE, 2017
Nagasaka, Yusuke, Akira Nukada, and Satoshi Matsuoka. "High-performance and memory-saving sparse general matrix-matrix multiplication for nvidia pascal gpu." 2017 46th International Conference on Parallel Processing (ICPP). IEEE, 2017
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHID KHAN whose telephone number is (571)270-0419. The examiner can normally be reached M-F, 9-5 est.
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/SHAHID K KHAN/Primary Examiner, Art Unit 2146