Prosecution Insights
Last updated: October 01, 2026
Application No. 17/680,409

Method for Fabricating a Substrate with a Solder Stop Structure, Substrate with a Solder Stop Structure and Electronic Device

Non-Final OA §102§103§112
Filed
Feb 25, 2022
Priority
Mar 01, 2021 — EU 21160023.4
Examiner
ARROYO, TERESA M
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Infineon Technologies AG
OA Round
4 (Non-Final)
72%
Grant Probability
Favorable
4-5
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allowance Rate
361 granted / 502 resolved
+3.9% vs TC avg
Strong +23% interview lift
Without
With
+23.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
59 currently pending
Career history
551
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
57.7%
+17.7% vs TC avg
§102
18.4%
-21.6% vs TC avg
§112
19.4%
-20.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 502 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments, see Remarks, filed 7/1/26, with respect to the new grounds of rejection(s) set forth in the Final Rejection mailed 5/5/26 have been fully considered. However, upon further consideration, the Besold reference has been re-interpreted below. Claim Objections Claims 6, 8-10, 12-15 is/are objected to because of the following informalities: In claim 6, there is no support in the specification for the terminology a first position and a second position. The other claims are objected as being dependent on an objected claim. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 6, 8-10, 12-15 is/are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. There is no support in the specification for the additional features in claim 6 including a first position and a second position. Paragraph [0043] of the specification, as filed, describes “…the oxidation structure 130 essentially extends from one edge of the respective connection area 210, 220 to another edge, thereby separating the respective connection area 210, 220 into the first and second parts 120_1, 120_2. The features of a first position and a second position seem to be redundant as to either the first and second edges or the first and second parts. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 6, 10 is/are, to the extent taught and understood, rejected under 35 U.S.C. 102(a)(1) as being anticipated by DE Publication No. 10 2018 125 300 (Besold, paragraph numbers correspond to the Espacenet translation provided with the Office Action mailed 3/26/24). Besold discloses 6. (Currently Amended) A substrate with a solder stop structure, the substrate 11 configured to carry a surface mounted device 12 (since element 11 is a substrate as discussed in the specification of this application, it can be configured to meet the intended purpose as discussed in MPEP 2144.07) and comprising: a ceramic layer 11, a metallization 25, 26, 27, 28 arranged on the ceramic layer, the metallization comprising a base metal layer 25, 26 and a noble metal layer 27, 28 covering the base metal layer, and an oxidation structure 33 arranged on the metallization and configured to act as a solder stop (since layer 33 is the same material as discussed in the specification of this application, it can be configured to meet the intended purpose as discussed in MPEP 2144.07) (¶ [0071],¶ [0072]), wherein the noble metal layer 27, 28 is removed (product-by-process, see MPEP 2113) in the oxidation structure (Fig. 1C) wherein the metallization 25, 26, 27, 28 comprises a first connection area 21 and a second connection area 20 or 22 electrically insulated from each other by a trench (unlabeled), wherein the oxidation structure 33 extends from a first position (right side) of the first connection area 21 to a second position (middle) of the first connection area 21 to separate the first connection area 21 into a first part (left) and a second part (right), wherein the first position (right side) is adjacent to but separated from a first edge (connection area 21 has an edge on the side of the region near 20 or 22) of the first connection area 21, wherein the second position (middle) is adjacent to but separated from a second edge (connection area 21 has an edge at the bottom of the region) of the first connection area 21; and wherein the noble metal layer 27, 28 completely laterally surrounds the oxidation structure 32. [AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: textbox (First position)][AltContent: textbox (Second position)][AltContent: textbox (Second connection area)][AltContent: textbox (First connection area)][AltContent: textbox (Second connection area)] [AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: arrow] PNG media_image1.png 200 400 media_image1.png Greyscale [AltContent: textbox (First part)][AltContent: textbox (Second edge)][AltContent: textbox (Second part)][AltContent: textbox (First edge)] Besold discloses 10. The substrate of claim 6, wherein the noble metal layer 27, 28 comprises gold or silver (¶ [0069,],¶ [0070]), wherein the base metal layer 25, 26 comprises nickel or a nickel alloy or copper or a copper alloy (¶ [0069],¶ [0070],¶ [0073]), and wherein the oxidation structure 33 comprises an oxide of the material ([0061]) of the base metal layer 25, 26. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 6, 8-10 is/are, to the extent taught and understood, rejected under 35 U.S.C. 103 as being unpatentable over Besold in view of DE Publication No. DE 10 2012 110382 (Herrmann, cited on the IDS filed 2/25/22, paragraph numbers correspond to the Espacenet translation). Besold discloses 6. (Currently Amended) A substrate with a solder stop structure, the substrate 11 configured to carry a surface mounted device 12 (since element 11 is a substrate as discussed in the specification of this application, it can be configured to meet the intended purpose as discussed in MPEP 2144.07) and comprising: a ceramic layer 11, a metallization 25, 26, 27, 28 arranged on the ceramic layer, the metallization comprising a base metal layer 25, 26 and a noble metal layer 27, 28 covering the base metal layer, and an oxidation structure 33 arranged on the metallization and configured to act as a solder stop (since layer 33 is the same material as discussed in the specification of this application, it can be configured to meet the intended purpose as discussed in MPEP 2144.07) (¶ [0071],¶ [0072]), wherein the noble metal layer 27, 28 is removed (product-by-process, see MPEP 2113) in the oxidation structure (Fig. 1C) wherein the metallization 25, 26, 27, 28 comprises a first connection area 21 and a second connection area 20 or 22 electrically insulated from each other by a trench (unlabeled), wherein the oxidation structure 33 extends from a first position (right side) of the first connection area 21 to a second position (middle) of the first connection area 21 to separate the first connection area 21 into a first part (left) and a second part (right), wherein the first position (right side) is adjacent to but separated from a first edge (connection area 21 has an edge on the side of the region near 20 or 22) of the first connection area 21, wherein the second position (middle) is adjacent to but separated from a second edge (connection area 21 has an edge at the bottom of the region) of the first connection area 21. Besold fails to disclose wherein the noble metal layer 27, 28 completely laterally surrounds the oxidation structure 32. Herrmann teaches (at least Fig. 20) A substrate comprising: wherein the noble metal layer 9.1 / 9.2 completely laterally surrounds the oxidation structure 5. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to provide a noble metal that completely laterally surround the oxidation structure in Besold. The motivation would be to partition the connection area into first and second part for improved solder control as taught by Herrmann ([0026]). Herrmann fails to specifically teach 8. (Previously Presented) The substrate of claim 6, wherein the first end and the second end of the oxidation structure are each separated from an edge of the first connection area by at least 70 µm. 9. (Previously Presented) The substrate of claim 6, wherein a width of the oxidation structure separating the first part from the second part is at least 100 µm. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to obtain the desired separation in the modified device of Besold by routine optimization. Since there is no upper limit for the minimum distance and minimum width, any value above 70 µm or 100 µm would meet the claim limitations (See MPEP 2144.05). Herrmann teaches 10. The substrate of claim 6, wherein the noble metal layer 9.2 comprises gold or silver, wherein the base metal layer 9.1 comprises nickel or a nickel alloy or copper or a copper alloy, and wherein the oxidation structure 5 comprises an oxide of the material ([0041]) of the base metal layer 9.1. Claim(s) 12, 14, 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Besold in view of Herrmann as applied to claim 6 above, and further in view of U.S. Patent Application Publication No. 2010/0089979 (Irslinger). Besold in view of Herrmann teaches 12. An electronic device, comprising: the substrate of claim 6 (as discussed above). The combination of references fails to teach a solder joint, and a surface mounted device coupled to the substrate by the solder joint such that one contact of the surface mounted device is coupled to the metallization on the first part. Irslinger teaches An electronic device (Figs. 4, 5) comprising: a solder joint 230, and a surface mounted device 250 / 251 coupled to the substrate 200 by the solder joint such that one contact 260, 270 of the surface mounted device is coupled to the metallization (¶ [0030]) on the first part (left). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include a solder joint in the modified device of Besold. The motivation would be a matter of engineering design considerations involving integrally joining components to cause formation of intermetallic compounds between the surface coatings as taught by Irslinger (¶ [0030]- ¶ [0032]). Herrmann teaches (an electrical component) 14. The electronic device of claim 12, wherein the surface mounted device comprises a resistor, a capacitor, an inductor, or a diode (¶ [0037]). Selecting the type of component would be based on suitability for its intended use. See MPEP 2144.07. Besold discloses 15. The electronic device of claim 12, further comprising: a semiconductor die 12 (¶ [0056]) sintered (product-by-process, see MPEP 2113) to the substrate, Herrmann teaches wherein the semiconductor die 8 comprises at least one contact (unlabeled) electrically coupled to the metallization by a further solder joint 7 (Fig. 7). Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Besold in view of Herrmann and Irslinger as applied to claim 12 above, and further in view of U.S. Patent Application Publication No. 2017/0033067 (Kramp). The combination of references fails to teach 13. The electronic device of claim 12, wherein the solder joint comprises a SnSb solder material. Kramp teaches An electronic device comprising: a solder joint 502 comprising a SnSb solder material (¶ [0094]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to select the desired solder joint material in the modified device of Besold. The motivation would be selection based on its suitability for an intended use as taught by Kramp (See MPEP 2144.07). Claim(s) 8, 9 is/are, to the extent taught and understood, rejected under 35 U.S.C. 103 as being unpatentable over Besold. Besold fails to specifically disclose 8. (Previously Presented) The substrate of claim 6, wherein the first end and the second end of the oxidation structure are each separated from an edge of the first connection area by at least 70 µm. 9. (Previously Presented) The substrate of claim 6, wherein a width of the oxidation structure separating the first part from the second part is at least 100 µm. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to obtain the desired separation in Besold by routine optimization. Since there is no upper limit for the minimum distance and minimum width, any value above 70 µm or 100 µm would meet the claim limitations (See MPEP 2144.05). Claim(s) 11, 12, 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Besold as applied to claim 6 above, and further in view of U.S. Patent Application Publication No. 2010/0089979 (Irslinger). Besold fails to disclose 11. The substrate of claim 6, wherein the oxidation structure completely surrounds the second part on all sides. Irslinger teaches A substrate with a solder stop structure, the substrate comprising: an oxidation structure 215 arranged on a metallization 210, wherein the oxidation structure divides (laser 290 in Fig. 3) the metallization into a first part (left / right) and a second part (middle), and wherein the oxidation structure 215 completely surrounds the second part (middle) on all sides (Fig. 3). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to surround the second part on all sides in Besold. The motivation would be to design a solder stop as a closed line to enclose a soldering region to prevent wetting as taught by Irslinger (¶ [0025]- ¶ [0032]). Besold discloses 12. An electronic device (10), comprising: the substrate of claim 6 (as discussed above). Besold fails to disclose a solder joint, and a surface mounted device coupled to the substrate by the solder joint such that one contact of the surface mounted device is coupled to the metallization on the first part. Irslinger teaches An electronic device (Figs. 4, 5) comprising: a solder joint 230, and a surface mounted device 250 / 251 coupled to the substrate 200 by the solder joint such that one contact 260, 270 of the surface mounted device is coupled to the metallization (¶ [0030]) on the first part (left). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include a solder joint in Besold. The motivation would be a matter of engineering design considerations involving integrally joining components to cause formation of intermetallic compounds between the surface coatings as taught by Irslinger (¶ [0030]- ¶ [0032]). Besold discloses 14. The electronic device of claim 12, wherein the surface mounted device comprises a resistor, a capacitor, an inductor, or a diode (¶ [0025]). Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Besold in view of Irslinger as applied to claim 12 above, and further in view of U.S. Patent Application Publication No. 2017/0033067 (Kramp). The combination of references fails to teach 13. The electronic device of claim 12, wherein the solder joint comprises a SnSb solder material. Kramp teaches An electronic device comprising: a solder joint 502 comprising a SnSb solder material (¶ [0094]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to select the desired solder joint material in the modified device of Besold. The motivation would be selection based on its suitability for an intended use as taught by Kramp (See MPEP 2144.07). Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Besold in view Irslinger as applied to claim 12 above, and further in view of Herrmann. The combination of references teaches 15. The electronic device of claim 12, further comprising: a semiconductor die (12,¶ [0056]) sintered (product-by-process, see MPEP 2113) to the substrate, The combination of references fails to teach wherein the semiconductor die comprises at least one contact electrically coupled to the metallization by a further solder joint. Herrmann teaches An electronic device comprising: a semiconductor die 8 (¶ [0037]) sintered (product-by-process, see MPEP 2113) to the substrate 1, wherein the semiconductor die 8 comprises at least one contact (unlabeled) electrically coupled to the metallization by a further solder joint 7 (Fig. 7). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to mount a semiconductor die in Besold. The motivation would be mounting multiple devices to a substrate is well known in the art as discussed in Herrmann (See MPEP 2144.03). Also, see MPEP 2144.04 VI. B. regarding duplication of parts. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. U.S. Patent Nos. 4,939,022 (Palanisamy), 4,967,313 (Berner) WO Publication No. 2017/129698 (Zitzlsperger) teach a substrate with a solder stop structure. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TERESA M ARROYO whose telephone number is (703)756-1576. The examiner can normally be reached Monday - Friday (8:30 A.M. E.T. - 5:00 P.M. E.T.). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached on 571.272.1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TERESA M. ARROYO/Primary Examiner, Art Unit 2893
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Prosecution Timeline

Show 13 earlier events
Jun 09, 2025
Response after Non-Final Action
Jun 09, 2025
Response after Non-Final Action
Feb 11, 2026
Response after Non-Final Action
Apr 08, 2026
Response after Non-Final Action
May 05, 2026
Final Rejection mailed — §102, §103, §112
Jul 01, 2026
Response after Non-Final Action
Jul 13, 2026
Final Rejection mailed — §102, §103, §112
Aug 24, 2026
Response after Non-Final Action

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Prosecution Projections

4-5
Expected OA Rounds
72%
Grant Probability
95%
With Interview (+23.2%)
3y 0m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 502 resolved cases by this examiner. Grant probability derived from career allowance rate.

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