DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 7/3/25 have been fully considered but they are not persuasive.
Applicant argues Ishikawa requires ball bonds on lead 4 in order to manufacture the chip in smaller dimensions.
In response, Lian was cited for teaching a stitch bond on a second lead. In paragraphs [0044] and [0080], Lian discusses bond substitutes such as a ball-bond, a bump or a stitch bond. Lian teaches the most appropriate bond type provided depends on a number of factors, for example, such that the bond type is compatible with the material of the bond wire. Even though Ishikawa uses balls bonds 8 on lead 4, it is well-known in the art to substitute a stitch bond for a ball bond as taught by Lian, as appropriate.
Accordingly, the Applicant’s argument is not persuasive.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 10, 15, 16, 19, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication No. 2005/0205995 (Ishikawa) in view of U.S. Patent No. 5,328,079 (Mathew) and U.S. Patent Application Publication No. 2009/0014848 (Ong Wai Lian).
Ishikawa discloses
10. (Currently Amended) A method (Figs. 1-6, 8, 9), comprising:
forming at a first end of a conductive wire (6) inserted within a capillary tool (9) a first ball bond (7/8) on a first bond pad (5) of a semiconductor die (3) that is on a die pad (2) of a first leadframe that includes a plurality of leads (Fig. 8) including a first lead (4) and a second lead (4);
cutting the conductive wire (6, [0027]);
moving the capillary tool to over the first lead (4, [0029]);
forming a second ball bond (8, Fig. 9) on the first lead (4);
after forming the second ball bond, without cutting the conductive wire, releasing the second ball bond from a hole of the capillary tool, then moving the capillary tool to over the first ball bond ([0029]);
forming a first stitch bond (wedge) on the first ball bond (7/8) then cutting the conductive wire (6) to provide a first wirebond connection ([0029]);
forming a third ball bond (8, Fig. 9) on a second bond pad (5) of the semiconductor die (3); and
moving the capillary tool to over the second lead (4, [0029], repeated [0038]).
Ishikawa does not specifically disclose interconnection 4 is a lead of leadframe; and
forming a second stitch bond on the second lead then cutting the conductive wire to provide a second wirebond connection.
Mathew teaches
A wirebonding method (Figs. 2-7), comprising:
forming at a first end of a conductive wire (20) inserted within a capillary tool (26) a first ball bond (22/28) on a bond pad (18/40) of a semiconductor die (16/42) that is on a die pad (12/46) of a first leadframe that includes a plurality of leads including a first lead (14/44/48).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to provide a lead of a leadframe in Ishikawa. The motivation would be Mathew teaches a leadframe with a plurality of leads which is a well-known substitute and an equivalent for a substrate with an interconnection for provide a connection to a semiconductor die (col. 3, line 1 to col. 5, line 31). See MPEP 2144.03 and 2144.06.
Ong Wai Lian teaches
A wirebonding method, comprising:
a first ball bond (38) on a first bond pad (33) of a semiconductor die (32);
forming a second ball bond (48) on a first lead (24); and
forming a second stitch bond (37) on the second lead 23 then cutting the conductive wire (break, Fig. 6) to provide a second wirebond connection ([0112]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to form a second stitch bond on a second lead in Ishikawa. The motivation would be the same lead frame can be used for different semiconductor products, for flexibility in the same package without changing the lead frame type as taught by Ong Wai Lian ([0070]).
Ishikawa discloses
15. (Currently Amended) The method of claim 10, wherein the first wirebond connection has a shape having a maximum height ([0028]-[0030]) over the first lead (4).
Ishikawa discloses
16. (Original) The method of claim 10, wherein the semiconductor die comprises a power device ([0024]).
Ishikawa discloses
19. (Previously Presented) The method of claim 11, wherein the first wirebond connection and the third wirebond connection are spaced apart from one another (Fig. 6).
Ishikawa discloses
20. (Currently Amended) The method of claim 10, wherein the first wirebond connection points toward the first lead (Fig. 6, [0028]-[0030]).
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ishikawa in view of Mathew and Ong Wai Lian as applied to claim 10 above, and further in view of Applicant’s Admitted Prior Art (AAPA).
The combination of references fails to specifically teach
11. (Previously Presented) The method of claim 10, further comprising forming a third wirebond connection between the first bond pad and the first lead.
AAPA teaches
A wirebonding method, comprising:
forming a third wirebond connection between the bond pad and the first lead ([0015]).
Further, duplication of steps/parts has no patentable significance unless a new and unexpected result is produced. See MPEP 2144.04 VI. B.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to form a third wirebond connection. The motivation would be AAPA teaches a method of forming a second wirebond connection based on its suitability for the intended use. See MPEP 2144.07.
Claim(s) 13, 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ishikawa in view of Mathew and Ong Wai Liang as applied to claim 10 above, and further in view of U.S. Patent Application Publication No. 2014/0209663 (Song).
The combination of references fails to teach
13. (Previously Presented) The method of claim 10, wherein releasing the second ball bond comprises the capillary tool applying ultrasonic energy using an ultrasonic generator (USG) current of at least 120 mA.
Song teaches
A wirebonding method, comprising:
wherein the releasing of the second ball bond comprises the capillary tool applying ultrasonic energy using an ultrasonic generator (USG) current of at least 120 mA ([0028], [0034]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include an ultrasonic generator at a particular current in Ishikawa. The motivation would be Song teaches an ultrasonic generator is well-known to derive the extent of deformation from a relationship between the ultrasonic current and the ball bond. See MPEP 2144.03.
Song teaches
14. (Original) The method of claim 13, wherein the USG current is at least 150 mA ([0028], [0034]).
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ishikawa in view of Mathew and Ong Wai Lian as applied to claim 10 above, and further in view of U.S. Patent No. 10,242,934 (Sirinorakul)
The combination of references fails to teach
18. (Previously Presented) The method of claim 10, further comprising applying a mold compound that encapsulates the semiconductor die.
Sirinorakul teaches
A method (300) comprising:
wherein the first leadframe is part of a leadframe sheet (400) including a plurality of other leadframes including a second leadframe having a second lead physically connected to the first lead by a dam bar (410) that includes a half etch thickness (col. 6, lines 24 to col. 9, line 49); and
further comprising applying a mold compound (520) that encapsulates the semiconductor die (515).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include a leadframe sheet, dam bar, half etch, and mold compound in Ishikawa. The motivation would be Sirinorakul teaches a leadframe sheet, dam bar, and half etch are well-known to singulate packages from each other depending on application, and a molding compound is well-known in the packaging art. See MPEP 2144.03.
Claim(s) 21, 24, 25, and 28 is/are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication No. 2005/0205995 (Ishikawa) in view of U.S. Patent No. 5,328,079 (Mathew) and U.S. Patent Application Publication No. 2008/0023831 (Nishimura).
Ishikawa discloses
21. (Previously Presented) A method, comprising:
providing a leadframe including a die pad (2) and a plurality of leads (Fig. 8) including a first lead (4) and a second lead (4);
forming a first ball bond (7/8) on the first lead;
attaching a semiconductor die (3) to the die pad, the semiconductor die having a plurality of bond pads (Fig. 9) including a first bond pad (5) and a second bond pad (5); and
forming a second ball bond (8) on the first bond pad and a first stitch bond (wedge) on the second ball bond ([0029]) to provide a first wirebond connection between the first lead (4) and the first bond pad (5) (Fig. 6, [0029]).
Ishikawa does not specifically disclose interconnection 4 is a lead of leadframe; and
forming a third ball bond on the second bond pad and a second stitch bond on the second lead to provide a second wirebond connection between the second lead and second bond pad.
Mathew teaches
A wirebonding method (Figs. 2-7), comprising:
forming at a first end of a conductive wire (20) inserted within a capillary tool (26) a first ball bond (22/28) on a bond pad (18/40) of a semiconductor die (16/42) that is on a die pad (12/46) of a first leadframe that includes a plurality of leads including a first lead (14/44/48).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to provide a lead of a leadframe in Ishikawa. Mathew teaches a leadframe with a plurality of leads is a well-known substitute and equivalent for a substrate with an interconnection for provide a connection to a semiconductor die (col. 3, line 1 to col. 5, line 31). See MPEP 2144.03 and 2144.06.
Nishimura teaches
A wirebonding method, comprising:
a first ball bond (B) on a first lead (210);
forming a second ball bond (B) on a first bond pad (22A);
forming a third ball bond (B) on a second bond pad (22B) and a stitch bond on a second lead (21A) to provide a second wirebond connection between the second lead (21A) and second bond pad (22B, [0261]-[0269]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to form a third ball bond on a second bond pad and a second stitch bond on a second lead in Ishikawa. The motivation would be to prevent contact and short-circuits between adjacent wires by forming them at different heights and directions for increased flexibility as taught by Nishimura ([0010], [0305]).
Ishikawa discloses
24. (Previously Presented) The method of claim 21, wherein the semiconductor die comprises a power device ([0024]).
Ishikawa discloses
25. (Currently Amended) The method of claim 21, wherein the first wirebond connection has a shape having a maximum height ([0028]-[0030]) that is over the first lead (4).
Ishikawa discloses
28. (Currently Amended) The method of claim 21, wherein the wirebond connection points toward the first lead (Fig. 6, [0028]-[0030]).
Claim(s) 22, 27 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ishikawa in view of Mathew and Nishimura as applied to claim 21 above, and further in view of Applicant’s Admitted Prior Art (AAPA).
The combination of references fails to teach
22. (Previously Presented) The method of claim 21, wherein the first lead has a third wirebond connection with the first bond pad.
AAPA teaches
A wirebonding method, comprising:
wherein the first lead has a third wirebond connection with the first bond pad (Fig. 3A, [0015]).
Further, duplication of steps/parts has no patentable significance unless a new and unexpected result is produced. See MPEP 2144.04 VI. B.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to second wirebond connection. The motivation would be AAPA teaches a method of forming a second wirebond connection based on its suitability for the intended use. See MPEP 2144.07.
Ishikawa discloses / AAPA teaches
27. (Previously Presented) The method of claim 22, wherein the first wirebond connection and the third wirebond connection are spaced apart from one another (Fig. 1 / Fig. 3A).
Claim(s) 26 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ishikawa in view of Mathew and Nishimura as applied to claim 21 above, and further in view of U.S. Patent No. 10,242,934 (Sirinorakul)
The combination of references fails to specifically teach
26. (Previously Presented) The method of claim 21, further comprising encapsulating the semiconductor die with a mold compound.
Sirinorakul teaches
A method (300) comprising:
wherein the first leadframe is part of a leadframe sheet (400) including a plurality of other leadframes including a second leadframe having a second lead physically connected to the first lead by a dam bar (410) that includes a half etch thickness (col. 6, lines 24 to col. 9, line 49); and
further comprising applying a mold compound (520) that encapsulates the semiconductor die (515).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include a leadframe sheet, dam bar, half etch, and mold compound in Ishikawa. The motivation would be Sirinorakul teaches a leadframe sheet, dam bar, and half etch are well-known to singulate packages from each other depending on application, and a molding compound is well-known in the packaging art. See MPEP 2144.03.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TERESA M ARROYO whose telephone number is (703)756-1576. The examiner can normally be reached Monday - Friday (8:30 A.M. E.T. - 5:00 P.M. E.T.).
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/TERESA M. ARROYO/Primary Examiner, Art Unit 2893