DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendment filed on Oct. 8th 2025 has been entered. Claims 1-10, 12-14 and 21 remain pending in the application. Claims 1-10, 13 and 21 are examined in this office action. Claims 12 and 14 are withdrawn from further consideration.
Claim Objections
Claim 1 is objected to because of the following informalities:
In claim 1, line 30, “the conductive film of the modification" should read “the conductive film .
Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-10, 13 and 21 are rejected under both 35 U.S.C. 103 as being unpatentable over Song et al. (US 20170033003) in view of Son et al. (US 20140357054), Yang et al. (US 20210398898) and Yoo et al. (US 20210090999).
Regarding claim 22, Song teaches a semiconductor device (Abstract), comprising:
a generic line (interconnection; Abstract);
wherein the generic line (interconnection) includes:
a first conductive layer (fig. 23, conductive plug 140 and further include an adhesion layer; para. 0132) extending in a first direction (direction perpendicular to the fig.), the first conductive layer (140 and adhesion layer) including a first surface, a second surface (left and right surfaces) facing the first surface in a second direction (horizontal direction) intersecting the first direction (direction perpendicular to the fig.), a third surface, and a fourth surface (top and bottom surfaces) facing the third surface in a third direction (vertical direction), the third direction (vertical direction) intersecting the first direction (direction perpendicular to the fig.) and the second direction (horizontal direction), the first conductive layer (140 and adhesion layer) containing a first element which is at least one element selected from a group consisting of tungsten (W) or molybdenum (Mo) (adhesion layer may include at least one metal selected from the group consisting of Mo, W; para. 0122);
a first region (diffusion barrier layer 130 on the left; para. 0132) disposed on a first surface side (left side) of the first conductive layer (140 and adhesion layer), the first region (130) containing a second element and a third element, the second element being at least one element selected from the group consisting of tungsten (W) or molybdenum (Mo) (130 include a metal chalcogenide-based material may include at least one metal element selected from the group consisting of Mo, W; para. 0131), the third element being at least one element selected from a group consisting of sulfur (S), selenium (Se), or tellurium (Te) (130 include a metal chalcogenide-based material may include at least one chalcogen element selected from the group consisting of S, Se, Te; para. 0131), and including a first crystal (130 having a 2D crystal structure; para. 0131);
a second region (diffusion barrier layer 130 on the right; para. 0132) disposed on a second surface side (right side) of the first conductive layer (140 and adhesion layer), the second region (130) containing the second element (130 includes Mo, W; para. 0131) and the third element (130 includes S, Se, Te; para. 0131), and including a second crystal (130 having a 2D crystal structure; para. 0131);
a conductive film (150) disposed on a fourth surface side (top side) of the first conductive layer (140).
Song fails to explicitly teach the generic line is a bit line;
a memory cell transistor including a first end and a second end, the first end electrically connected to the bit line; and
a source electrically connected to the second end.
However, Son teaches the generic line is a bit line (Son: fig. 1, bit line BL0; para. 0025, similar to interconnection of Song);
a memory cell transistor (Son: memory cell transistors MC; para. 0026) including a first end and a second end (Son: drain and source end; para. 0026), the first end (Son: drain end) electrically connected to the bit line (Son: BL0); and
a source (Son: common source line CSL; para. 0026) electrically connected to the second end (Son: source end).
Son and Song are considered to be analogous to the claimed invention because they are in the same field of semiconductor devices.
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to add a bit line, a memory cell transistor and a source as taught by Son into Song.
Doing so would realize a 3D semiconductor device to improve in the memory storage capacity (Son: para. 0057).
In addition, Song in view of Son fails to explicitly teach the first region configured for preventing scattering of free electrons from the first conductive layer;
the second region configured for preventing scattering of free electrons from the first conductive layer;
an insulating film disposed on a third surface side of the first conductive layer and the insulating film being in contact with the third surface, the insulating film different from the first region and the second region, the insulating film including silicon oxide, silicon nitride, or silicon oxynitride.
However, Yang teaches a first region (Yang: fig. 2, left protection liner 116; para. 0018, similar to 130 of Song) configured for preventing scattering of free electrons (Yang: protection liner 116 reduces electron scattering of 112; para. 0039) from the first conductive layer (Yang: interconnect wire 112, first barrier layer 110; para. 0017, similar to 140 of Song);
a second region (Yang: right 116) configured for preventing scattering of free electrons (Yang: 116 reduces electron scattering) from the first conductive layer (Yang: 112);
an insulating film (Yang: lower interconnect dielectric layer 108; para. 0033) disposed on a third surface side (Yang: bottom side) of the first conductive layer (Yang: 112, 110) and the insulating film (Yang: 108) being in contact with the third surface (Yang: bottom side), the insulating film (Yang: 108) different from the first region (Yang: left 116) and the second region (Yang: right 116), the insulating film (Yang: 108) including silicon oxide, silicon nitride, or silicon oxynitride (Yang: silicon nitride, silicon oxynitride, silicon oxide; para. 0033).
Yang, Son and Song are considered to be analogous to the claimed invention because they are in the same field of semiconductor devices.
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to add first/second region configured for preventing scattering of free electrons from the first conductive layer and an insulating film as taught by Yang.
Doing so would realize a material that reduces electron scattering and also mitigates a change in resistivity as spacing between the interconnect wires decreases (Yang: para. 0018).
In addition, Song in view of Son and Yang fails to explicitly teach ends of the conductive film in the second direction are aligned with an outer sidewall of the first region and an outer sidewall of the second region, respectively, the conductive film of the modification is different from the first conductive layer, and the conductive film includes titanium, titanium nitride, tantalum, tantalum nitride, tungsten nitride, or a sulfide, a selenium product, or a tellurium product.
However, Yoo teaches ends of the conductive film (Yoo: fig. 5, left/right ends of upper barrier film 310; para. 0080, similar to 150 of Song) in the second direction (horizontal direction) are aligned with an outer sidewall of the first region (Yoo: left outer sidewall of first sidewall portion 210sa; para. 0103, similar to left 130 of Song) and an outer sidewall of the second region (Yoo: right outer sidewall of second sidewall portion 210sb; para. 0103, similar to right 130 of Song), respectively, the conductive film (Yoo: 310) of the modification is different from the first conductive layer (Yoo: lower filling film 220; para. 0103, similar to 140 of Song), and the conductive film (Yoo: 310) includes titanium, titanium nitride, tantalum, tantalum nitride, tungsten nitride (Yoo: Ta, TaN, Ti, TiN; para. 0083), or a sulfide, a selenium product, or a tellurium product.
Yoo, Yang, Son and Song are considered to be analogous to the claimed invention because they are in the same field of semiconductor devices.
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to add ends of the conductive film in the second direction are aligned with an outer sidewall of the first region and an outer sidewall of the second region and the conductive film material as taught by Yoo.
Doing so would realize a connect structure with barrier layer to improve connect wires' performance and reliability and it is obvious to adjust the widths of the connect structure as matter of routine skill. (para. 0004, 0005, 0138). Here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (MPEP Chapter 2100-Section 2144.05-Optimization of Ranges).
Regarding claim 2, Song in view of Son, Yang and Yoo further teaches the semiconductor device according to claim 1, including the first crystal (Song: fig. 23, 130 on the left) and the second crystal (Song: 130 on the right).
Song in view of Son, Yang and Yoo fails to explicitly teach the first crystal has a layered structure in which a plurality of unit layers are stacked in the second direction, and the second crystal has a layered structure in which a plurality of unit layers are stacked in the second direction.
However, Song teaches, in a separate embodiment, the first crystal (fig. 20, diffusion barrier layer B20; para. 0124, similar to 130) has a layered structure (multilayer structure; para. 0124) in which a plurality of unit layers (the first 2D material layer b1 and the second 2D material layer b2 formed as a single layer; para. 0124) are stacked in the second direction (thickness direction, similar to horizontal direction of fig. 23), and the second crystal (B20) has a layered structure (multilayer structure) in which a plurality of unit layers (b1, b2) are stacked in the second direction (thickness direction).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to add the first/second crystal has a layered structure in which a plurality of unit layers are stacked in the second direction.
Doing so would realize a diffusion barrier layer with excellent diffusion barrier effects (Song: para. 0124).
Regarding claim 3, Song in view of Son, Yang and Yoo further teaches the semiconductor device according to claim 1, wherein the first crystal (Song: fig. 23, 130 on the left having a 2D crystal structure and Yang: fig. 2, 116 include hexagonal structures of molybdenum sulfide, tungsten sulfide; para. 0018) is a hexagonal crystal, and the second crystal is a hexagonal crystal (Song: 130 on the right having a 2D crystal structure and Yang: 116 include hexagonal structures).
Regarding claim 4, Song in view of Son, Yang and Yoo further teaches the semiconductor device according to claim 1, wherein the first crystal (Song: fig. 23, 130 on the left) is a two-dimensional crystal (Song: 130 having a 2D crystal structure; para. 0131), and the second crystal (Song: 130 on the right) is a two-dimensional crystal (Song: 130 having a 2D crystal structure; para. 0131).
Regarding claim 5, Song in view of Son, Yang and Yoo further teaches the semiconductor device according to claim 4, including the first crystal (Song: fig. 23, 130 on the left) and the second crystal (Song: 130 on the right).
Song in view of Son, Yang and Yoo fails to explicitly teach the first crystal includes a plurality of unit layers, the plurality of unit layers of the first crystal having two layers or more and ten layers or less, and the second crystal includes a plurality of unit layers, the plurality of unit layers of the second crystal having two layers or more and ten layers or less.
However, Song teaches, in a separate embodiment, the first crystal (fig. 20, diffusion barrier layer B20; para. 0124, similar to 130) includes a plurality of unit layers (the first 2D material layer b1 and the second 2D material layer b2 formed as a single layer; para. 0124), the plurality of unit layers of the first crystal having two layers or more and ten layers or less (two layers b1, b2), and the second crystal (B20) includes a plurality of unit layers (b1, b2), the plurality of unit layers of the second crystal having two layers or more and ten layers or less (two layers b1, b2).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to add the first/second crystal includes a plurality of unit layers, the plurality of unit layers of the first crystal having two layers or more and ten layers or less.
Doing so would realize a diffusion barrier layer with excellent diffusion barrier effects (Song: para. 0124).
Regarding claim 6, Song in view of Son, Yang and Yoo further teaches the semiconductor device according to claim 1, wherein a length of the first conductive layer (Song: fig. 23, width of 140 and adhesion layer) in the second direction (horizontal direction) is shorter than a length of the first conductive layer (Song: height of 140 and adhesion layer) in the third direction (vertical direction).
Regarding claim 7, Song in view of Son, Yang and Yoo further teaches the semiconductor device according to claim 1, wherein a length of the first region (Song: fig. 23, thickness of 130 on the left) in the second direction (horizontal direction) is shorter than a length of the first conductive layer (Song: width of 140 and adhesion layer) in the second direction (horizontal direction), and a length of the second region (Song: thickness of 130 on the right) in the second direction (horizontal direction) is shorter than the length of the first conductive layer (Song: width of 140 and adhesion layer) in the second direction (horizontal direction).
Regarding claim 8, Song in view of Son, Yang and Yoo further teaches the semiconductor device according to claim 1, wherein the first element (Song: fig. 23, 140 and adhesion layer includes Mo, W) and the second element (Song: 130 includes Mo, W) are the same element (Song: adhesion layers may include substantially the same metal element as the metal element included in the diffusion barrier layers; para. 0122).
Regarding claim 9, Song in view of Son, Yang and Yoo further teaches the semiconductor device according to claim 1, further comprising:
a third region (Song: fig. 23, diffusion barrier layer 130 on the bottom; para. 0132) disposed on a third surface side (bottom side) of the first conductive layer (Song: 140 and adhesion layer), the third region (Song: 130 on the bottom) containing the second element (Song: 130 includes Mo, W) and the third element (Song: 130 includes S, Se, Te), and the third region including a third crystal (Song: 130 having a 2D crystal structure; para. 0131).
Regarding claim 10, Song in view of Son, Yang and Yoo further teaches the semiconductor device according to claim 1,
wherein a length of the conductive film (Yoo: fig.5, width of 310) in the second direction (horizontal direction) is longer than a length of the first conductive layer (Yoo: width of 220) in the second direction (horizontal direction).
Regarding claim 13, Song in view of Son, Yang and Yoo further teaches the semiconductor device according to claim 1, including the first conductive layer (Song: fig. 23, 140 and adhesion layer).
Song in view of Son, Yang and Yoo fails to explicitly teach a second conductive layer electrically connected to the first conductive layer; and
a third conductive layer electrically connected to the first conductive layer.
However, Song teaches, in a separate embodiment, a second conductive layer (fig. 26, second electrode portion 370 in trench T31 on the right; para. 0141) electrically connected to the first conductive layer (370 in through-hole H31; para. 0141, similar to 140); and
a third conductive layer (first electrode portion 330 on the right; para. 0141) electrically connected to the first conductive layer (370).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to add a second conductive layer electrically connected to the first conductive layer; and a third conductive layer electrically connected to the first conductive layer.
Doing so would realize an electronic device with more functions (Song: para. 0139).
Regarding claim 21, Song in view of Son, Yang and Yoo further teaches the semiconductor device according to claim 10, wherein the conductive film (Yoo: fig.5, 310) is one of titanium, titanium nitride, tantalum, tantalum nitride, or tungsten nitride (Yoo: Ta, TaN, Ti, TiN; para. 0083).
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-10, 13 and 21 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZHIJUN XU whose telephone number is (571)270-3447. The examiner can normally be reached Monday-Thursday 9am-5pm ET.
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/ZHIJUN XU/Examiner, Art Unit 2818
/BRIAN TURNER/Examiner, Art Unit 2818