DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 03/16/2026 has been entered.
Response to Arguments
Applicant’s arguments with respect to the first barrier metal layer being thicker than the second barrier metal layer and the second barrier metal layer being the same thickness as the third barrier metal layer have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Song et al. (US 2021/0151432) and Jeon et al. (US 2020/0312844).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 21-25, 27-31, and 33-40 are rejected under 35 U.S.C. 103 as being unpatentable over Ragnarsson et al. (US 2017/0330801) in view of Song et al. (US 2021/0151432) and Jeon et al. (US 2020/0312844).
In reference to claim 21, Ragnarsson et al. (US 2017/0330801), hereafter “Ragnarsson,” discloses an integrated circuit semiconductor device, with reference to Figure 1N, comprising:
a first region 104 including first active fins 108 extending in a first direction and spaced apart from each other in a second direction perpendicular to the first direction, and first transistors including first gate electrodes 132 extending in the second direction on the first active fins and spaced apart from each other in the first direction;
a second region 106 arranged in contact with the first region in the second direction, wherein the second region comprises second active fins 110 extending in the first direction and spaced apart from each other in the second direction, and second transistors including second gate electrodes 130 extending in the second direction on the second active fins and spaced apart from each other in the first direction, paragraphs 66 and 106; and
metal dams 123 positioned at a boundary of the first region and the second region to physically separate the first gate electrodes and the second gate electrodes in the second direction, paragraphs 78 and 82-84,
wherein the metal dams, the first gate electrodes, and the second gate electrodes are electrically connected in the second direction, paragraphs 88 and 98 (high-k dielectric layer 126 not formed on sidewalls of 123),
wherein each metal dam of the metal dams is a metal dam pattern,
wherein, in the first region, first (buffer layer of 130) and second (barrier layer of 130) barrier metal layers are further formed on one sidewall of the metal dam pattern, paragraphs 91 and 103, and
wherein in the second region, a third barrier metal layer (single metal layer 128) is further formed on the other sidewall of the metal dam pattern, paragraph 90 and 91,
wherein the second barrier metal layer contacts the first gate electrode 132, paragraph 102,
wherein the third barrier metal layer contacts both the metal dam and the second gate electrode 130, (single metal layer 128 and high-k dielectric layer 126 not formed on sidewalls of 123, paragraphs 88 and 98), and
wherein top surfaces of the first and second barrier metal layers are coplanar with a top surface of the metal dam pattern, paragraph 105.
Ragnarsson does not disclose the first barrier metal layer is thicker than the second barrier metal layer, and the second barrier metal layer is the same thickness as the third barrier metal layer.
Song et al. (US 2021/0151432), hereafter “Song,” discloses an analogous semiconductor device including teaching a first barrier metal layer, 122G1 in Figure 2B, is thicker than the second barrier metal layer 124G1, paragraph 51.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the first barrier metal layer to be thicker than the second barrier metal layer.
One would have been motivated to do so in order to provide different work function adjusting layers to control the threshold voltages of the respective transistors, paragraphs 41 and 45.
Jeon et al. (US 2020/0312844), hereafter “Jeon,” discloses an analogous semiconductor device including teaching a second barrier metal layer 124U, in Figure 3A, is the same thickness as the third barrier metal layer 122, paragraphs 37 and 39.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the first barrier metal layer to be thicker than the second barrier metal layer, and the second barrier metal layer to be the same thickness as the third barrier metal layer.
One would have been motivated to do so in order to form the second and third barrier metal layers by the same forming process, paragraph 37.
In reference to claim 27, Ragnarsson discloses an integrated circuit semiconductor device, with reference to Figure 1N, comprising:
a first region 104 including first active fins 108 extending in a first direction and spaced apart from each other in a second direction perpendicular to the first direction, and first transistors including first gate electrodes 132 extending in the second direction on the first active fins and spaced apart from each other in the first direction;
a second region 106 arranged in contact with the first region in the second direction, wherein the second region comprises second active fins 110 extending in the first direction and spaced apart from each other in the second direction, and second transistors including second gate electrodes 130 extending in the second direction on the second active fins and spaced apart from each other in the first direction, paragraphs 66 and 106; and
metal dams 123 positioned at a boundary of the first region and the second region to physically separate the first gate electrodes and the second gate electrodes in the second direction, paragraphs 78 and 82-84,
wherein the metal dams, the first gate electrodes, and the second gate electrodes are electrically connected in the second direction, paragraphs 88 and 98 (high-k dielectric layer 126 not formed on sidewalls of 123),
wherein each metal dam of the metal dams is a metal dam pattern,
wherein, in the first region, first (buffer layer of 130) and second (barrier layer of 130) barrier metal layers are conformally formed on one sidewall of the metal dam pattern to the upper end of the metal dam pattern, paragraphs 91, 103, and 105;
wherein in the second region, a third barrier metal layer (single metal layer 128) is further formed on the other sidewall of the metal dam pattern, paragraph 90 and 91,
wherein the second barrier metal layer contacts the first gate electrode 132, paragraph 102,
wherein the third barrier metal layer contacts both the metal dam and the second gate electrode 130, (single metal layer 128 and high-k dielectric layer 126 not formed on sidewalls of 123, paragraphs 88 and 98).
Ragnarsson does not disclose the first barrier metal layer is thicker than the second barrier metal layer, and the second barrier metal layer is the same thickness as the third barrier metal layer.
Song discloses an analogous semiconductor device including teaching a first barrier metal layer, 122G1 in Figure 2B, is thicker than the second barrier metal layer 124G1, paragraph 51.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the first barrier metal layer to be thicker than the second barrier metal layer.
One would have been motivated to do so in order to provide different work function adjusting layers to control the threshold voltages of the respective transistors, paragraphs 41 and 45.
Jeon discloses an analogous semiconductor device including teaching a second barrier metal layer 124U, in Figure 3A, is the same thickness as the third barrier metal layer 122, paragraphs 37 and 39.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the first barrier metal layer to be thicker than the second barrier metal layer, and the second barrier metal layer to be the same thickness as the third barrier metal layer.
One would have been motivated to do so in order to form the second and third barrier metal layers by the same forming process, paragraph 37.
In reference to claims 22 and 28, Ragnarsson does not disclose the integrated circuit semiconductor device further comprises first nano-sheet stacked structures positioned on the first active fins and second nano-sheet stacked structures positioned on the second active fins, wherein the first barrier metal layer extends between adjacent ones of the first nano- sheet stacked structures.
Song discloses an analogous semiconductor device including teaching, with reference to Figure 2B, first nano-sheet stacked structures NS1 positioned on first active fins FA1 and second nano-sheet stacked structures NS2 positioned on the second active fins FA2, paragraphs 30 and 33,
wherein the first barrier metal layer 122G1 extends between adjacent ones of the first nano-sheet stacked structures, paragraph 39.
Ragnarsson does disclose in the embodiment of Figure 2, wherein the metal dams 123 are positioned between first nano-sheet stacked structures and second nano-sheet stacked structures in the second direction, paragraphs 116-118.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for first nano-sheet stacked structures to be positioned on the first active fins, and second nano-sheet stacked structures to be positioned on the second active fins, wherein the first barrier metal layer extends between adjacent ones of the first nano-sheet stacked structures. To do so would have merely been to apply a known technique to improve similar devices in the same way, KSR International Co. v. Teleflex Inc. (KSR), 550 U.S. 398, 82 USPQ2d 1385 (2007), MPEP 2143 I. C. In this case, applying the metal dams of the finfet embodiment of Figure 1 of Ragnarsson to the nano-sheet stacked fin transistor configured as in Song, as suggested by the embodiment of Figure 2 of Ragnarsson.
In reference to claims 23 and 29, Ragnarsson does not disclose the second barrier metal layer extends along surfaces of the first barrier metal layer without extending between the adjacent ones of the first nano-sheet stacked structures.
Song teaches the second barrier metal layer, 124 in Figure 2B, extends along surfaces of the first barrier metal layer 122 without extending between the adjacent ones of the first nano-sheet stacked structures NS1, paragraphs 39 and 40. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the second barrier metal layer to extend along surfaces of the first barrier metal layer without extending between the adjacent ones of the first nano-sheet stacked structures. One would have been motivated to do so in order to place different work function metal layers adjacent to different transistor types, paragraphs 41 and 45.
In reference to claims 24 and 30, Ragnarsson does not disclose the second barrier metal layer and the third barrier metal layer are formed of the same material.
Jeon teaches the second barrier metal layer, 124U in Figure 3A, and a third barrier metal layer,122 are formed of the same material, paragraph 37. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the second barrier metal layer and the third barrier metal layer to be formed of the same material. One would have been motivated to do so in order to concurrently form devices while placing different work function metal layers adjacent to different transistors to control threshold voltage, paragraphs 33 and 39.
In reference to claims 25 and 31, Jeon discloses the second barrier metal layer and the third barrier metal layer are formed of TiN, TiAlN, or TiAlC, paragraph 37, as does Ragnarsson, paragraphs 93 and 103.
In reference to claims 33 and 37, Ragnarsson discloses the first barrier metal layer and the second barrier metal layer on one sidewall of the metal dam pattern, paragraphs 91 and 103, and Song discloses the first barrier metal layer is a conformal film, paragraph 92, thicker than the second barrier metal layer, paragraph 51.
It results naturally from the combination of Ragnarsson and Song that the first barrier metal layer is thicker than the second barrier metal layer on one sidewall of the metal dam pattern.
In reference to claims 34 and 38, Jeon discloses the combined thickness T22 in Figure 3A, of the first and second barrier metal layers is greater than the thickness T21 of the third barrier metal layer, paragraph 39.
In reference to claims 35 and 39, Ragnarsson discloses the metal dam pattern comprises a vertical line shape in a cross section, Figure 1N.
In reference to claims 36 and 40, Song discloses the first barrier metal layer is thicker than the second barrier metal layer on the first nano-sheet stacked structures, paragraph 51.
Claims 26 and 32 are rejected under 35 U.S.C. 103 as being unpatentable over Ragnarsson et al. (US 2017/0330801) in view of Song et al. (US 2021/0151432) and Jeon et al. (US 2020/0312844) as applied to claims 21 and 27 above and further in view of Chang (KR 10-2009-0044837).
In reference to claims 26 and 32, Ragnarsson discloses the first transistors and the second transistors are surrounded by an isolation layer 102 formed on a substrate, paragraph 71, and wherein the metal dams are on an upper surface of the isolation layer, Figure 1P.
Ragnarsson does not disclose the metal dams contact an upper surface of the isolation layer.
Chang (KR 10-2009-0044837), a machine translation of which was provided with the Office Action of 03/13/2024 and is cited herein, discloses a semiconductor device including teaching transistors are surrounded by an isolation layer 32 in Figures 3 and 4, formed on a substrate, lines 88-91 (page 3), and metal dams, 37 in Figure 3 and 40, 41 in Figure 1, contact an upper surface of the isolation layer 32, lines 148-158 (page 4).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the first transistors and the second transistors to be surrounded by an isolation layer formed on a substrate, and the metal dams to contact an upper surface of the isolation layer. To do so would have merely been a simple substitution of one known element for another to obtain predictable results; KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385, (2007), MPEP 2143 I. B. In this case substituting one dam configuration depth for another.
Conclusion
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/BRYAN R JUNGE/Primary Examiner, Art Unit 2897
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