Prosecution Insights
Last updated: April 19, 2026
Application No. 17/696,767

DISPLAY PANEL WITH COMPENSATION STRUCTURES, METHOD FOR REPAIRING DISPLAY PANEL, AND DISPLAY APPARATUS

Non-Final OA §103
Filed
Mar 16, 2022
Examiner
CHA, GRACE YEH-EUN SAET
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Wuhan Tianma Microelectronics Co., Ltd.
OA Round
3 (Non-Final)
100%
Grant Probability
Favorable
3-4
OA Rounds
3y 5m
To Grant
99%
With Interview

Examiner Intelligence

Grants 100% — above average
100%
Career Allow Rate
20 granted / 20 resolved
+32.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
37 currently pending
Career history
57
Total Applications
across all art units

Statute-Specific Performance

§103
62.6%
+22.6% vs TC avg
§102
24.9%
-15.1% vs TC avg
§112
12.5%
-27.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 20 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 01/06/2026 has been entered. Response to Amendment Acknowledgment is made of the amendment filed 01/06/2026, in which: claims 1, 3-7, 14, and 25-26 are amended; claims 2 and 27 are cancelled; new claims 28-31 are added; claims 5-6, 10, 13, 16-20, and 22-23 stand withdrawn; and the rejection of the claims are traversed. Claims 1, 3-4, 7-9, 11-12, 14-15, 21, 24-26, and 28-31 are currently pending an Office action on the merits as follows. Claim Objections Claim 15 is objected to because of the following informalities: phrase "one of repair circuit columns" should read "repair circuit columns". Appropriate correction is required. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claims 1, 3-4, 7-9, 12, 14-15, 21, 24-26, and 28-31 are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (US Publication 20160218155) in view of Hwang et al. (US Publication 20150109189). Regarding independent claim 1, Park teaches a display panel (fig. 1, 110), comprising: a substrate (paragraph 0049); pixels (P) and signal lines (CL1-CLn), wherein the signal lines are scanning lines (paragraph 0052), the pixels and the signal lines are located at a side of the substrate (fig. 1), at least one of the pixels comprises a first pixel circuit (fig. 2, see figure below) and a light-emitting device (E), at least one of the signal lines extends in a first direction (fig. 2, CL1-CLn extends horizontally), and the signal lines are coupled to the first pixel circuits of the pixels (fig. 2); and PNG media_image1.png 462 799 media_image1.png Greyscale pixel repair structures (paragraph 0015, see figure below) comprising second pixel circuits (see figure below), and first compensation structures (fig. 2, DP), wherein the first compensation structures comprise at least one first compensation capacitor (fig. 7, Ccomp1), wherein the first compensation structures are coupled to the signal lines in a one- to-one correspondence (fig. 2, DP connected to CL1-CLn) and are disconnectable from their corresponding signal lines (paragraph 0120). Park does not teach at least one first repair assembly, at least one second repair assembly, wherein[[,]] in a direction perpendicular to a plane of the substrate, one of the at least one first repair assembly partially overlaps at least one signal line of the signal lines, and one of the at least one second repair assembly partially overlaps at least one of the light-emitting devices of the pixels; and wherein the at least one first repair assembly comprises a first repair line, the at least one second repair assembly comprises at least one second repair line, and one of the second pixel circuits comprises a first input terminal coupled to the first repair line, and an output terminal that is coupled to at least one of the at least one second repair line. Hwang teaches at least one first repair assembly (fig. 5, RTr and RLbj), at least one second repair assembly (RLaj), wherein[[,]] in a direction perpendicular to a plane of the substrate, one of the at least one first repair assembly partially overlaps at least one signal line of the signal lines (fig. 5, RLbj and RTr overlap SLi), and one of the at least one second repair assembly partially overlaps at least one of the light-emitting devices of the pixels (fig. 5, RLaj overlaps E); and wherein the at least one first repair assembly comprises a first repair line (RLbj), the at least one second repair assembly comprises at least one second repair line (RLaj), and one of the second pixel circuits (Ca) comprises a first input terminal (node between RLbj and RTr) coupled to the first repair line, and an output terminal (area where E and RLaj overlap) that is coupled to at least one of the at least one second repair line. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display apparatus of Park and the first and second repair assemblies of Hwang in order to create “a path for transferring a driving current to an emitting device of an emitting pixel EP that is coupled in a repair process” (Hwang paragraph 0059). Regarding dependent claim 3, Park further teaches the display panel according to claim [[2]]1, wherein one of the at least one first compensation capacitor comprises a first electrode plate coupled to one of the signal lines (fig. 7, first electrode plate of Ccomp1 coupled to DNc but can be rearranged to be coupled to GWLn per MPEP 2144.04), and a second electrode plate coupled to a first constant-voltage signal line (fig. 7, second electrode plate of Ccomp1 coupled to ELVDD); and the first constant-voltage signal line is configured to transmit a constant-voltage signal (paragraph 0097, “first power voltage ELVDD may be a high-level voltage (e.g., a predetermined high-level voltage)”). Regarding dependent claim 4, Park further teaches the display panel according to claim [[2]]1, wherein one of the at least one first compensation capacitor comprises a first electrode plate and a second electrode plate (fig. 7); and the first electrode plate of one first compensation capacitor of the first compensation capacitors of the first compensation structures is floating (fig. 7, first electrode plate of Ccomp1 commented to node DNc allowing it to be in a floating state), and the second electrode plate of the one first compensation capacitor is coupled to a first constant-voltage signal line (ELVDD) configured to transmit a first constant-voltage signal (paragraph 0097, “first power voltage ELVDD may be a high-level voltage (e.g., a predetermined high-level voltage)”). Regarding dependent claim 7, Park further teaches the display panel according to claim [[2]]1, wherein the first compensation structures further comprise at least one dummy pixel circuit (fig. 7, DC2) located at a side of the first compensation capacitor close to the first pixel circuit (fig. 2), wherein each of the at least one dummy pixel circuit is configured to not emit light and not display images (paragraph 0060). Regarding dependent claim 8, Hwang further teaches the display panel according to claim 1, wherein the first repair line is located in a layer different from the signal lines (paragraph 0074); and the first repair line partially overlaps at least one of the signal lines in the direction perpendicular to the plane of the substrate (fig. 5, RLbj partially overlaps SLn+1 and SLi vertically). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display device of Park and the first repair line of Hwang per the reason(s) stated above in claim 1. Regarding dependent claim 9, Hwang further teaches the display panel according to claim 1, wherein the at least one first repair assembly further comprises a first transistor (fig. 5, RTr), and one of the signal lines partially overlaps the first transistor in the direction perpendicular to the plane of the substrate (fig. 5); and the first repair line is coupled to one of the signal lines through the first transistor (fig. 5, RLbj coupled to SLi via gate electrode of RTr). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display device of Park and the first transistor of Hwang per the reason(s) stated above in claim 1. Regarding dependent claim 12, Park further teaches the display panel according to claim 1, wherein at least two of the first pixel circuits are arranged in one of pixel circuit rows in a second direction (fig. 2), and the second direction intersects the first direction (see figure below). PNG media_image2.png 443 636 media_image2.png Greyscale Hwang further teaches one of the at least one second repair assembly overlaps at least two light-emitting devices of at least two pixels of the pixels in the direction perpendicular to the plane of the substrate (fig. 2, RLa of second repair assembly overlaps connectable wire 11 of light-emitting devices E vertically), wherein at least two first pixel circuits of the at least two pixels are located in one of the pixel circuit rows (fig. 2). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display device of Park and the second repair assembly of Hwang per the reason(s) stated above in claim 1. Regarding independent claim 14, Park teaches a display panel (fig. 1, 110), comprising: a substrate (paragraph 0049); pixels (fig. 1, P) and signal lines (CL1-CLn), wherein the pixels and the signal lines are located at a side of the substrate (fig. 1), at least one of the pixels comprises a first pixel circuit (see marked figure corresponding to claim 1) and a light-emitting device (fig. 2, E), at least one of the signal lines extends in a first direction (CL1-CLn extend horizontally), and the signal lines are coupled to the first pixel circuits of the pixels (fig. 2); and pixel repair structures (paragraph 0015, see marked figure corresponding to claim 1) comprising second pixel circuits (see marked figure corresponding to claim 1), and first compensation structures (fig. 2, DP), wherein the first compensation structures comprise at least one first compensation capacitor (fig. 7, Ccomp1), wherein the first compensation structures are coupled to the signal lines in a one-to-one correspondence with the signal lines (fig. 2, DP connected to CL1-CLn) and are disconnectable from their corresponding signal lines (paragraph 0120); wherein at least two of the first pixel circuits are arranged in one of pixel circuit rows in a second direction (fig. 2), and the second direction intersects the first direction (see marked figure corresponding to claim 12). Park does not teach at least one first repair assembly, at least one second repair assembly, wherein in a direction perpendicular to a plane of the substrate, one of the at least one first repair assembly partially overlaps at least one signal line of the signal lines, and one of the at least one second repair assembly partially overlaps at least one of the light-emitting devices of the pixels; and wherein the at least one first repair assembly comprises a first repair line, the at least one second repair assembly comprises at least one second repair line, and one of the second pixel circuits comprises a first input terminal coupled to the first repair line, and an output terminal that is coupled to at least one of the at least one second repair line; one of the at least one second repair assembly overlaps at least two light-emitting devices of at least two pixels of the pixels in the direction perpendicular to the plane of the substrate, wherein at least two first pixel circuits of the at least two pixels are located in one of the pixel circuit rows; and wherein the first repair line is connected to the first input terminals of at least two second pixel circuits of the second pixel circuits. Hwang teaches at least one first repair assembly (fig. 5, RTr and RLbj), at least one second repair assembly (RLaj), wherein in a direction perpendicular to a plane of the substrate, one of the at least one first repair assembly partially overlaps at least one signal line of the signal lines (fig. 5, RLbj and RTr overlap SLi), and one of the at least one second repair assembly partially overlaps at least one of the light-emitting devices of the pixels (fig. 5, RLaj overlaps E); and wherein the at least one first repair assembly comprises a first repair line (RLBj), the at least one second repair assembly comprises at least one second repair line (RLaj), and one of the second pixel circuits comprises a first input terminal (node between RLbj and RTr) coupled to the first repair line, and an output terminal (area where E and RLaj overlap) that is coupled to at least one of the at least one second repair line; one of the at least one second repair assembly overlaps at least two light-emitting devices of at least two pixels of the pixels in the direction perpendicular to the plane of the substrate (fig. 2, RLa of second repair assembly overlaps connectable wire 11 of light-emitting devices E vertically), wherein at least two first pixel circuits of the at least two pixels are located in one of the pixel circuit rows (fig. 2); and wherein the first repair line is connected to the first input terminals of at least two second pixel circuits of the second pixel circuits (fig. 2). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display apparatus of Park and the first and second repair assemblies of Hwang in order to create “a path for transferring a driving current to an emitting device of an emitting pixel EP that is coupled in a repair process” (Hwang paragraph 0059). PNG media_image3.png 568 765 media_image3.png Greyscale Regarding dependent claim 15, Hwang further teaches the display panel according to claim 14, wherein at least two of the second pixel circuits are arranged in one of repair circuit columns in the first direction (see figure below), and the repair circuit columns are connected to the first repair line (fig. 2). Regarding dependent claim 21, Park further teaches the display panel according to claim 1, wherein the display panel has a display region (fig. 1, AA) and a non-display region (DA), the light-emitting device (fig. 2, E) and the first pixel circuits (see marked figure corresponding to claim 1) are located in the display region (fig. 1, P which contains C of first pixel circuit located in AA), and the second pixel circuits (see marked figure corresponding to claim 1) are located in the non-display region (fig. 1, P which contains C of second pixel circuit located in AA but can be rearranged to be located in DA per MPEP 2144.04). Hwang teaches at least two of the second pixel circuits are arranged in a repair circuit column in the first direction (see marked figure corresponding to claim 15). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display panel of Park and the repair circuit column of Hwang per the reason(s) stated above in claim 1. Regarding dependent claim 24, Hwang further teaches the display panel according to claim 1, wherein the display panel has a non-display region (fig. 1, DA) where the first compensation structures are located (fig. 1, DC contains compensation structures of Park). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display panel of Park and the non-display region of Hwang per the reason(s) stated above in claim 1. Regarding dependent claim 25, Park further teaches the display panel according to claim 1, wherein at least two of the second pixel circuits are arranged in a same direction as the direction along which the signal lines each extend (see marked figure corresponding to claim 1), and the signal lines are data lines or scanning lines (paragraph 0052). Regarding independent claim 26, Park teaches a display apparatus (fig. 1, 100) comprising: a display panel (110), wherein the display panel comprises: a substrate (paragraph 0049); pixels (P) and signal lines (CL1-CLn), wherein the signal lines are scanning lines (paragraph 0052), the pixels and the signal lines are located at a side of the substrate (fig. 1), at least one of the pixels comprises a first pixel circuit (see marked figure corresponding to claim 1) and a light-emitting device (fig. 2, E), at least one of the signal lines extends in a first direction (fig. 2, CL1-CLn extend horizontally), and the signal lines are coupled to the first pixel circuits of the pixels (fig. 2); and pixel repair structures (paragraph 0015, see marked figure corresponding to claim 1) comprising second pixel circuits (see marked figure corresponding to claim 1), and first compensation structures (fig. 2, DP), wherein the first compensation structures comprise at least one first compensation capacitor (fig. 7, Ccomp1), wherein the first compensation structures are coupled to the signal lines in a one-to-one correspondence with the signal lines (fig. 2, DP connected to CL1-CLn) and are disconnectable from their corresponding signal lines (paragraph 0120). Park does not teach at least one first repair assembly, at least one second repair assembly, wherein[[,]] in a direction perpendicular to a plane of the substrate, one of the at least one first repair assembly partially overlaps at least one signal line of the signal lines, and one of the at least one second repair assembly partially overlaps at least one of the light-emitting devices of the pixels; and wherein the at least one first repair assembly comprises a first repair line, the at least one second repair assembly comprises at least one second repair line, and one of the second pixel circuits comprises a first input terminal coupled to the first repair line, and an output terminal that is coupled to at least one of the at least one second repair line. Hwang teaches at least one first repair assembly (fig. 5, RTr and RLbj), at least one second repair assembly (RLaj), wherein[[,]] in a direction perpendicular to a plane of the substrate, one of the at least one first repair assembly partially overlaps at least one signal line of the signal lines (fig. 5, RLbj and RTr overlap SLi), and one of the at least one second repair assembly partially overlaps at least one of the light-emitting devices of the pixels (fig. 5, RLaj overlaps E); and wherein the at least one first repair assembly comprises a first repair line (RLbj), the at least one second repair assembly comprises at least one second repair line (RLaj), and one of the second pixel circuits (Ca) comprises a first input terminal (node between RLbj and RTr) coupled to the first repair line, and an output terminal (area where E and RLaj overlap) that is coupled to at least one of the at least one second repair line. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display apparatus of Park and the first and second repair assemblies of Hwang in order to create “a path for transferring a driving current to an emitting device of an emitting pixel EP that is coupled in a repair process” (Hwang paragraph 0059). Regarding dependent claim 28, Park teaches the display panel according to claim 14, wherein the first compensation structures comprise at least one first compensation capacitor (fig. 7, Ccomp1). Regarding dependent claim 29, Park teaches the display panel according to claim 28, wherein one of the at least one first compensation capacitor comprises a first electrode plate (fig. 7, first electrode plate of Ccomp1 coupled to DNc but can be rearranged to be coupled to GWLn per MPEP 2144.04) coupled to one of the signal lines, and a second electrode plate coupled to a first constant-voltage signal line (fig. 7, second electrode plate of Ccomp1 coupled to ELVDD); and the first constant-voltage signal line is configured to transmit a constant-voltage signal (paragraph 0097, “first power voltage ELVDD may be a high-level voltage (e.g., a predetermined high-level voltage)”). Regarding dependent claim 30, Park teaches the display panel according to claim 28, wherein one of the at least one first compensation capacitor comprises a first electrode plate and a second electrode plate (fig. 7); and the first electrode plate of one first compensation capacitor of the first compensation capacitors of the first compensation structures is floating (fig. 7, first electrode plate of Ccomp1 commented to node DNc allowing it to be in a floating state), and the second electrode plate of the one first compensation capacitor is coupled to a first constant-voltage signal line (ELVDD) configured to transmit a first constant-voltage signal (paragraph 0097, “first power voltage ELVDD may be a high-level voltage (e.g., a predetermined high-level voltage)”). Regarding dependent claim 31, Park teaches the display panel according to claim 28, wherein the first compensation structures further comprise at least one dummy pixel circuit (fig. 7, DC2) located at a side of the first compensation capacitor close to the first pixel circuit (fig. 2), wherein each of the at least one dummy pixel circuit is configured to not emit light and not display images (paragraph 0060). Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Hwang as applied to claim 1 above, and further in view of Park et al. (US Publication 20150294618, herein after referred to as Park 618). Regarding dependent claim 11, Hwang further teaches the display panel according to claim 1, wherein the light-emitting device comprises a first electrode, a light-emitting layer, and a second electrode that are stacked (paragraph 0070). Hwang in view of Park does not teach the at least one second repair assembly further comprises a second repair spacer located in a different layer from the at least one second repair line; and the second repair spacer has one end overlapping the first electrode, and another end overlapping one of the at least one second repair line. Park 618 teaches the at least one second repair assembly further comprises a second repair spacer (fig. 5B CM) located in a different layer from the at least one second repair line (fig. 5, repair line RLi located below spacer CM); and the second repair spacer has one end overlapping the first electrode (paragraph 0109, “contact metal CM in the via hole area VA contact the anode electrode of the pixel P”), and another end overlapping one of the at least one second repair line (fig. 5B). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display panel of Hwang in view of Park and the second repair spacer of Park 618 in order to form a parasitic capacitance between the anode electrode of the pixels P and the repair line RLi (Park 618 paragraph 0109). Response to Arguments Applicant’s arguments with respect to claims 1, 3-4, 7-9, 11-12, 14-15, 21, 24-26, and 28-31 have been fully considered but are moot in view of the new grounds of rejection (Amendments). Applicant’s arguments filed 01/06/2026 have been fully considered but are not persuasive. Applicant argues on pages 12 and 14 of the instant Remarks: “In particular, in amended claim 1 of the present application, the signal lines are scanning lines… In Lee, the compensation capacitors (CC1-CCm) are explicitly and solely coupled to data lines (DL1-DLm) (see paragraph [0099] of the specification of Lee); and there is no disclosure or suggestion of coupling between compensation structures and scanning lines…Hwang provides no disclosure of RLa branching, splitting, or otherwise connecting to multiple DCs. To the contrary, Hwang's FIG. 2 visually corroborates this strict one-to-one configuration, with no indication of any RLa establishing connections to more than one DC. Such teachings of Hwang directly conflict with the subject matter of amended independent claim 14, which recites a single first repair line connected to the first input terminals of at least two second pixel circuits.” However, as stated above, Park discloses wherein the signal lines are scanning lines (paragraph 0052) and wherein the first compensation structures (fig. 2, DP) comprise at least one first compensation capacitor (fig. 7, Ccomp1), are coupled to the signal lines in a one-to-one correspondence with the signal lines (fig. 2, DP connected to CL1-CLn) and are disconnectable from their corresponding signal lines (paragraph 0120). Therefore, Park, Hwang, and Park 610 disclose or suggest the subject matter of amended independent claims 1, 14, and 26, along with their respective dependent claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to GRACE Y CHA whose telephone number is (703)756-5393. The examiner can normally be reached Monday - Thursday 8:00 am - 5:00 pm and every other Friday 8:00 am - 4:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at (469) 295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GRACE CHA/Examiner, Art Unit 2897 /JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897
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Prosecution Timeline

Mar 16, 2022
Application Filed
Mar 19, 2025
Non-Final Rejection — §103
Jun 26, 2025
Response Filed
Sep 02, 2025
Final Rejection — §103
Dec 02, 2025
Response after Non-Final Action
Jan 05, 2026
Request for Continued Examination
Jan 22, 2026
Response after Non-Final Action
Jan 23, 2026
Non-Final Rejection — §103 (current)

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