Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 1 and 33 are allowable. The restriction requirement set forth in the Office action mailed on July 10, 2024, has been reconsidered in view of the allowability of claims to the elected invention pursuant to MPEP § 821.04(a). The restriction requirement is hereby withdrawn as to any claim that requires all the limitations of an allowable claim. Specifically, the restriction requirement of claim 18 and 34-38 is withdrawn.
In view of the above noted withdrawal of the restriction requirement, applicant is advised that if any claim presented in a divisional application is anticipated by, or includes all the limitations of, a claim that is allowable in the present application, such claim may be subject to provisional statutory and/or nonstatutory double patenting rejections over the claims of the instant application.
Once a restriction requirement is withdrawn, the provisions of 35 U.S.C. 121 are no longer applicable. See In re Ziegler, 443 F.2d 1211, 1215, 170 USPQ 129, 131-32 (CCPA 1971). See also MPEP § 804.01.
Allowable Subject Matter
Claims 1-6, 8-18, 20-21 and 33-38 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding Claims 1 and 33, Bhalla (US 20160380117 A1), being the most relevant prior art of record, teaches a power transistor device (see Figs. 4 and 6), comprising:
a drift layer (240) having a first conductivity type (n-type);
a mesa (shown, see protruding portion in Fig. 4) on the drift layer, the mesa comprising a channel region (230 and 205) on the drift layer and a source layer (201) on the channel region, the channel region and the source layer having the first conductivity type; and
a gate region (p+ gate, 202) in the mesa (shown being at least partially in the mesa in Fig. 4) adjacent the channel region, the gate region having a second conductivity type (p-type) opposite the first conductivity type;
wherein the channel region comprises a deep conduction region (“c”, see Fig. 6 annotated below and [0038]) and a shallow conduction region (“b”, see annotated below) between the deep conduction region and the gate region (shown Fig. 4);
wherein the deep conduction region has a first doping concentration of a first conductivity type dopant ions (n-type, see below), and the shallow conduction region has a second doping concentration (shown below) of the first conductivity type dopant ions that is greater than the first doping concentration.
Bhalla further teaches an intermediate conduction region (a region defined between the shallow conduction region and the deep conduction region below) between the deep conduction region and the shallow conduction region which has a third doping concentration of the first conductivity type dopant ions (see graph below) that is between the first doping concentration and the second doping concentration;
Wherein the shallow conduction region, the intermediate conduction region and the deep conduction region are arranged in a direction (horizontal, see annotated below) that is perpendicular to a direction of current flow through the channel region (vertical) from the source layer to the drift layer.
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The dopant profile of Bhalla is a continuous dopant profile, and thus Bhalla does not explicitly teach a multiple-step dopant profile in the channel region formed by the shallow conduction region, the intermediate conduction region, and the deep conduction region.
Shimizu (US 20100163935 A1) teaches a similar semiconductor device (see Fig. 26) wherein a cross-section A-A’ shown in Fig. 27 illustrates a stepwise dopant profile of a deep conduction region and shallow conduction region of a channel region (see also [0122]).
However, the prior art does not explicitly teach or suggest in any combination a multiple-step dopant profile showing a distinct shallow conduction region, intermediate conduction region, and deep conduction region. As such, claims 1 and 33 are deemed patentable over the prior art. Claims 2-6, 8-18, 20-21 and 34-38 are further deemed patentable due to their dependence on claims 1 and 33 respectfully.
As allowable subject matter has been indicated, applicant's reply must either comply with all formal requirements or specifically traverse each requirement not complied with. See 37 CFR 1.111(b) and MPEP § 707.07(a).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 39-41 are rejected under 35 U.S.C. 103 as being unpatentable over Bhalla (US 20160380117 A1) in further view of Ritenour (US 20110291107 A1).
Regarding Claim 39, Bhalla teaches a power transistor device (see Fig. 4), comprising:
a drift layer (240) having a first conductivity type (n-type);
a mesa on the drift layer (shown Fig. 4), the mesa comprising a channel region (205 and 230) on the drift layer and a source layer (201) on the channel region, the channel region and the source layer having the first conductivity type; and
a gate region (202) in the mesa adjacent the channel region (shown Fig. 4), the gate region having a second conductivity type (p-type) opposite the first conductivity type;
a breakdown adjustment region (see annotated figure above) in the mesa between the channel region and the gate region, the breakdown adjustment region having the first conductivity type;
wherein the channel region has a first doping concentration (portion corresponding to the peak in Fig. 6, see also annotated below) and wherein the breakdown adjustment region has a second doping concentration that is less than the first doping concentration (see annotated below).
Bhalla does not explicitly teach that the breakdown adjustment region separates the gate region from the source layer.
Ritenour teaches a vertical JFET device analogous to that of Bhalla, wherein a graded dopant profile runs below, on a side of, and above a gate region (see also figs. 2 and 3B).
It would be obvious to one of ordinary skill in the art prior to the effective filing date of the instant application to modify the region 205 shown in Fig. 9 of Bhalla to further extend between a top portion of the p-type gate region and a bottom of the n+ source region, thus creating a junction with reduced implant damage caused by a direct n+ to p+ interface (see also [0046]).
Specifically, this modification would teach that the breakdown adjustment layer within the conductive region 205 is above the gate region, separating the gate region from the source layer (shown Fig. 2 of Ritenour).
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Regarding Claim 40, Bhalla as modified by Ritenour teaches the power transistor device of Claim 39, wherein the channel region comprises a deep conduction region (see annotated above) and a shallow conduction region between the deep conduction region and the breakdown adjustment region (see annotated above);
wherein the shallow conduction region has the first doping concentration and the deep conduction region has a third doping concentration that is less than the first doping concentration (as shown in Fig. 6, see also annotated above).
Regarding Claim 41, Bhalla as modified by Ritenour teaches the power transistor device of Claim 39, wherein the breakdown adjustment region is above and below the gate region in the mesa (as modified by Ritenour), and on a side of the gate region adjacent the channel region in the mesa.
Response to Arguments
Applicant's arguments in the response filed June 6, 2025 regarding claim 39 have been fully considered but they are not persuasive, as previously indicated in the response to arguments mailed on November 3, 2025.
Applicant argued that the doping concentration of Ritenour is lower in a channel region than in a breakdown adjustment region as evidenced by Fig. 3A of Ritenour, however Fig. 3A is drawn to an embodiment of a device having a p+/n+ junction (see [0046]). Furthermore, the device of Fig. 2 of Ritenour as applied to the device of Bhalla would maintain a higher dopant profile in a channel region as referenced in the annotated figure of Bhalla above, while further implementing the breakdown adjustment region between a bottom surface of the source region and upper surface of the gate region as suggested by the teachings of Ritenour. Examiner respectfully notes that one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986).
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CASEY PAUL BOATMAN whose telephone number is (703)756-4778. The examiner can normally be reached M-F 7:30 AM - 5:30 PM ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached on (571)270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/C.P.B./ Examiner, Art Unit 2893 /Britt Hanley/Supervisory Patent Examiner, Art Unit 2893
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