DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 11/5/2025 has been entered.
Status of Claims
Claims 1-2 and 5-15 are pending.
Claims 3-4 are cancelled.
Claims 10-15 are withdrawn.
Claims 1, 5 and 12 are currently amended.
Claims 2 and 6-9 are previously presented.
Claims 1-2 and 5-9 are rejected herein.
Response to Arguments
In view of Applicant’s amendments filed 11/5/25, the objections to the drawings and the rejections to the claims under 35 U.S.C. 112 in the prior Office Action dated 09/16/2025 are withdrawn.
Otherwise, Applicant's arguments filed 11/5/25 have been fully considered but they are not persuasive.
With respect to Applicant’s arguments regarding claim 1 as amended, the new grounds of the rejections herein below refer to NPL1 (S. Arulkumaran, T. Egawa, H. Ishikawa, T. Jimbo; Characterization of different-Al-content AlxGa1-xN/GaN heterostructures and high-electron-mobility transistors on sapphire. J. Vac. Sci. Technol. B 1 March 2003; 21 (2): 888-894). NPL1 discloses an AlxGa1-xN/GaN heterostructure where the percentage of Al is between 20% and 40%. Applicant’s arguments fail to address the teachings NPL1.
Notably, NPL1 recognizes that the amount of Al in an AlxGa1-xN/GaN heterostructure is a result-effective variable (see, e.g., section III.B. “Electrical characteristics,” pages 890-892). Moreover, NPL1 explicitly teaches AlxGa1-xN/GaN heterostructures having Al contents of 27% and 34% (see, e.g., Abstract) which are in the claimed range of between 20% and 40%.
Applicant has also failed to demonstrate the criticality of the claimed range or that any “unexpected” results are achieved. FIG. 4 of Applicant’s specification appears to show VT for examples of Al at 20%, 30% and 40%. However, these are three finite examples within the claimed range. Applicant has not demonstrated that these results are unexpected or that Al percentages outside the claimed range somehow result in an inoperable device or a device that is significantly inferior or that would function significantly different compared to a device having Al percentages within the claimed range. Indeed, it appears from Applicant’s data (see, e.g. FIG. 4) that an Al percentage even greater than 40% (i.e., greater than the upper limit of the claimed range) would result in yet and even greater VT. In Applicant’s own words the claimed range is characterized as a “good compromise” in view of various factors (see, e.g., paragraph [0062] of Applicant’s specification), i.e., routine optimization. In any event, NPL1 teaches AlxGa1-xN/GaN heterostructures having Al contents of 27% and 34%, which read on the claimed range of between 20% and 40%. NPL1 further recognizes that the percentage of Al content in AlxGa1-xN/GaN heterostructures is a result-effective variable, e.g., with respect to 2DEG mobility.
In any event, it would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made the AlGaN channel layer (103) of Hwang (US 20200388702 A1) wherein the percentage of aluminium was 27% or 34% as taught by NPL1 (i.e., between 20% and 40% as claimed) according to known methods to yield predictable results, for example, to achieve a AlxGa1-xN/GaN heterostructure that exhibits a desired 2DEG mobility that can coexist with a large carrier density. See, e.g., NPL1 section III.B. “Electrical characteristics,” page 890, column 2 and page 891, column 2.
Additionally, in response to applicant's argument that the references fail to show certain features of the invention, it is noted that the feature upon which applicant relies (i.e., that the “threshold voltage is ‘much greater than 5 V’”) is not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
Finally, Applicant argues that dependent claims 2, 5 and 8-9 are allowable “by virtue of their dependency from claim 1 and for the additional features recited therein.” Remarks, page 12. This argument is not persuasive. First, claim 1 has not been found allowable and accordingly dependance from claim 1 is not dispositive of allowability. Second, Applicant fails to identify with any particularity how any additional features or limitations recited in any of the dependent claims further distinguishes such claims over the prior art of record nor does Applicant allege any specific error with respect to the rejection of any dependent claim.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-2 and 6-9 are rejected under 35 U.S.C. 103 as being unpatentable over Hwang (US 20200388702 A1) in view of NPL1 (S. Arulkumaran, T. Egawa, H. Ishikawa, T. Jimbo; Characterization of different-Al-content AlxGa1-xN/GaN heterostructures and high-electron-mobility transistors on sapphire. J. Vac. Sci. Technol. B 1 March 2003; 21 (2): 888-894).
Regarding claim 1, Hwang discloses (see generally, e.g., FIGS. 1 and 9):
A field-effect transistor (100, 200a) comprising:
- a III-N semiconductor layer (101) comprising a first face (upper face) and a second face (lower face) opposite the first face (upper face);
- a drift layer (102) disposed on the first face (upper face) of the III-N semiconductor layer (101);
- a channel layer (103) disposed on and in contact with the drift layer (102), the channel layer (103) consisting of p-doped or unintentionally doped aluminium gallium nitride (AlGaN) (paragraphs [0068]-[0069]);
- a gate structure (106) extending to the drift layer (102) through the channel layer (103);
- a source electrode (108) disposed on the channel layer (103); and
- a drain electrode (107) disposed on the second face (lower face) of the III-N semiconductor layer (101);
wherein the first face (upper face) of the III-N semiconductor layer (101) has a polarity of the nitrogen type (paragraph [0077]),
wherein the drift layer (102) is made of n-doped gallium nitride (GaN) (paragraph [0068]), and
wherein the channel layer (103) forms a heterostructure (paragraph [0069]) with the drift layer (102).
Hwang does not explicitly disclose wherein the aluminium gallium nitride (AlGaN) of the channel layer has a percentage of aluminium comprised between 20% and 40%.
However, in analogous art, NPL1 disclose an AlxGa1-xN/GaN heterostructure with Al percentages of 27% and 34%. See Abstract. NPL1 further teaches that the 2DEG mobility of the AlxGa1-xN/GaN heterostructure is dependent on the Al content. See, e.g., section III.B. “Electrical characteristics,” page 890, column 2. NPL1 also teaches that the amount of Al content in an AlxGa1-xN/GaN heterostructure can have an effect on the conduction band discontinuity, piezoelectric effect and carrier confinement and can allow “a high 2DEG mobility to coexist with a large carrier density.” Section III.B. “Electrical characteristics,” page 891, column 2.
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made the AlGaN channel layer (103) of Hwang wherein the percentage of aluminium was 27% or 34% as taught by NPL1 (i.e., between 20% and 40% as claimed) according to known methods to yield predictable results, for example, to achieve a AlxGa1-xN/GaN heterostructure that exhibits a desired 2DEG mobility that can coexist with a large carrier density.
Moreover, the percentage of aluminium in an AlxGa1-xN/GaN heterostructure is recognized as a result-effective variable (see, e.g., NPL1).
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made the aluminium gallium nitride (AlGaN) channel layer (103) of Hwang with a percentage of aluminium comprised between 20% and 40% according to known methods to yield predictable results, for example, as a result of routine optimization using a known result-effective variable to achieve a desired combination of and/or trade-off between parameters, e.g., electron mobility. See, e.g., MPEP §2144.05(II). Additionally, Applicant has not established the criticality of the claimed range nor demonstrated that the claimed range produces any unexpected results. See, e.g., MPEP §2144.05(III)(A). On the contrary, Applicant merely submits that an aluminium concentration comprised between 20% and 40% constitutes a “good compromise” (i.e., along with a channel layer thickness comprised between 10 nm and 20 nm) between certain competing considerations (i.e., threshold voltage, facility of production and current leakage). See, e.g., paragraph [0062] of Applicant’s specification.
Regarding claim 2, Hwang in view of NPL1 as applied to claim 1 discloses the field-effect transistor according to claim 1.
Hwang further discloses wherein the III-N semiconductor layer (101) is made of gallium nitride (GaN) or aluminium gallium nitride (AlGaN) (paragraph [0068]).
Regarding claim 6, Hwang in view of NPL1 as applied to claim 2 discloses the field-effect transistor according to claim 2.
Hwang further discloses wherein the drift layer (102) is made of n-doped aluminium gallium nitride (AlGaN) (paragraph [0068]).
Regarding claim 7, Hwang in view of NPL1 as applied to claim 2 discloses the field-effect transistor according to claim 2.
Hwang further discloses wherein the drift layer (102) is made of n-doped aluminium gallium nitride (AlGaN) (paragraph [0068]) and the channel layer (103) has a percentage of aluminium greater than that of the drift layer (102).
Note, paragraph [0093] expressly teaches that “the drift region 102 may include GaN, and may include … a small amount of Al” and the channel layer (103) is made of aluminium gallium nitride (AlGaN) (see, e.g., paragraph [0094] – “the channel region 103 may include AlxGa1-xN (0≤x≤1)”) and the channel layer (103) has a percentage of aluminium greater than that of the drift layer (102) (see, e.g., FIG. 10).
Regarding claim 8, Hwang in view of NPL1 as applied to claim 1 discloses the field-effect transistor according to claim 1.
Hwang also discloses the field-effect transistor (100, 200a) further comprising a source contact layer (104) disposed between the channel layer (103) and the source electrode (108).
Regarding claim 9, Hwang in view of NPL1 as applied to claim 8 discloses the field-effect transistor according to claim 8.
Hwang further discloses wherein the source contact layer (104) is made of n-type doped gallium nitride (GaN) (paragraph [0068]).
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Hwang in view of NPL1 as applied to claim 1 above, and further in view of Chowdhury (US 20170229569 A1).
Regarding claim 5, Hwang in view of NPL1 as applied to claim 1 discloses the field-effect transistor according to claim 1.
Hwang does not explicitly disclose wherein the channel layer has a thickness comprised between 10 nm and 20 nm.
However, in analogous art, Chowdhury (see, e.g., FIG. 2) discloses a channel layer (20) having a thickness comprised between 10 nm and 20 nm (see, e.g., paragraph [0060]).
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made the channel layer (103) of Hwang with a thickness comprised between 10 nm and 20 nm as taught by Chowdhury according to known methods to yield predictable results, for example, to achieved a suitably robust and/or stable channel layer while maintaining a suitably thin device.
Claims 1-2, 5 and 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Applicant Admitted Prior Art (hereinafter “AAPA” – see, e.g., FIG. 1 of the present specification along with paragraphs [0002]-[0009] and [0029]) in view of Tanaka (EP 1587147 A2), Oka ("1.8 mΩ·cm2 vertical GaN-based trench metal-oxide-semiconductor field-effect transistors on a free-standing GaN substrate for 1.2-kV-class operation," Tohru Oka et al., Appl. Phys. Express 8, 054101, 2015), Hwang (US 20200388702 A1), Chowdhury (US 20170229569 A1) and NPL1.
Regarding claim 1, AAPA discloses (see generally, e.g., FIG. 1 and paragraphs [0002]-[0009] and [0029]):
A field-effect transistor (10) comprising:
- a III-N semiconductor layer (11) comprising a first face (11a) and a second face (11b) opposite the first face;
- a drift layer (12) disposed on the first face (11a) of the III-N semiconductor layer (11);
- a channel layer (13) disposed on and in contact with the drift layer (12);
- a gate structure (17a, 17b – hereinafter collectively “17”) extending to the drift layer (12) through the channel layer (13);
- a source electrode (15) disposed on the channel layer (13); and
- a drain electrode (16) disposed on the second face (11b) of the III-N semiconductor layer (11);
wherein the drift layer (12) is made of n-doped gallium nitride (GaN) (paragraph [0008]).
AAPA does not explicitly disclose that the channel layer forms a heterostructure with the drift layer.
However, in analogous art, Tanaka discloses a vertical field effect transistor (FET) comprising a drift region forming a heterojunction with the channel region. See, e.g., Abstract. Tanaka further discloses that the embodiment of FIG. 14 containing the heterojunction (300) provides the effect of reducing an area per cell due to the trench structure, the effect of improving cell integration, and the effect of reducing ON-resistance. See, e.g., paragraph [0049].
Additionally, Oka, in analogous art, discloses that AlGaN/GaN-based FETs “have the advantage that polarization charges at the hetero-interface induce high-density and high-mobility two-dimensional electron gas (2DEG) and thus effectively reduce on-state resistance.” Para. 1, col. 1, pg. 054101-1.
Accordingly, it would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made the channel layer (13) and drift layer (12) of AAPA such that they form a heterostructure as taught by Tanaka according to known methods to yield predictable results, for example, such that a high-density and high mobility 2DEG is induced and/or a reduced on-resistance is achieved as taught by Oka.
AAPA further discloses wherein the channel layer (13) is made of p-doped GaN. See, e.g., paragraph [0008].
AAPA does not explicitly disclose wherein the channel layer is made of aluminium gallium nitride (AlGaN).
However, in analogous art, Hwang discloses (see, e.g., FIGS. 1 and 9) a FET (100, 200a) wherein the channel layer (103) is made of aluminium gallium nitride (AlGaN) (see, e.g., paragraphs [0068] and [0094]).
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made the channel layer (13) of AAPA of aluminium gallium nitride (AlGaN) as taught by Hwang according to known methods to yield predictable results, for example, in order to use a readily available, know material (i.e., AlGaN) for its intended purposes as a channel layer.
AAPA also does not explicitly disclose wherein the first face of the III-N semiconductor layer has a polarity of the nitrogen type.
However, in analogous art, Chowdhury discloses an N-polar III-nitride vertical FET. See, e.g., Abstract. In particular, Chowdhury discloses (see, e.g., FIG. 2) a field-effect transistor (10, 12) comprising a III-N semiconductor layer (16) with a drift layer (18) disposed on a first face (i.e., upper face) thereof, wherein the first face of the III-N semiconductor layer (16) has a polarity of the nitrogen type. See, e.g., paragraph [0087].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made the first face (11a) of the III-N semiconductor layer (11) of AAPA have a polarity of the nitrogen type as taught by Chowdhury according to known methods to yield predictable results, for example, in order to achieve functions that are achievable by material properties that require materials grown with N-polarity. See, e.g., Chowdhury, paragraph [0009].
Additionally, the conclusion of obviousness is supported by an “obvious to try” rationale. See, e.g., MPEP §2143(I)(E). In particular, it is found that: (1) at the relevant time, there had been a recognized need in the art (e.g., see paragraph [0009] of Chowdhury – “Accordingly, the majority of current GaN device designs cannot achieve functions that are achievable by material properties that require materials grown with N-polarity”); (2) there had been a finite number of identified, predictable potential solutions to the recognized need (e.g., devices having materials grown with Ga-polarity or III-polarity, devices having materials grown with N-polarity and devices having material grown with mixed or unspecified or no polarity); and (3) one of ordinary skill in the art could have pursued the known potential solutions with a reasonable expectation of success (notably, Chowdhury discloses a successful N-polar III-nitrite vertical FET).
AAPR does not explicitly disclose wherein the aluminium gallium nitride (AlGaN) of the channel layer has a percentage of aluminium comprised between 20% and 40%.
However, in analogous art, NPL1 disclose an AlxGa1-xN/GaN heterostructure with Al percentages of 27% and 34%. See Abstract. NPL1 further teaches that the 2DEG mobility of the AlxGa1-xN/GaN heterostructure depends on the Al content. See, e.g., section III.B. “Electrical characteristics,” page 890, column 2. NPL1 also teaches that the amount of Al content in an AlxGa1-xN/GaN heterostructure can have an effect on the conduction band discontinuity, piezoelectric effect and carrier confinement and can allow “a high 2DEG mobility to coexist with a large carrier density.” Section III.B. “Electrical characteristics,” page 891, column 2.
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made the channel layer (13) of AAPR (i.e., as modified in accordance with the teachings of Hwang as discussed above herein) wherein the percentage of aluminium was 27% or 34% as taught by NPL1 (i.e., between 20% and 40% as claimed) according to known methods to yield predictable results, for example, to achieve a AlxGa1-xN/GaN heterostructure that exhibits a desired 2DEG mobility that can coexist with a large carrier density.
Moreover, the percentage of aluminium in an AlxGa1-xN/GaN heterostructure is recognized as a result-effective variable (see, e.g., NPL1).
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made the aluminium gallium nitride (AlGaN) channel layer with a percentage of aluminium comprised between 20% and 40% according to known methods to yield predictable results, for example, as a result of routine optimization using a known result-effective variable to achieve a desired combination of and/or trade-off between parameters, e.g., electron mobility. See, e.g., MPEP §2144.05(II). Additionally, Applicant has not established the criticality of the claimed range nor demonstrated that the claimed range produces any unexpected results. See, e.g., MPEP §2144.05(III)(A). On the contrary, Applicant merely submits that an aluminium concentration comprised between 20% and 40% constitutes a “good compromise” (i.e., along with a channel layer thickness comprised between 10 nm and 20 nm) between certain competing considerations (i.e., threshold voltage, facility of production and current leakage). See, e.g., paragraph [0062] of Applicant’s specification.
Regarding claim 2, AAPA in view of Tanaka, Oka, Hwang, Chowdhury and NPL1 as applied to claim 1 discloses the field-effect transistor according to claim 1.
AAPA further discloses wherein the III-N semiconductor layer (11) is made of gallium nitride (GaN).
Regarding claim 5, AAPA in view of Tanaka, Oka, Hwang, Chowdhury and NPL1 as applied to claim 1 discloses the field-effect transistor according to claim 1.
AAPA does not explicitly disclose wherein the channel layer has a thickness comprised between 10 nm and 20 nm.
However, in analogous art, Chowdhury (see, e.g., FIG. 2) discloses a channel layer (20) having a thickness comprised between 10 nm and 20 nm (see, e.g., paragraph [0060]).
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made the channel layer (13) of AAPA with a thickness comprised between 10 nm and 20 nm as taught by Chowdhury according to known methods to yield predictable results, for example, to achieved a suitably robust and/or stable channel layer while maintaining a suitably thin device.
Regarding claim 6, AAPA in view of Tanaka, Oka, Hwang, Chowdhury and NPL1 as applied to claim 2 discloses the field-effect transistor according to claim 2.
AAPA further discloses wherein the drift layer (12) is made of n-doped GaN. See, e.g., paragraph [0008].
AAPA does not explicitly disclose wherein the drift layer is made of aluminium gallium nitride (AlGaN).
However, in analogous art, Hwang discloses (see, e.g., FIGS. 1 and 9) a FET (100, 200a) wherein the drift layer (102) is made of aluminium gallium nitride (AlGaN) (see, e.g., paragraphs [0068] and [0093]).
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made the drift layer (12) of AAPA of aluminium gallium nitride (AlGaN) as taught by Hwang according to known methods to yield predictable results, for example, in order to use a readily available, know material for its intended purposes as a drift layer.
Regarding claim 7, AAPA in view of Tanaka, Oka, Hwang, Chowdhury and NPL1 as applied to claim 2 discloses the field-effect transistor according to claim 2.
AAPA further discloses wherein the drift layer (12) is made of n-doped GaN. See, e.g., paragraph [0008].
AAPA does not explicitly disclose wherein the drift layer is made of aluminium gallium nitride (AlGaN) and the channel layer has a percentage of aluminium greater than that of the drift layer.
However, in analogous art, Hwang discloses (see, e.g., FIGS. 1 and 9) a FET (100, 200a) wherein the drift layer (102) is made of aluminium gallium nitride (AlGaN) (see, e.g., paragraph [0068] and paragraph [0093] – “the drift region 102 may include GaN, and may include … a small amount of Al”) and the channel layer (103) is made of aluminium gallium nitride (AlGaN) (see, e.g., paragraphs [0094] – “the channel region 103 may include AlxGa1-xN (0≤x≤1)”) and has a percentage of aluminium greater than that of the drift layer (102) (see, e.g., FIG. 10).
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made the drift layer (12) of AAPA of aluminium gallium nitride (AlGaN) and the channel layer (13) of AAPA of aluminium gallium nitride (AlGaN) and having a percentage of aluminium greater than that of the drift layer (12) of AAPA as taught by Hwang according to known methods to yield predictable results, for example, in order to use readily available, know materials for their intended purposes as drift and channel layers, respectively.
Regarding claim 8, AAPA in view of Tanaka, Oka, Hwang, Chowdhury and NPL1 as applied to claim 1 discloses the field-effect transistor according to claim 1.
AAPA further discloses a source contact layer (14) disposed between the channel layer (13) and the source electrode (15).
Regarding claim 9, AAPA in view of Tanaka, Oka, Hwang, Chowdhury and NPL1 as applied to claim 8 discloses the field-effect transistor according to claim 8.
AAPA further discloses wherein the source contact layer (14) is made of n-type doped gallium nitride (GaN). See, e.g., paragraph [0008].
Conclusion
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JOHN P. CORNELY
Examiner
Art Unit 2812
/J.P.C./Examiner, Art Unit 2812
/DAVIENNE N MONBLEAU/Supervisory Patent Examiner, Art Unit 2812