Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Finality of last office action is withdrawn.
Election/Restrictions
Restriction of groups II-III (claims 10-12) are withdrawn. Groups I, II, III will be examined here.
Claim Objections
Claim objection(s) are withdrawn. See rejection under 35 U.S.C. 112(a) as follows.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 21-23 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claim 21, the phrase "the interposer is permanently attached to the circuit board" appears to be introducing a new matter. This is because at ¶0029 of the publication, the Applicant describes “An interposer 114 is adjacent the bottom side of the circuit board 112.” The Examiner believes that the phrase “adjacent” of description as filed can’t be interpreted as the phrase “permanently” as amended.
Regarding claim 22, the phrase "the interposer has a sealing cap layer on only one side of the plurality of liquid metal interconnects." has no support in the specification. At best ¶0029 and ¶0033 of the Applicant’s publication has “A sealing cap layer 116 seals the liquid metal interconnects 202, preventing them from leaking out.” The Examiner believe that the phrase as amended introducing a matter not originally filed with the application.
Regarding claim 23, the phrase "individual contact pads of the plurality of contact pads do not protrude into corresponding liquid metal interconnects of the plurality of liquid metal interconnects." has no support in the specification. Published specification at ¶0103 discloses “wherein individual liquid metal interconnects of the plurality of liquid metal interconnects are adjacent a contact pad of the plurality of contact pads”. At ¶0029 discloses “Each liquid metal interconnect is adjacent a contact pad 308 of the circuit board 112. Each contact pad 308 may be connected to a trace, via, or other interconnect on the circuit board 112. Each contact pad 308 may connect to a die or other component mounted on the circuit board 112.” Here, the phrase “adjacent” can’t be interpreted as “do not protrude” as amended.
(These are negative limitations because they tended to define the invention in terms of what it was not, rather than pointing out the invention. A negative limitation that rendered the claim indefinite because it was an attempt to claim the invention by excluding what the inventors did not invent rather than distinctly and particularly pointing out what they did invent. In re Schechter, 205 F.2d 185, 98 USPQ 144 (CCPA 1953)).
Drawings
The drawing objection is withdrawn because Applicant believes that the thickness as claimed are shown at fig. 3 i.e. vertical depth/height of contact pad 308 and liquid metal interconnect 202.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 4-5, 7 and 21-27 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tuli et al. (US 2009/0001576 A1), hereafter Tuli.
Regarding claim 1, Tuli in different embodiment of fig. 1-3, ¶0014-0015, ¶0017, ¶0021, particularly fig. 2 discloses a system comprising: an integrated circuit component 100/200/300, the integrated circuit component comprising: a plurality of contact pads 132/232/332; an interposer 120/220/320 comprising a plurality of liquid metal interconnects [122/222/322, see Abstract and ¶0012-0013 and ¶0023], wherein individual liquid metal interconnects of the plurality of liquid metal interconnects are adjacent a contact pad of the plurality of contact pads; and a cap layer 126/226/326 that seals the plurality of liquid metal interconnects, and an adapter comprising: a carrier 110/210 comprising a top surface [surface towards 120/220/320] and a bottom surface [surface for 112/212]; a plurality of nails 114/214/312, wherein individual nails of the plurality of nails extend from the top surface [as shown], pierce the cap layer [see “A bump 132 on the die 130 may pierce the upper sealing film 124 to contact the liquid metal filled in a hole 122 and a bump 114 on the substrate 110 may pierce the lower sealing film 126 to contact the liquid metal in the hole 122, so that the liquid metal may provide an electrical path for the package 100 to interconnect the bump 132 on top of the hole 122 and the bump 114 on a lower side of the hole 122. The die 130 may be coupled to the substrate 110 by the liquid metal in a hole 122 that may interconnect a bump 132 and a bump 114.” as an example], and are electrically coupled to one of the plurality of liquid metal interconnects [see “so that the liquid metal may provide an electrical path for the package 100 to interconnect the bump 132 on top of the hole 122 and the bump 114 on a lower side of the hole 122. The die 130 may be coupled to the substrate 110 by the liquid metal in a hole 122 that may interconnect a bump 132 and a bump 114.”]; and a plurality of pads 112/212 on the bottom surface, wherein individual pads of the plurality of pads are electrically coupled to one of the plurality of nails [¶0016, see “FIG. 2 illustrates an exemplary embodiment of a semiconductor package 200. Referring to FIG. 2, the package 200 may comprise a spacer 220 that may couple a die 230 to a substrate 210. In one embodiment, the substrate 210 may be a ball grid array (BGA) substrate that may comprise a set of one or more solder balls 212 on one side, e.g., the lower side of FIG. 2“].
Regarding claim 4, Tuli in different embodiment of fig. 1-3, ¶0012 discloses the system of claim 1, wherein individual liquid metal interconnects of the plurality of liquid metal interconnects comprise gallium.
Regarding claim 5, Tuli in different embodiment of fig. 1-3, ¶0012 discloses the system of claim 1, wherein individual liquid metal interconnects of the plurality of liquid metal interconnects comprise gallium and indium.
Regarding claim 7, Tuli in different embodiment of fig. 1-3, ¶0020 discloses the system of claim 1, wherein individual liquid metal interconnects of the plurality of liquid metal interconnects comprise a low-temperature solder [“the spacer 320 may comprise a set of one or more holes 322 that may each be filled with a metal that may be in a liquid state, e.g., at a room temperature.].
Regarding claim 21, as best understood by the examiner, Tuli in different embodiment of fig. 1-3, ¶0014-0015, ¶0017, ¶0021, particularly fig. 2 discloses the system of claim 1, wherein the integrated circuit component further comprises a circuit board [330 as an example], wherein the circuit board comprises the plurality of contact pads, wherein the interposer is permanently attached [Tuli discloses this limitation as cited by Applicant in their published specification ¶0029, ¶0081] to the circuit board.
Regarding claim 22, as best understood by the examiner, Tuli in different embodiment of fig. 1-3, ¶0014-0015, ¶0017, ¶0021, particularly fig. 2 discloses the system of claim 1, wherein the interposer has a sealing cap layer on only one side [Tuli discloses one side] of the plurality of liquid metal interconnects.
Regarding claim 23, as best understood by the examiner, Tuli in different embodiment of fig. 1-3, ¶0014-0015, ¶0017, ¶0021, particularly fig. 2 discloses the system of claim 1, wherein individual contact pads of the plurality of contact pads do not protrude [Tuli discloses electrical contact between contact pads and liquid metal interconnects] into corresponding liquid metal interconnects of the plurality of liquid metal interconnects.
Regarding claim 24, Tuli in different embodiment of fig. 1-3, ¶0014-0015, ¶0017, ¶0021, particularly fig. 2 discloses the system of claim 1, wherein the integrated circuit component further comprises a circuit board [330 as an example], wherein the circuit board comprises the plurality of contact pads, wherein individual contact pads of the plurality of contact pads are substantially flat and coplanar with a bottom surface of the circuit board [as shown].
Regarding claim 25, Tuli in different embodiment of fig. 1-3, ¶0014-0015, ¶0017, ¶0021, particularly fig. 2 discloses the system of claim 1, wherein the integrated circuit component further comprises a circuit board, wherein the plurality of contact pads is on the circuit board, wherein individual contact pads of the plurality of contact pads are electrically coupled to a trace, a via, or another interconnect on the circuit board [implicit to electrical connection between 332 and 340, ¶0019].
Regarding claim 26, Tuli in different embodiment of fig. 1-3, ¶0014-0015, ¶0017, ¶0021, particularly fig. 2 discloses the system of claim 1, wherein the cap layer comprises a foam or a polymer [¶0013], wherein, after being pierced by an individual nail of the plurality of nails, the cap layer partially or fully seals a corresponding liquid metal interconnect of the plurality of liquid metal interconnects, wherein the cap layer prevents most or all liquid metal of the corresponding liquid metal interconnect from leaking out [see “prevent liquid metal leakage” at ¶0013].
Regarding claim 27, Tuli in different embodiment of fig. 1-3, ¶0014-0015, ¶0017, ¶0021, particularly fig. 2 discloses the system of claim 1, wherein individual contact pads of the plurality of contact pads have a thickness less than a thickness of a corresponding liquid metal interconnect of the plurality of liquid metal interconnects [thickness as claimed is implicit to 132 and hole 122, see ¶0014, as an example].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2-3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tuli as applied to claim 1 above, and further in view of Chraft et al. (US 2008/0136432 A) hereafter Chraft.
Regarding claim 2, Tuli discloses the system of claim 1 including and the adapter. Tuli is silent about a test interface unit to test the integrated circuit component; and a compressible socket mated with the test interface unit and the adapter, the compressible socket comprising a plurality of pins, wherein individual pins of the plurality of pins are in contact with one of the plurality of pads. Chraft in testing environment and at fig. 1 discloses a test interface unit 114 to test [using a tester, ¶0023] the integrated circuit component 110; and a compressible socket 116 mated with the test interface unit, the compressible socket comprising a plurality of pins 106, wherein individual pins of the plurality of pins are in contact with one of the plurality of pads [108 of 110]. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date add the test interface as taught by Chraft to the system of Tuli to test the integrated circuit component of Tuli. Modified Tuli discloses the compressible socket mated with the test interface unit and the adapter.
Regarding claim 3, modified Tuli discloses the system of claim 2, particularly Chraft discloses wherein the test interface unit 114 comprises a plurality of pads [pads of 120 on 114], wherein the compressible socket comprises a second plurality of pins [pins of 120 on 116], wherein individual pins of the second plurality of pins are in contact with one of the plurality of pads of the test interface unit [via 120 as shown].
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tuli as applied to claim 1 above, and further in view of Nelson et al. (US 5445308).
Regarding claim 6, Tuli discloses the plurality of liquid metal interconnects comprise gallium. Tuli also discloses the plurality of liquid metal interconnects comprise gallium and indium. Tuli is silent about wherein individual liquid metal interconnects of the plurality of liquid metal interconnects comprise gallium and tin. Nelson at Table 1, last paragraph on column 6 i.e. “Preferred liquid metal alloys comprise gallium with one or more of tin, bismuth and cadmium.” and at claim 12 discloses “wherein said liquid metal is selected from the group consisting of gallium, gallium/indium, gallium/tin, gallium/indium/tin, mercury, and combinations thereof.” Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date to use gallium and tin as taught by Nelson as liquid metal of Tuli for the same purpose as taught by Tuli to make the claim invention, since Tuli also discloses liquid metal.
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tuli as applied to claim 1 above, and further in view of Lauder et al. (US 6130823), hereafter Lauder.
Regarding claim 8, Tuli discloses the system of claim 1. Tuli also discloses wherein the plurality of liquid metal interconnects. Tuli at ¶0016 discloses “ FIG. 2 illustrates an exemplary embodiment of a semiconductor package 200. Referring to FIG. 2, the package 200 may comprise a spacer 220 that may couple a die 230 to a substrate 210. In one embodiment, the substrate 210 may be a ball grid array (BGA) substrate that may comprise a set of one or more solder balls 212 on one side, e.g., the lower side of FIG. 2; however, in some embodiments, any other external interconnects may be utilized. In another embodiment, the substrate 210 may further comprise a first set of protruding interconnects such as bumps 214 on the upper side that may be coupled to the die 230. Examples of the substrate 210 may refer to the corresponding description with regard to the substrate 110 of FIG. 1.” Use of at least 1000 interconnect is old and well known in the BGA devices for high performance computing. Tuli is silent about said plurality of liquid metal interconnects comprises at least 1,000 liquid metal interconnects. Lauder at fig. 1 discloses ball grid array (BGA) module with one or more of the conductive balls 12 are in electrical contact with one or more of said interconnect pads 22. Interconnect is the portion connecting balls 12 and pads 22. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date to modify the interconnect of Tuli as taught by Lauder in order to make the claimed invention, to obtain advantages that Lauder has to offer and for high performance computing.
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tuli as applied to claim 1 above, and further in view of Sauciue et al. (US 2009/0273083 A1).
Regarding claim 9, Tuli discloses an integrated circuit component 100/200/300 includes die 130/230/340. Tuli is silent about said integrated circuit component is a processor. Sauciue in similar environment at fig. 8 discloses the integrated circuit component is a processor [220/870/860 of 805/205, see “The IC die 220 may comprise any suitable processing system (either single core or multi-core), such as a microprocessor, a network processor, a graphics processor, a wireless communications device, a chipset, etc, as well as any combination of these and other systems or devices. an IC die 220 disposed on the first side 212. The IC die 220 may comprise any suitable processing system (either single core or multi-core), such as a microprocessor, a network processor, a graphics processor, a wireless communications device, a chipset, etc, as well as any combination of these and other systems or devices.”]. Sauciue also discloses the electrically conductive fluid 170/870 comprises a liquid metal. Examples of suitable liquid metals include gallium or an alloy of gallium and one or more additional metals (e.g. indium, tin, bismuth, lead, and/or others). According to a further embodiment, the fluid 170/870 comprises an electrically conductive paste, which may be metallic, non-metallic, or a mixture of metallic and non-metallic substances. For example, the fluid 170 may comprise a mixture of gallium (or a gallium alloy) and a thermal grease. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date to use processor of Sauciue for the integrated circuit component of Tuli for forming the claimed invention and modify the system of Tuli with the processor as taught by Sauciue.
Claim(s) 28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tuli as applied to claim 1 above.
Regarding claim 28, Tuli discloses system of claim 1, wherein individual pads of the plurality of pads are heads of corresponding nails of the plurality of nails. Tuli is silent about wherein individual pads of the plurality of pads are coated with gold. Use of gold coating is old and well known in the art for many advantages such as to obtain super electrical conductivity, corrosion and oxidation resistance, wear resistance. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date to use gold coating as claimed to modify Tuli to take advantages that gold has to offer.
Claim(s) 10 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tuli et al. (US 2009/0001576 A1), hereafter Tuli in view of Chraft et al. (US 2008/0136432 A) hereafter Chraft.
Regarding claim 10, Tuli in different embodiment of fig. 1-3, ¶0014-0015, ¶0017, ¶0021, particularly fig. 2 discloses an adapter comprising: a carrier 110/210 comprising a top surface [surface towards 120/220/320] and a bottom surface [surface for 112/212]; a plurality of nails 114/214/312, wherein individual nails of the plurality of nails extend from the top surface [as shown], wherein the plurality of nails are to interface with an array [array of 214/114]; and a plurality of pads 112/212 on the bottom surface, wherein individual pads of the plurality of pads are electrically coupled to one of the plurality of nails [¶0016, see “FIG. 2 illustrates an exemplary embodiment of a semiconductor package 200. Referring to FIG. 2, the package 200 may comprise a spacer 220 that may couple a die 230 to a substrate 210. In one embodiment, the substrate 210 may be a ball grid array (BGA) substrate that may comprise a set of one or more solder balls 212 on one side, e.g., the lower side of FIG. 2“], wherein the plurality of pads are to interface with a mother board [¶0010].
Tuli is silent about said plurality of pads are to interface with a land grid array socket. Rather discloses interface with a mother board [¶0010]. Use of LGA socket is old and well-known in the art for excellent custom builds and future-proofing on computers testers etc. because of spring loaded pins. Chraft in testing environment and at fig. 1 discloses LGA socket 116 mated with the test interface unit, the LGA socket comprising a plurality of pins 106, wherein individual pins of the plurality of pins are in contact with one of the plurality of pads [108 of 110]. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date add the LGA socket as taught by Chraft to the mother board of Tuli to test and support the integrated circuit component of Tuli.
Regarding claim 12, the combination of Tuli and Chraft , particularly Tuli in different embodiment of fig. 1-3, ¶0014-0015, ¶0017, ¶0021, particularly fig. 2 discloses a system comprising the adapter of claim 10, the system further comprising: an integrated circuit component 100/200/300, the integrated circuit component comprising: a plurality of contact pads 132/232/332; an interposer 120/220/320 comprising a plurality of liquid metal interconnects [122/222/322, see Abstract and ¶0012-0013 and ¶0023], wherein individual liquid metal interconnects of the plurality of liquid metal interconnects are adjacent an contact pad of the plurality of contact pads; and a cap layer 126/226/326 that seals the plurality of liquid metal interconnects, wherein individual nails of the plurality of nails pierce the cap layer and are electrically coupled to one of the plurality of liquid metal interconnects.
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tuli and Chraft as applied to claim 10 above.
Regarding claim 11, Tuli discloses wherein the plurality of liquid metal interconnects. Tuli at ¶0016 discloses “ FIG. 2 illustrates an exemplary embodiment of a semiconductor package 200. Referring to FIG. 2, the package 200 may comprise a spacer 220 that may couple a die 230 to a substrate 210. In one embodiment, the substrate 210 may be a ball grid array (BGA) substrate that may comprise a set of one or more solder balls 212 on one side, e.g., the lower side of FIG. 2; however, in some embodiments, any other external interconnects may be utilized. In another embodiment, the substrate 210 may further comprise a first set of protruding interconnects such as bumps 214 on the upper side that may be coupled to the die 230. Examples of the substrate 210 may refer to the corresponding description with regard to the substrate 110 of FIG. 1.” Use of at least 1000 interconnect is old and well known in the BGA devices for high performance computing. Also, High end sockets have 5000 to 10000 pins that is known in the art. Tuli and Chraft are silent about said plurality of nails comprises at least 1,000 nails. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date to modify the nails of modified Tuli in at least 1000 is a design choice in order to make the claimed invention and modification obtains advantages for high performance computing.
Please note: Examiner has cited particular columns, line numbers, and figures in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teaching of the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. Applicants are reminded that MPEP 2141.02 states: A prior art reference must be considered in its entirety, i.e., as a whole, including portions that would lead away from the claimed invention. W.L. Gore & Associates, Inc. V. Garlock, Inc., 721 F.2d 1540, 220 USPQ 303 (Fed. Cir. 1983), cert. denied, 469 U.S. 851 (1984).
Conclusion
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/PARESH PATEL/Primary Examiner, Art Unit 2858
June 22, 2026
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