Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on December 17, 2025 has been entered.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-9, 13-28 have been considered but are moot in view of the newly cited prior art.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 and 22 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Vittu (USPAT 6787869).
Regarding Claim 1, Vittu teaches (Figs. 1, 4, and 10) An electronic device, comprising: a substrate (Fig. 10, Elements 36 and 50 make up a substrate, hereinafter S); a semiconductor die (4) having a side (Bottom side of semiconductor 4) that extends in a plane of orthogonal first and second directions (Fig. 4, the semiconductor die is seen extending in left-right and front-back directions), a sensor (6) with a sensor surface (surface of sensor 6 which extends along bottom side of semiconductor die 4) extending along the side (the sensor surface is seen extending along the bottom side of the semiconductor die), and conductive terminals (11) extending outward from the side along a third direction that is orthogonal to the first and second directions (the conductive terminals 11 are seen extending in the up-down direction in Fig. 1), the conductive terminals (11) spaced apart from one another (conductive terminals are seen spaced apart from the sensor as well as from each other in the first and second directions) and from the sensor surface (surface of sensor 6) in the first and second directions, the conductive terminals (11) having ends soldered to conductive features of (13) the substrate (S) such that the side of the semiconductor die (4) is spaced apart from (the substrate S and the semiconductor die 4 are seen spaced apart in the third direction) the substrate (S) along the third direction, and the conductive terminals (11) forming a cage structure (the conductive terminals form a set of surrounding elements, which would form a cage structure around the sensor surface) that laterally surrounds the sensor surface (surface of sensor 6); and a molded structure (14) that encloses a portion of (Fig. 10, the molded structure 49 is seen enclosing a portion of the semiconductor die as it is formed in contact with the die and radially surrounds the sensor surface) the semiconductor die (4), wherein the molded structure (49) and the substrate (S) fully enclose a cavity (a cavity is seen fully enclosed by the substrate S and the molded structure 49) that extends along the third direction between the sensor surface (surface of sensor 6) and the substrate (S).
Regarding Claim 22, Vittu teaches (Fig. 5, 10) a semiconductor package, comprising: a package substrate (package substrate which is made of up of elements 36 and 50, hereinafter S); a semiconductor die (34) coupled to (semiconductor die is seen coupled to package substrate S) the package substrate (S) via a plurality of conductive structures (11), the semiconductor die (34) having a sensor (Fig.4) on a side of (bottom side of semiconductor die 34) the semiconductor die (34) facing the package substrate (S); and a mold compound (39) covering (mold compound 39 is seen covering portions of the semiconductor die 34 and conductive structures 38) a portion of the semiconductor die (34) and portions of the plurality of conductive structures (38), wherein the mold compound (39) and the package substrate (S) fully enclose a cavity (a cavity is seen fully enclosed by the mold compound 39 and the package substrate S, and that cavity is seen extending between the bottom side of the semiconductor die where the sensor is seen and ) that extends between the side of the semiconductor die (34) and the package substrate (S).
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 2-4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Vittu as applied to claim 1 above, and further in view of Auman et al (USPGPUB 20120292086, hereinafter “Auman”).
Regarding Claim 2, Vittu teaches the electronic device of claim 1, but is silent with regards to a polymer layer on at least a portion of the sensor surface in the cavity.
Auman (Fig. 1A, 1B) teaches a polymer layer (30) on at least a portion of the sensor surface in the cavity (the polymer layer is seen on the side of the die which would also contain a sensor and be located in the cavity).
It would have been obvious to a person of ordinary skill in the art, absent unexpected results, before the date of effective filing, to incorporate the polymer layer of Auman into the electronic device of Vittu in order to arrive at the expected result of taking advantage of the robustness and thermal stability typical of a polyimide polymer with reasonable expectation of success.
Regarding Claim 3, Vittu in view of Auman teaches the electronic device of claim 2, wherein the polymer layer includes polyimide (Auman [0018], “The electrically conductive domains are supported by the polymide films of the present disclosure.”).
Regarding Claim 4, Vittu in view of Auman teaches the electronic device of claim 2, wherein the polymer layer (Auman 30) extends (the polymer layer 30 is seen surrounding the terminals and extending past them in the first and second directions) around portions of the conductive terminals (50) along the side of the semiconductor die (10).
Claim(s) 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Vittu as applied to claim 1 above, and further in view of Das et al (USPGPUB 20180102470, hereinafter “Das”).
Regarding Claim 21, Vittu teaches the electronic device of claim 1, but is silent with regards to a device wherein the substrate comprises a multilayer package substrate.
Das teaches a device wherein the substrate comprises a multilayer package substrate ([00129], “multiple, multilayer, substrates having different sizes”).
It would have been obvious to a person of ordinary skill in the art, absent unexpected results, before the date of effective filing, to incorporate the multilayer substrate of Das into the device of Vittu in order to arrive at the expected result of taking advantage of the known benefit of multilayer substrates, allowing for more complex circuitry within the device with reasonable expectation of success.
Claim(s) 23-25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Vittu as applied to claim 22 above, and further in view of Auman.
Regarding Claim 23, Vittu teaches the semiconductor package of claim 22, but is silent with regards to a polymer layer on at least a portion of the side of the semiconductor die in the cavity.
Auman (Fig. 1A, 1B) teaches a polymer layer (30) on at least a portion of the side of the semiconductor die in the cavity. (the polymer layer is seen on the side of the die which would also contain a sensor and be located in the cavity of the molded package structure).
It would have been obvious to a person of ordinary skill in the art, absent unexpected results, before the date of effective filing, to incorporate the polymer layer of Auman into the device of Vittu in order to arrive at the expected result of providing a device with an extra layer of insulation and protection with reasonable expectation of success.
Regarding Claim 24, Vittu in view of Auman teaches the semiconductor package of claim 22, wherein the polymer layer includes polyimide (Auman [0018], “The electrically conductive domains are supported by the polymide films of the present disclosure.”).
Regarding Claim 25, Vittu in further view of Auman teaches the semiconductor package of claim 23, wherein the polymer layer (Auman 30) extends (the polymer layer 30 is seen surrounding the terminals and extending past them in the first and second directions) around portions of the conductive terminals (50) along the side of the semiconductor die (10).
Claim(s) 5-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Vittu as applied to claim 1 above, and further in view of Kajiwara et al (USPGPUB 20020056906, hereinafter “Kajiwara”). .
Regarding Claim 5, Vittu teaches the electronic device of claim 1, but is silent with regards to a device wherein the side of the semiconductor die is spaced apart from the substrate along the third direction by a distance less than an average filler particle size of a material of the molded structure.
Kajiwara teaches a device wherein the side of the semiconductor die is spaced apart from the substrate along the third direction by a distance less than an average filler particle size of a material of the molded structure. ( [0122], “second resin 223 containing grinding-shaped large filler particles 221”; large filler particles in a resin are known to range from 10 to 100 microns in size. A filler particle size of approximately 55 to 100 microns would have been obvious; “[0125], “...bump size after completion of the compression joining is 40 [micron] (height) [times] 60 [micron] (diameter)”; after thermally compressing the resin layer, the height of the resin layer joining the substrate and the semiconductor die is approximately 40 microns).
It would have been obvious to a person of ordinary skill in the art, absent unexpected results, before the date of effective filing, to incorporate the microelectronics and mold layer dimensions of Kajiwara into the device of Vittu in order to arrive at the expected result of creating a device with the known benefit of having dimensions which are compatible with contemporary electronics for device manufacture with reasonable expectation of success.
Regarding Claim 6, Vittu in view of Kajiwara teaches the electronic device of claim 5, wherein the distance is 45 pm or less (“Kajiwara [0125], “...bump size after completion of the compression joining is 40 [micron] (height) [times] 60 [micron] (diameter)”; after thermally compressing the resin layer, the height of the resin layer joining the substrate and the semiconductor die is 40 microns).
Regarding Claim 7, Vittu teaches the electronic device of claim 1, but is silent with regards to a device wherein the conductive terminals have a diameter in the first and second directions between 60 pm and 70 pm.
Kajiwara teaches an electronic device wherein the conductive terminals have a diameter in the first and second directions between 60 pm and 70 pm (“Kajiwara [0125], “...bump size after completion of the compression joining is 40 [micron] (height) [times] 60 [micron] (diameter)”; after thermally compressing the resin layer, the height of the resin layer joining the substrate and the semiconductor die is 40 microns).
. It would have been obvious to a person of ordinary skill in the art, absent unexpected results, before the date of effective filing, to incorporate the dimensions of the conductive terminal seen in Kajiwara into the device of Vittu in order to arrive at the expected result of creating a device with the known benefit of having dimensions which are compatible with contemporary electronics for device manufacture with reasonable expectation of success.
Claim(s) 26-28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Vittu as applied to claim 21 above, and further in view of Kajiwara.
Regarding Claim 26, Vittu teaches the electronic device of claim 21, but is silent with regards to a device wherein the side of the semiconductor die is spaced apart from the substrate along the third direction by a distance less than an average filler particle size of a material of the molded structure.
Kajiwara teaches a device wherein the side of the semiconductor die is spaced apart from the substrate along the third direction by a distance less than an average filler particle size of a material of the molded structure. ( [0122], “second resin 223 containing grinding-shaped large filler particles 221”; large filler particles in a resin are known to range from 10 to 100 microns in size. A filler particle size of approximately 55 to 100 microns would have been obvious; “[0125], “...bump size after completion of the compression joining is 40 [micron] (height) [times] 60 [micron] (diameter)”; after thermally compressing the resin layer, the height of the resin layer joining the substrate and the semiconductor die is approximately 40 microns).
It would have been obvious to a person of ordinary skill in the art, absent unexpected results, before the date of effective filing, to incorporate the microelectronics and mold layer dimensions of Kajiwara into the device of Vittu in order to arrive at the expected result of creating a device with the known benefit of having dimensions which are compatible with contemporary electronics for device manufacture with reasonable expectation of success.
Regarding Claim 27, Vittu in view of Kajiwara teaches the electronic device of claim 26, wherein the distance is 45 pm or less (“Kajiwara [0125], “...bump size after completion of the compression joining is 40 [micron] (height) [times] 60 [micron] (diameter)”; after thermally compressing the resin layer, the height of the resin layer joining the substrate and the semiconductor die is 40 microns).
Regarding Claim 28, Vittu teaches the electronic device of claim 1, but is silent with regards to a device wherein the conductive terminals have a diameter in the first and second directions between 60 pm and 70 pm.
Kajiwara teaches an electronic device wherein the conductive terminals have a diameter in the first and second directions between 60 pm and 70 pm (“Kajiwara [0125], “...bump size after completion of the compression joining is 40 [micron] (height) [times] 60 [micron] (diameter)”; after thermally compressing the resin layer, the height of the resin layer joining the substrate and the semiconductor die is 40 microns).
It would have been obvious to a person of ordinary skill in the art, absent unexpected results, before the date of effective filing, to incorporate the dimensions of the conductive terminal seen in Kajiwara into the device of Vittu in order to arrive at the expected result of creating a device with the known benefit of having dimensions which are compatible with contemporary electronics for device manufacture with reasonable expectation of success.
Conclusion
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/V.J.L./Examiner, Art Unit 2898
/JESSICA S MANNO/SPE, Art Unit 2898
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