Prosecution Insights
Last updated: April 19, 2026
Application No. 17/711,978

MICROELECTRONIC STRUCTURE INCLUDING DIE BONDING FILM BETWEEN EMBEDDED DIE AND SURFACE OF SUBSTRATE CAVITY, AND METHOD OF MAKING SAME

Non-Final OA §102§103§112
Filed
Apr 01, 2022
Examiner
MUNOZ, ANDRES F
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
2y 4m
To Grant
94%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
541 granted / 707 resolved
+8.5% vs TC avg
Strong +18% interview lift
Without
With
+17.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
36 currently pending
Career history
743
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
43.7%
+3.7% vs TC avg
§102
28.6%
-11.4% vs TC avg
§112
21.5%
-18.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 707 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant's election with traverse of invention I (claims 1-13) and species A (Fig. 2; claims 1-13 per the applicant) in the reply filed on 8.19.2025 is acknowledged. Traversal response is included below. The applicant alleges: PNG media_image1.png 152 586 media_image1.png Greyscale This is not persuasive as MPEP 806.05(f) states “A process of making and a product made by the process can be shown to be distinct inventions if either or both of the following can be shown: (A) that the process as claimed is not an obvious process of making the product and the process as claimed can be used to make another materially different product; or (B) that the product as claimed can be made by another materially different process” and “Allegations of different processes or products need not be documented”. There is no requirement in the MPEP for the alternatives to be “fully enabled by the specification and truly supported by the prior art and facts of record” as applicant alleges. The applicant alleges: PNG media_image2.png 84 756 media_image2.png Greyscale And, PNG media_image3.png 190 766 media_image3.png Greyscale This is not persuasive because in the examiner’s proposed modification there is no “ providing a substrate defining a cavity therein and including electrically conductive features; providing, within the cavity: a bridge die…” and instead would be: (a) providing a substrate defining a topmost planar surface and including electrically conductive features, (b) providing, on said topmost planar surface: a bridge die…”, and, (c) subsequently providing additional substrate layers surrounding said bridge die. Hence, there is no cavity into which to provide a bridge die as required by the method claims and this constitutes an alternative process and restriction between each of groups I, II and III vs group IV is maintained. Alternatively, the product as claimed can be made by another and materially different process in which the “providing a substrate defining a cavity therein and including electrically conductive features” is modified by not providing electrically conductive features or providing them at a later time once the device has been finished. Alternatively, claim 21 requires “providing, within the cavity: a bridge die to electrically couple a pair of dies to be provided on a surface of the substrate” which would require said dies to be within the cavity and this method can be modified to provide said dies outside of the cavity while still on a surface of the substrate. The applicant alleges: PNG media_image4.png 130 680 media_image4.png Greyscale This is found persuasive. Restriction between groups I, II and III is withdrawn. The examiner notes that applicant has affirmed on record that “therefore, as in claim 14 or as in claim 18, providing dies on the surface of the substrate such that they are interconnected by the bridge die is clearly an obvious variant, as claim 1 suggests this already” and “Although the designs of products as claimed in claims 1, 14 and 18 may be different from one another, clearly, they are not different in a material way.”. Based on this: groups I-III are elected, and, group IV is withdrawn. The applicant alleges: PNG media_image5.png 378 770 media_image5.png Greyscale This is not persuasive as groups I-III vs IV share different classification (MPEP 808.02) and would require a different field of search in searching structures (devices) vs method steps. The fact that claims 1 and 21 are generic to disclosed species is not relevant to burden considerations of related inventions. The applicant alleges: PNG media_image6.png 158 790 media_image6.png Greyscale This is not found persuasive as “Where an application includes claims directed to different embodiments or species that could fall within the scope of a generic claim, restriction between the species may be proper if the species are independent or distinct” per MPEP 806.04 and in this case, the species are independent or distinct because (Election 1) the species are drawn to mutually exclusive and non-obvious assemblies as seen in the Figs. and (Election 2) the species are drawn to mutually exclusive and non-obvious manufacturing process flows of assemblies as seen in the Figs. In addition, these species are not obvious variants of each other based on the current record. Wherein the applicant has not provided proof that the identified species are not mutually exclusive or that they are obvious variants. For example, Fig. 2 depicts a mutually exclusive and non-obvious assembly from Fig. 3, 8 and 9. The requirement is still deemed proper and is therefore made FINAL. As a summary, in view of the withdrawal of restriction between groups I-III which are now consolidated in a single group, applicant elects with traverse claims 1-20 as readable to groups I-III and species A (Fig. 2). Furthermore, the examiner maintains the restriction requirement between groups I-III vs group IV and the species restriction of the previous Office Action; claims 21-25 are withdrawn. Claims 21-25 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected invention/species, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 8.19.2025. Specification The disclosure (amendment filed 8.19.2025) is objected to because of the following informalities: applicant states paragraph [0016] is amended, but the paragraph number and text used do not align with that of the original disclosure. It appears applicant meant to amend [0061]; hence, the amendment to the disclosure filed 8.19.2025 is denied entry. Appropriate correction is required. The disclosure is objected to because of the following informalities: -[0016-0020] refer to element numbers not present in Fig. 1. For example, 122 and 104. -[0046] refers to 222b not shown in Fig. 2. Appropriate correction is required. Drawings Replacement drawings for Figs. 1-3 and 4C-4D were received on 8.19.2025. These drawings are unacceptable and denied entry because the drawings rely on the amendment to the specification filed 8.19.2025 which has not been entered as addressed above. The replacement drawings can only be entered once the specification is properly amended to support the replacement drawings. Figure 1 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. The drawings are objected to because in Figs. 4C-4E, the bridge dies 422” and 422’ are not identical (see 422’ above 439 and 445 for an unlabeled layer). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, (a) the caps and related structure of claim 6, (b) the adhesive and related structure of claim 11, and, (c) the pair of surface dies and related structure of claim 14, and, (d) the PCB, ICs, surface dies and related structure of claim 18 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Recall Fig. 2 is elected and the claimed subject matter must be present in Fig. 2 to be elected. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Objections Claims objected to because of the following informalities: In claims 2 and 15, “the contact pads” should read –the electrical contact pads--. In claim 6, “the die” should read –the bridge die--. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 6, 10 and 18-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 6, “the microelectronic structure further including caps comprising nickel or tungsten between the electrically conductive structures on one hand (unclear what it means), and at least one of respective ones of the first electrically conductive features or the second electrically conductive features that are adjacent the electrically conductive structures” is indefinite as it is unclear what “on one hand” intends to claim. The claim is treated as referring to a correspondence/alignment between the claimed electrically conductive features. Regarding claim 10, “…microelectronic structure of claim 9, wherein the non-conductive component includes at least one of: epoxy, polyimide, bismaleimide, acrylate, silicone, cyanate ester, silica, alumina, aluminum hydroxide, mica, glass, polyethylene terephthalate polyolefin, copolymer polypropylene, block copolymer polypropylene, homopolypropylene, polybutene, polymethylpentene, ethylene-vinylacetate copolymer, ionomer resin, ethylene(meth)acrylic acid copolymer, ethylene(meth)acrylic acid ester (random or alternating) copolymer, ethylene-butene copolymer, ethylene-hexene copolymer, polyurethane, polyester, polyethyleneterephthalate, polyethylenenaphthalate, polycarbonate, polyetheretherketone, polyimide, polyetherimide, polyamide, whole aromatic polyamide, polyphenylsulfide, fluorine resin, polyvinyl chloride, polyvinylidene chloride, a cellulose resin, or a silicone resin” is indefinite because (a) non-polymer materials are claimed and polymer materials are a requirement of base claim 9; for example (non-exhaustive list), silica, mica and alumina are not polymers, (b) materials are repeated; for example (non-exhaustive list), polyimide is repeated, and, (c) genus and species of the same type of materials are claimed which obscures the scope of the claim; for example (non-exhaustive list), silicone resin is a species of silicone. The claim includes more materials that conflict with each other in the same manner as addressed above; the lists provided above are non-exhaustive. Regarding claim 18, “individual ones of the semiconductor packages including a microelectronic assembly including: a microelectronic subassembly including:” is indefinite as “a microelectronic subassembly” is recited twice which makes it unclear if it refers to the same subassembly or different ones; it is treated as either one. None of dependent claims 19-20 address this deficiency. Regarding claim 20, “…microelectronic assembly of claim 18, wherein the non-conductive component includes at least one of: epoxy, polyimide, bismaleimide, acrylate, silicone, cyanate ester, silica, alumina, aluminum hydroxide, mica, glass, polyethylene terephthalate polyolefin, copolymer polypropylene, block copolymer polypropylene, homopolypropylene, polybutene, polymethylpentene, ethylene-vinylacetate copolymer, ionomer resin, ethylene(meth)acrylic acid copolymer, ethylene(meth)acrylic acid ester (random or alternating) copolymer, ethylene-butene copolymer, ethylene-hexene copolymer, polyurethane, polyester, polyethyleneterephthalate, polyethylenenaphthalate, polycarbonate, polyetheretherketone, polyimide, polyetherimide, polyamide, whole aromatic polyamide, polyphenylsulfide, fluorine resin, polyvinyl chloride, polyvinylidene chloride, a cellulose resin, or a silicone resin” is indefinite because (a) materials are repeated; for example (non-exhaustive list), polyimide is repeated, and, (b) genus and species of the same type of materials are claimed which obscures the scope of the claim; for example (non-exhaustive list), silicone resin is a species of silicone. The claim includes more materials that conflict with each other in the same manner as addressed above; the lists provided above are non-exhaustive. Claim Rejections - 35 USC § 102 and 35 USC § 103 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2, 7-8 and 12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nickerson (US 20140159250 A1). Regarding claim 1, Nickerson discloses a microelectronic structure, comprising: a substrate (375A to 375B) defining a cavity (occupied by 345A to 350A) therein (Figs. 6-7); a bridge die (340A+) within the cavity, the bridge die to (capable; MPEP 2111, 2112 and/or 2114) electrically couple a pair of dies to be provided (not required by the claim) on a surface of the substrate (not required by the claim); and an electrical coupling layer (350A/352A+) between a top surface of the cavity and a bottom surface of the bridge die (Figs. 6-7), the electrical coupling layer including: a non-conductive component (350A, “adhesive 350A”) including a die bonding film (350A) and defining holes (occupied by 352A) therein; and electrically conductive structures (352A+, “solder connections 352A”) in the holes, the electrically conductive structures electrically coupling the substrate with the bridge die (Figs. 6-7). Regarding claim 2, Nickerson discloses the microelectronic structure of claim 1, further including electrical contact pads (bottommost of 385A) at the bottom surface of the bridge die (Fig. 6), the contact pads in (partly, from a top-down perspective) the holes of the non-conductive component (350a), and in registration with corresponding ones of the electrically conductive structures (352. In a top-down view, 385A overlaps at least partly with holes of 350A; as such, the bottommost of 385A is at least partly in, from a top-down view, the holes as claimed). Regarding claim 7, Nickerson discloses the microelectronic structure of claim 1, wherein the electrically conductive structures (352A+) include contact pads (bottommost of 385A) at the bottom surface of the bridge die (Fig. 6). Regarding claim 8, Nickerson discloses the microelectronic structure of claim 1, wherein the electrically conductive structures (352A+) include solder ([0031] – “solder connections 352A”). Regarding claim 12, Nickerson discloses the microelectronic structure of claim 1, wherein the substrate (375A to 375B) includes electrically conductive features therein including through (layer) vias (some 325A) and bridge vias (other 325A. Fig. 6), wherein the electrically conductive structures (352A+) are in registration with the bridge vias (two 325A under 340A) to electrically couple the substrate with the bridge die (Figs. 6-7). Claims 1-3, 7-8, 12 and 14-16 are rejected under 35 U.S.C. 103 as being unpatentable over Deshpande et al. (US 20170330835 A1) in view of Nickerson (US 20140159250 A1). Regarding claim 1, Deshpande discloses (Fig. 1) a microelectronic structure, comprising: a substrate (110) defining a cavity (112) therein; a bridge die (150) within the cavity, the bridge die to (capable; MPEP 2111, 2112 and/or 2114) electrically couple a pair of dies (170) to be provided on a (top) surface of the substrate; and an electrical coupling layer (124+) between a top surface of the cavity and a bottom surface of the bridge die (Fig. 1), the electrical coupling layer including: electrically conductive structures (124+). Deshpande fails to disclose the electrical coupling layer including: a non-conductive component including a die bonding film and defining holes therein; and electrically conductive structures in the holes, the electrically conductive structures electrically coupling the substrate with the bridge die. Nickerson discloses the electrical coupling layer including: a non-conductive component (350A, “adhesive 350A”) including a die bonding film (350A) and defining holes (occupied by 352A) therein; and electrically conductive structures (352A+, “solder connections 352A”) in the holes, the electrically conductive structures electrically coupling the substrate with the bridge die (340A, Figs. 6-7). It would have been obvious to one of ordinary skill in the art, before the effective filing date, to include the electrical coupling layer of Nickerson in Deshpande and arrive at the claimed invention so as to securely attach a die on a substrate. Regarding claim 2, Deshpande/Nickerson (together) discloses the microelectronic structure of claim 1, further including electrical contact pads (184) at the bottom surface of the bridge die (150, Deshpande Fig. 1), the contact pads in the holes of the non-conductive component (once the non-conductive component 350A of Nickerson at Fig. 6 is applied to Fig. 1 of Deshpande, 184 is in the holes of 350A), and in registration with corresponding ones of the electrically conductive structures (as 124, Fig. 1 of Deshpande). Regarding claim 3, Deshpande/Nickerson discloses the microelectronic structure of claim 1, wherein the electrically conductive structures (124+; meaning 124+184) include liquid metal (in 184, “interconnects 184, such as reflowable solder bumps or balls”). Regarding claim 7, Deshpande/Nickerson discloses the microelectronic structure of claim 1, wherein the electrically conductive structures (124+; meaning 124+184) include contact pads (184) at the bottom surface of the bridge die (150, Fig. 1). Regarding claim 8, Deshpande/Nickerson discloses the microelectronic structure of claim 1, wherein the electrically conductive structures (124+; meaning 124+184) include solder (in 184, “interconnects 184, such as reflowable solder bumps or ball”). Regarding claim 12, Deshpande/Nickerson discloses the microelectronic structure of claim 1, wherein the substrate includes electrically conductive features (136) therein including through (layer) vias (outer 136) and bridge vias (inner 136), wherein the electrically conductive structures (124+) are in registration with the bridge vias (inner 136) to electrically couple the substrate with the bridge die (Fig. 1) Regarding claim 14, Deshpande discloses a (Fig. 1) semiconductor package, comprising: a microelectronic subassembly (110+) including: a substrate (110) defining a cavity (112) therein; a bridge die (150) within the cavity; an electrical coupling layer (124+) between a top surface of the cavity and a bottom surface of the bridge die, the electrical coupling layer including: electrically conductive structures (124+); and a pair of surface dies (170) on a (top) surface of the microelectronic subassembly and electrically coupled to the bridge die (per 156 for example) such that the bridge die provides an electrical coupling (per 156 for example) between the pair of surface dies (Fig. 1). Deshpande fails to disclose the electrical coupling layer including: a non-conductive component including a die bonding film and defining holes therein; and electrically conductive structures in the holes, the electrically conductive structures electrically coupling the substrate with the bridge die. Nickerson discloses the electrical coupling layer including: a non-conductive component (350A, “adhesive 350A”) including a die bonding film (350A) and defining holes (occupied by 352A) therein; and electrically conductive structures (352A+, “solder connections 352A”) in the holes, the electrically conductive structures electrically coupling the substrate with the bridge die (340A, Figs. 6-7). It would have been obvious to one of ordinary skill in the art, before the effective filing date, to include the electrical coupling layer of Nickerson in Deshpande and arrive at the claimed invention so as to securely attach a die on a substrate. Regarding claim 15, Deshpande/Nickerson (together) discloses the semiconductor package of claim 14, further including electrical contact pads (184, Fig. 1 of Deshpande) at the bottom surface of the bridge die (150), the contact pads in the holes of the non-conductive component (once the non-conductive component 350A of Nickerson at Fig. 6 is applied to Fig. 1 of Deshpande, 184 is in the holes of 350A), and in registration with corresponding ones of the electrically conductive structures (as 124, Fig. 1 of Deshpande). Regarding claim 16, Deshpande/Nickerson discloses the semiconductor package of claim 14, wherein the electrically conductive structures (124+; meaning 124+184) include liquid metal (in 184, “interconnects 184, such as reflowable solder bumps or balls”). Claims 4-6 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Deshpande et al. (US 20170330835 A1) in view of Nickerson (US 20140159250 A1) as applied to claims 3 and 16 above, and further in view of Sylvestre et al. (US 9761542 B1). Regarding claims 4 and 5, Deshpande/Nickerson fails to disclose (claim 4) the microelectronic structure of claim 3, wherein the liquid metal includes gallium, or an alloy of gallium, and, (claim 5) the microelectronic structure of claim 4, wherein the alloy of gallium includes at least one of an alloy of gallium and indium, a eutectic alloy of gallium, indium, and tin, or a eutectic alloy of gallium, indium, and zinc. Sylvestre discloses (claim 4) the microelectronic structure of claim 3, wherein the liquid metal (114/514) includes gallium, or an alloy of gallium (Figs. 1 and 5, “the solder joints are comprised of gallium, or a gallium indium alloy”), and, (claim 5) the microelectronic structure of claim 4, wherein the alloy of gallium includes at least one of an alloy of gallium and indium (“the solder joints are comprised of gallium, or a gallium indium alloy”), a eutectic alloy of gallium, indium, and tin, or a eutectic alloy of gallium, indium, and zinc. It would have been obvious to one of ordinary skill in the art, before the effective filing date, to include the liquid metal of Sylvestre in Deshpande/Nickerson and arrive at the claimed invention so as to “allows a softer underfill to be used, which in turn reduces stresses during operation and thermal cycling that are caused by the different coefficient of thermal expansion (CTE) of the electronic circuit chip and the circuit board substrate” per the Abstract of Sylvestre. Regarding claim 6, Deshpande/Nickerson discloses (Fig. 1) the microelectronic structure of claim 3, wherein the substrate (110) includes first electrically conductive features (136) therein, and the die includes second electrically conductive features (160) therein, the microelectronic structure further including caps (e.g., 158) Deshpande/Nickerson fails to disclose caps comprising nickel or tungsten. Sylvestre discloses caps comprising nickel or tungsten (110/112, “the material for the UBM pads 112 and the surface mount pads 110 may include, but is not limited to, tungsten, tantalum, nickel, niobium, titanium, and/or molybdenum”, Figs. 1 and 5). It would have been obvious to one of ordinary skill in the art, before the effective filing date, to include the caps of Sylvestre in Deshpande/Nickerson and arrive at the claimed invention so as to employ liquid interconnections which “allows a softer underfill to be used, which in turn reduces stresses during operation and thermal cycling that are caused by the different coefficient of thermal expansion (CTE) of the electronic circuit chip and the circuit board substrate” per the Abstract of Sylvestre. Regarding claim 17, Deshpande/Nickerson fails to disclose the semiconductor package of claim 16, wherein the liquid metal includes gallium, or an alloy of gallium. Sylverstre discloses wherein the liquid metal includes gallium, or an alloy of gallium (Figs. 1 and 5, “the solder joints are comprised of gallium, or a gallium indium alloy”). It would have been obvious to one of ordinary skill in the art, before the effective filing date, to include the liquid metal of Sylvestre in Deshpande/Nickerson and arrive at the claimed invention so as to “allows a softer underfill to be used, which in turn reduces stresses during operation and thermal cycling that are caused by the different coefficient of thermal expansion (CTE) of the electronic circuit chip and the circuit board substrate” per the Abstract of Sylvestre. Claims 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Deshpande et al. (US 20170330835 A1) in view of Nickerson (US 20140159250 A1) as applied to claim 1 above, and further in view of Ayotte et al. (US 20090256268 A1). Regarding claims 9-10, Deshpande/Nickerson fails to disclose (claim 9) the microelectronic structure of claim 1, wherein the non-conductive component includes a polymer, and, (claim 10) the microelectronic structure of claim 9, wherein the non-conductive component includes at least one of: epoxy, polyimide, bismaleimide, acrylate, silicone, cyanate ester, silica, alumina, aluminum hydroxide, mica, glass, polyethylene terephthalate polyolefin, copolymer polypropylene, block copolymer polypropylene, homopolypropylene, polybutene, polymethylpentene, ethylene-vinylacetate copolymer, ionomer resin, ethylene(meth)acrylic acid copolymer, ethylene(meth)acrylic acid ester (random or alternating) copolymer, ethylene-butene copolymer, ethylene-hexene copolymer, polyurethane, polyester, polyethyleneterephthalate, polyethylenenaphthalate, polycarbonate, polyetheretherketone, polyimide, polyetherimide, polyamide, whole aromatic polyamide, polyphenylsulfide, fluorine resin, polyvinyl chloride, polyvinylidene chloride, a cellulose resin, or a silicone resin. Ayotte discloses (claim 9) the microelectronic structure of claim 1, wherein the non-conductive component (140) includes a polymer (“underfill layer 140 comprises a material selected from the group consisting of epoxy, silica filled epoxy, silicone, acrylic resin, poly vinyl chloride resin, a thermosetting resin and a thermoplastic”, [0013]), and, (claim 10) the microelectronic structure of claim 9, wherein the non-conductive component (140, [0013]) includes at least one of: epoxy (“epoxy”), polyimide, bismaleimide, acrylate, silicone (“silicone”), cyanate ester, silica, alumina, aluminum hydroxide, mica, glass, polyethylene terephthalate polyolefin, copolymer polypropylene, block copolymer polypropylene, homopolypropylene, polybutene, polymethylpentene, ethylene-vinylacetate copolymer, ionomer resin, ethylene(meth)acrylic acid copolymer, ethylene(meth)acrylic acid ester (random or alternating) copolymer, ethylene-butene copolymer, ethylene-hexene copolymer, polyurethane, polyester, polyethyleneterephthalate, polyethylenenaphthalate, polycarbonate, polyetheretherketone, polyimide, polyetherimide, polyamide, whole aromatic polyamide, polyphenylsulfide, fluorine resin, polyvinyl chloride, polyvinylidene chloride, a cellulose resin, or a silicone resin. It would have been obvious to one of ordinary skill in the art, before the effective filing date, to include the material of Ayotte in Deshpande/Nickerson and arrive at the claimed invention so as to enable means from protecting and/or providing mechanical support to interconnect structures since the use of conventional materials to perform their known function is prima-facie obvious (MPEP 2144.07). Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Deshpande et al. (US 20170330835 A1) in view of Nickerson (US 20140159250 A1) as applied to claim 1 above, and further in view of Kiuchi et al. (US 20100279491 A1). Regarding claim 11, Deshpande/Nickerson fails to disclose the microelectronic structure of claim 1, further including an adhesive on the non-conductive component to bond the non-conductive component to the bridge die at one surface thereof and to the top surface of the cavity at another surface thereof. Kiuchi discloses “The die attach film 3…may have a multilayer structure of two or more layers by appropriately combining, in addition to the epoxy resin, thermosetting resins differing in the glass transition temperature or thermosetting resins differing in the thermosetting temperature” ([0137], emphasis added). The examiner takes the position that Kiuchi discloses an embodiment with a die attach film (3) comprising three layers wherein the outer layers qualify as adhesives per MPEP 2111. Said die attach film (3) is employed to bond a chip (7) to a die pad (10). Hence, Kiuchi discloses further including an adhesive (outer layer) on the non-conductive component (middle layer) to bond the non-conductive component to the bridge die (7) at one surface thereof and to the top surface of a substrate (10) at another surface thereof (Fig. 3). It would have been obvious to one of ordinary skill in the art, before the effective filing date, to include an adhesive as claimed in Deshpande/Nickerson and arrive at the claimed invention in view of Kiuchi so as to ensure proper adhesion is achieved and prevent delamination or mechanical failure. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Deshpande et al. (US 20170330835 A1) in view of Nickerson (US 20140159250 A1) as applied to claim 1 above, and further in view of Roy et al. (US 20140174807 A1). Regarding claim 13, Deshpande/Nickerson fails to disclose the microelectronic structure of claim 1, wherein the substrate includes glass, silicon or an organic material. Roy discloses wherein the substrate (302) includes glass, silicon or an organic material (“Substrate 302 may be a package substrate 302, such as that manufactured by substrate manufacturing process 102 of FIG. 1 and may comprise an organic polymer such as an epoxy.”, [0020]). It would have been obvious to one of ordinary skill in the art, before the effective filing date, to include the substrate material of Roy in Deshpande/Nickerson and arrive at the claimed invention because said material is well-known and commonly used in semiconductor packaging and would have yielded predictable results since the use of conventional materials to perform their known function is prima-facie obvious (See MPEP 2144.07). Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Deshpande et al. (US 20170330835 A1) in view of Nickerson (US 20140159250 A1) and Liff et al. (US 20200098692 A1). Regarding claim 18, Deshpande discloses an integrated circuit (IC) device (Fig. 1) assembly including: a microelectronic subassembly (110+) including: a substrate (110) defining a cavity (112) therein; a bridge die (150) within the cavity; an electrical coupling layer (124+) between a top surface of the cavity and a bottom surface of the bridge die, the electrical coupling layer including: electrically conductive structures (124+); and a pair of surface dies (170) on a surface (top) of the microelectronic subassembly and electrically coupled (via, e.g., 156) to the bridge die such that the bridge die provides an electrical coupling (via, e.g., 156) between the pair of surface dies (Fig. 1). Deshpande fails to disclose (a) a printed circuit board; and a plurality of integrated circuit components coupled to the printed circuit board, individual ones of the integrated circuit components including one or more semiconductor packages, individual ones of the semiconductor packages including a microelectronic assembly, and, (b) the electrical coupling layer including: a non-conductive component including a die bonding film and defining holes therein; and electrically conductive structures in the holes, the electrically conductive structures electrically coupling the substrate with the bridge die. Nickerson discloses (b) the electrical coupling layer including: a non-conductive component (350A, “adhesive 350A”) including a die bonding film (350A) and defining holes (occupied by 352A) therein; and electrically conductive structures (352A+, “solder connections 352A”) in the holes, the electrically conductive structures electrically coupling the substrate with the bridge die (340A, Figs. 6-7). It would have been obvious to one of ordinary skill in the art, before the effective filing date, to include the electrical coupling layer of Nickerson in Deshpande and arrive at the claimed invention so as to securely attach a die on a substrate. Liff discloses (a) a printed circuit board (1702, Fig. 10); and a plurality of integrated circuit components (1720/1724/1726/1732) coupled to the printed circuit board, individual ones of the integrated circuit components including one or more semiconductor packages (each of 1720/1724/1726/1732), individual ones of the semiconductor packages including a microelectronic assembly (Fig. 10). It would have been obvious to one of ordinary skill in the art, before the effective filing date, to include the arrangement of Liff in Deshpande/Nickerson and arrive at the claimed invention so as to provide an IC device with high density integration and expanded functionality since the use of conventional materials (IC elements in this case) to perform their known function is prima-facie obvious (MPEP 2144.07). Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Deshpande et al. (US 20170330835 A1) in view of Nickerson (US 20140159250 A1) and Liff et al. (US 20200098692 A1) as applied to claim 18 above, and further in view of Sylvestre et al. (US 9761542 B1). Regarding claim 19, Deshpande/Nickerson/Liff fails to disclose the IC device assembly of claim 18, wherein the electrically conductive structures include liquid metal, the liquid metal including gallium, or an alloy of gallium. Sylvestre discloses wherein the electrically conductive structures include liquid metal, the liquid metal including gallium, or an alloy of gallium (Figs. 1 and 5, “the solder joints are comprised of gallium, or a gallium indium alloy”). It would have been obvious to one of ordinary skill in the art, before the effective filing date, to include the liquid metal of Sylvestre in Deshpande/Nickerson/Liff and arrive at the claimed invention so as to “allows a softer underfill to be used, which in turn reduces stresses during operation and thermal cycling that are caused by the different coefficient of thermal expansion (CTE) of the electronic circuit chip and the circuit board substrate” per the Abstract of Sylvestre. Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Deshpande et al. (US 20170330835 A1) in view of Nickerson (US 20140159250 A1) and Liff et al. (US 20200098692 A1) as applied to claim 18 above, and further in view of Ayotte et al. (US 20090256268 A1). Regarding claim 20, Deshpande/Nickerson fails to disclose the microelectronic assembly of claim 18, wherein the non-conductive component includes at least one of: epoxy, polyimide, bismaleimide, acrylate, silicone, cyanate ester, silica, alumina, aluminum hydroxide, mica, glass, polyethylene terephthalate polyolefin, copolymer polypropylene, block copolymer polypropylene, homopolypropylene, polybutene, polymethylpentene, ethylene-vinylacetate copolymer, ionomer resin, ethylene(meth)acrylic acid copolymer, ethylene(meth)acrylic acid ester (random or alternating) copolymer, ethylene-butene copolymer, ethylene-hexene copolymer, polyurethane, polyester, polyethyleneterephthalate, polyethylenenaphthalate, polycarbonate, polyetheretherketone, polyimide, polyetherimide, polyamide, whole aromatic polyamide, polyphenylsulfide, fluorine resin, polyvinyl chloride, polyvinylidene chloride, a cellulose resin, or a silicone resin. Ayotte discloses wherein the non-conductive component (140, [0013]) includes at least one of: epoxy (“epoxy”), polyimide, bismaleimide, acrylate, silicone (“silicone”), cyanate ester, silica, alumina, aluminum hydroxide, mica, glass, polyethylene terephthalate polyolefin, copolymer polypropylene, block copolymer polypropylene, homopolypropylene, polybutene, polymethylpentene, ethylene-vinylacetate copolymer, ionomer resin, ethylene(meth)acrylic acid copolymer, ethylene(meth)acrylic acid ester (random or alternating) copolymer, ethylene-butene copolymer, ethylene-hexene copolymer, polyurethane, polyester, polyethyleneterephthalate, polyethylenenaphthalate, polycarbonate, polyetheretherketone, polyimide, polyetherimide, polyamide, whole aromatic polyamide, polyphenylsulfide, fluorine resin, polyvinyl chloride, polyvinylidene chloride, a cellulose resin, or a silicone resin. It would have been obvious to one of ordinary skill in the art, before the effective filing date, to include the material of Ayotte in Deshpande/Nickerson/Liff and arrive at the claimed invention so as to enable means from protecting and/or providing mechanical support to interconnect structures since the use of conventional materials to perform their known function is prima-facie obvious (MPEP 2144.07). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDRES MUNOZ whose telephone number is (571)270-3346. The examiner can normally be reached 8AM-5PM Central Time. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571)270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Andres Munoz/Primary Examiner, Art Unit 2818
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Prosecution Timeline

Apr 01, 2022
Application Filed
Jan 20, 2023
Response after Non-Final Action
Nov 18, 2025
Non-Final Rejection — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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1-2
Expected OA Rounds
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94%
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2y 4m
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