Prosecution Insights
Last updated: April 19, 2026
Application No. 17/712,738

SEMICONDUCTOR DEVICE WITH METAL SILICIDE LAYER

Non-Final OA §112
Filed
Apr 04, 2022
Examiner
ISAAC, STANETTA D
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Infineon Technologies AG
OA Round
3 (Non-Final)
86%
Grant Probability
Favorable
3-4
OA Rounds
2y 7m
To Grant
48%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
811 granted / 948 resolved
+17.5% vs TC avg
Minimal -38% lift
Without
With
+-37.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
57 currently pending
Career history
1005
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
49.5%
+9.5% vs TC avg
§102
44.6%
+4.6% vs TC avg
§112
5.4%
-34.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 948 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-20 are pending. Claims 17-20 are withdrawn. Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 9/30/25 has been entered. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 8-16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. In claim 8, it is unclear in lines 10-17, respectively, which “a laser shot of the plurality of laser shots…”.Specifically, “a first illumination area luminated by a first laser shot of the plurality of laser shots”, then the limitation states, “at least one laser shot, of the plurality of laser shots…” it is unclear as to which of the plurality shots is being referred to. In addition, “illuminates material having a surface roughness” it is unclear as to which material the claim is referring to. Allowable Subject Matter Claims 1-7 are allowed over the prior art of record. The following is an examiner’s statement of reasons for allowance: The closest prior art of record and to the examiner’s knowledge does not suggest or render obvious a method of manufacturing a semiconductor device, particularly characterized by directing second thermal energy to the first surface of the metal silicide layer having the surface roughness to reduce the surface roughness of the first surface of the metal silicide layer, as detailed in claim 1. Claims 2-7 depend from claim 1. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to STANETTA D ISAAC whose telephone number is (571)272-1671. The examiner can normally be reached M-F 10-6. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached at 571-270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /STANETTA D ISAAC/Examiner, Art Unit 2898 February 21, 2026
Read full office action

Prosecution Timeline

Apr 04, 2022
Application Filed
Jun 01, 2024
Non-Final Rejection — §112
Aug 13, 2024
Applicant Interview (Telephonic)
Aug 13, 2024
Examiner Interview Summary
Aug 20, 2024
Response Filed
May 17, 2025
Final Rejection — §112
Aug 06, 2025
Applicant Interview (Telephonic)
Aug 06, 2025
Examiner Interview Summary
Aug 12, 2025
Response after Non-Final Action
Sep 30, 2025
Request for Continued Examination
Oct 02, 2025
Response after Non-Final Action
Feb 21, 2026
Non-Final Rejection — §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604706
APPARATUS INCLUDING TRANSPARENT MATERIAL FOR TRANSPARENT PROCESS PERFORMANCE AND METHOD USING THEREOF
2y 5m to grant Granted Apr 14, 2026
Patent 12604715
ISOLATION STRUCTURE AND MEMORY DEVICE
2y 5m to grant Granted Apr 14, 2026
Patent 12593714
SEMICONDUCTOR DEVICE INCLUDING BONDING ENHANCEMENT LAYER AND METHOD OF FORMING THE SAME
2y 5m to grant Granted Mar 31, 2026
Patent 12593496
Multiple Threshold Voltage Implementation Through Lanthanum Incorporation
2y 5m to grant Granted Mar 31, 2026
Patent 12581981
Method of Forming an Interconnection between an Electric Component and an Electronic Component
2y 5m to grant Granted Mar 17, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

3-4
Expected OA Rounds
86%
Grant Probability
48%
With Interview (-37.9%)
2y 7m
Median Time to Grant
High
PTA Risk
Based on 948 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month