DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application is being examined under the pre-AIA first to invent provisions.
All amendments to the claims filed on 2/4/26 have been entered and action follows:
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 2/4/26 has been entered.
Response to Arguments
Applicant’s arguments with respect to claim(s) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of pre-AIA 35 U.S.C. 103(a) which forms the basis for all obviousness rejections set forth in this Office action:
(a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-9, 12-16 and 18 are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Chang et al (US Pub. 2011/0170091) in view of Kulkarni et al (US 7,676,077) and Lin et al (US Pub. 2009/0067722).
With respect to claim 1, Chang discloses A method for design guided wafer inspection of repeating blocks (see Abstract) comprising:
receiving one or more sets of design data at least associated with a region of interest of a wafer;
identifying a first repeating block in the received design data, (see paragraph 0029, wherein …semiconductor chip “wafer” design known as the "floorplan" “design data” contains the placement information “layout” for repeating structures known as cells “repeating blocks”…);
[selecting a portion of the identified first repeating block for inspection based on one or more selected attributes of the first repeating block;
performing one or more mixed mode inspection processes on the selected portion of the identified first repeating block, wherein the one or more mixed mode inspection processes on the selected portion of the first repeating block includes die-to-die and block-to-block comparisons; and
utilizing the received design data, identifying at least a second repeating block;
Wherein the second repeating block is flipped or rotated relative to the first repeating block such that the second repeating block matches a pattern of the first repeating block],
as claimed.
Chang fails to explicitly disclose selecting a portion of the identified first repeating block for inspection based on one or more selected attributes of the first repeating block;
performing one or more mixed mode inspection processes on the selected portion of the identified first repeating block, wherein the one or more mixed mode inspection processes on the selected portion of the first repeating block includes die-to-die and block-to-block comparisons; and
utilizing the received design data, identifying at least a second repeating block;
wherein the second repeating block is flipped or rotated relative to the first repeating block such that the second repeating block matches a pattern of the first repeating block,
as claimed.
Kulkarni in the same field teaches selecting a portion of the identified first repeating block for inspection based on one or more selected attributes of the one or more repeating blocks (see Kul figure 1, numerical 16);
performing comparisons, (see Col. 8, lines 39-44, wherein …In another embodiment, the method includes optimizing a wafer inspection process for determining printability of a reticle defect on the wafer using the position of the inspection data in the design data space and a context map…); and utilizing the received design data, identifying at least a second repeating block;
wherein the second repeating block is flipped or rotated relative to the first repeating block such that the second repeating block matches a pattern of the first repeating block, (see col. 73 lines 20-24, wherein …All instances of at least similar patterns may be identified in the design data (including rotated, flipped, or otherwise skewed instances of the pattern) and binned into a pattern group…; also, col. 157, lines 15-25 wherein …The common patterns may be identified by searching for the pattern rotated or flipped to find all of the potential failures…; see col. 48, lines 31-36, wherein … the method may include aligning inspection data to the design data and then using die relative design data space coordinates determined by this aligning step to transform coordinates of additional inspection data to design data space coordinates…; and the two images are reference image and the test image as first and second image), as claimed.
It would have been obvious to one ordinary skilled in the art at the time of invention to combine the two references as they are analogous because they are solving similar problem of wafer inspection using image analysis. The teaching of Kulkarni for selecting the portions in order to inspect the blocks can be incorporated into the Chang’s system as both the art is from the same assignee (KLA-Tencor) and the modification yields an accurately determining the defects in the wafer inspections (see Kulkarni col. 1, lines 20-24).
Lin teaches performing one or more mixed mode inspection processes on the selected portion of the identified first repeating block, wherein the one or more mixed mode inspection processes on the selected portion of the first repeating block includes die-to-die and block-to-block comparisons, (emphasis added; see paragraph 0004, wherein …One approach to resolving this problem is to use a so-called mixed mode inspection that inspects the page breaks 16 in a so-called random mode, using die to die comparisons within a single substrate, and inspect memory cells in a so-called array mode, using cell to cell comparisons within a single die), as claimed.
It would have been obvious to one ordinary skilled in the art at the time of invention to combine the references as they are analogous because they are solving similar problem of wafer inspection using image analysis. The teaching of Lin for mixed mode inspection process can be incorporated into the Chang and Kulkarni’s system as both the art is from the same assignee (KLA-Tencor) and the modification yields better defects detection in the wafer inspections (see Lin Abstract), for motivation.
With respect to claim 2, combination of Chang, Kulkarni and Lin discloses at least one of an optical inspection tool and an electron beam inspection tool, (see Chang col. 00345, wherein …inspection system known in the art, such as, but not limited to, a bright-field inspection system, a dark-field inspection system, or an electron beam inspection system…), as claimed.
With respect to claim 3, combination of Chang, Kulkarni and Lin discloses wherein the region of interest comprises: at least a portion of a die of a wafer, (see Chang paragraph 0069, wherein …In addition, wafer map 402 includes symbols 406 “a portion”, each of which indicates the position of a defect detected on the wafer…), as claimed.
With respect to claim 4, combination of Chang, Kulkarni and Lin discloses wherein the one or more sets of design data is received in a design layout file, (see Chang paragraph 0029, wherein …semiconductor chip design known as the "floorplan" contains the placement information “layout” for repeating structures known as cells …), as claimed.
With respect to claim 5, combination of Chang, Kulkarni and Lin discloses wherein the first repeating block comprise: one or more sets of repeating cells, (see Chang see paragraph 0029, wherein …semiconductor chip design known as the "floorplan" contains the placement information for repeating structures known as cells “repeating blocks”…) as claimed.
With respect to claim 6, combination of Chang, Kulkarni and Lin discloses wherein the first repeating block comprise: one or more sets of repeating polygons, (see Chang figure 4A, numerical 404 a polygon), as claimed.
With respect to claim 7, combination of Chang, Kulkarni and Lin discloses prior to identifying the first repeating block, generating at least one DCA by analyzing one or more localized element variations inside the region of interest, (see Kulkarni col. 52 lines 55-60, wherein …inspection data to the design data space to within half of the inspection pixel size allows for substantially accurate setting of detection thresholds (by substantially accurately separating critical from non-critical areas)…), as claimed.
With respect to claim 8, combination of Chang, Kulkarni and Lin discloses wherein the identifying the first repeating block in the received design data comprises: identifying one or more repeating blocks in the received design data with a design cell hierarchy, (see Kulkarni col. 89, lines 54-58, wherein …region information in design data (i.e., the hierarchical design data) may be used in combination with the positions of the defects in the design data space to determine the hierarchy of the defects in the design data such as a cell in the design data…), as claimed.
With respect to claim 9, combination of Chang, Kulkarni and Lin discloses wherein the identifying the first repeating block in the received design data comprises: processing one or more non-spatially repeating and non-aligned portions of the region of interest; and
storing one or more non-spatially repeating and non-aligned portions of the region of interest, (see Kulkarni col. 49, lines 4-26, wherein the non-critical areas are read as “non-spatially repeating and non-aligned portions” and recipe setup is read as “storing”), as claimed.
With respect to claim 12, combination of Chang, Kulkarni and Lin discloses wherein the identifying the first repeating block in the received design data comprises: identifying, via an image processing algorithm applied to the received design data, one or more repeating blocks based on image processing of received design data, (see Chang paragraph 0029, wherein …semiconductor chip design known as the "floorplan" “design data” contains the placement information for repeating structures known as cells “repeating blocks”…; also this is done using image analysis “an image processing algorithm”), as claimed.
With respect to claim 13, combination of Chang, Kulkarni and Lin discloses determining a cell level hierarchy for inspection repeating blocks based on design data, (see Kulkarni col. 73 lines 20-24, wherein …All instances of at least similar patterns may be identified in the design data (including rotated, flipped, or otherwise skewed instances of the pattern) and binned into a pattern group…), as claimed.
With respect to claim 14, combination of Chang, Kulkarni and Lin discloses wherein the one or more selected attributes comprise: a pattern density of the first repeating block, (see Kulkarni col. 89 lines 18-25, wherein … module 166 may be used in the methods described herein is for correlation of different density zones in the device layout…), as claimed.
With respect to claim 15, combination of Chang, Kulkarni and Lin discloses generating a design based classification (DBC) database, wherein the one or more selected attributes comprise: a criticality factor of the first repeating block, wherein the DBC database stores the critically factor of the first repeating block (see Kulkarni col. 10, last two lines wherein … the method includes determining a defect criticality index (DCI) for one or more of the defects…; see col. 28, lines 41-50 wherein …a hot spot discovery phase. Hot spot discovery may be performed during …product design, RET design, reticle design and manufacturing, and product ramp. The hot spot discovery phase may include identifying hot spots for reticle design … The hot spot discovery phase may also include generating a data structure containing information about the hot spots such as a hot spot database…), as claimed.
With respect to claim 16, combination of Chang, Kulkarni and Lin discloses prior to selecting a portion of the identified first repeating block for inspection based on one or more selected attributes, analyzing an inspection feasibility metric of the first repeating block, (see Kulkarni col. 52 lines 55-60, wherein …inspection data to the design data space to within half of the inspection pixel size allows for substantially accurate setting of detection thresholds (by substantially accurately separating critical from non-critical areas “inspection feasibility metric”)…), as claimed.
With respect to claim 18, combination of Chang, Kulkarni and Lin discloses performing one or more field-to-field inspection processes on the selected portion of the identified first repeating block, (see Kulkarni col. 30 limes 32-36, wherein …inspection system configured to perform field-by-field image acquisition…), as claimed.
Conclusion
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/VIKKRAM BALI/Primary Examiner, Art Unit 2663